pems800v055.rpt

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Project Information                          e:\yp\cpld\dongli\pems800v055.rpt

MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 04/05/2003 12:26:49

Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir         Shareable
POF       Device          Pins    Pins     Pins     LCs  Expanders  % Utilized

pems800v055
      EPM7128SQC100-6      16       61       0      81      50          63 %

User Pins:                 16       61       0  



Project Information                          e:\yp\cpld\dongli\pems800v055.rpt

** PROJECT COMPILATION MESSAGES **

Info: Trying to find new partition/fit after discarding assignments as requested with the Partitioner/Fitter Status dialog box
Warning: Node 'LCD_LAMP' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem


Project Information                          e:\yp\cpld\dongli\pems800v055.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

pems800v055@80   pems800v055@85   AD_A
pems800v055@71   pems800v055@44   BEER
pems800v055@86   pems800v055@22   /CS_COM
pems800v055@58   pems800v055@21   /CS_KT
pems800v055@63   pems800v055@19   /CS_SW
pems800v055@78   pems800v055@72   /CS_T
pems800v055@57   pems800v055@49   EA0
pems800v055@49   pems800v055@42   EA1
pems800v055@70   pems800v055@30   EA2
pems800v055@73   pems800v055@56   EA3
pems800v055@44   pems800v055@37   EA4
pems800v055@33   pems800v055@82   EA5
pems800v055@37   pems800v055@71   EA6
pems800v055@82   pems800v055@63   EA7
pems800v055@54   pems800v055@46   EA8
pems800v055@48   pems800v055@47   EA9
pems800v055@72   pems800v055@39   EA10
pems800v055@65   pems800v055@54   EA11
pems800v055@51   pems800v055@38   EA12
pems800v055@39   pems800v055@83   EA13
pems800v055@38   pems800v055@65   EA14
pems800v055@77   pems800v055@55   EA15
pems800v055@55   pems800v055@48   EA16
pems800v055@46   pems800v055@50   EA17
pems800v055@66   pems800v055@34   EA18
pems800v055@79   pems800v055@66   EM0
pems800v055@81   pems800v055@29   E1
pems800v055@83   pems800v055@78   E2
pems800v055@29   pems800v055@26   INT_COM
pems800v055@60   pems800v055@25   I/O_C0
pems800v055@62   pems800v055@24   I/O_C1
pems800v055@47   ---------        LCD_LAMP
pems800v055@34   pems800v055@35   LED_ARALM
pems800v055@43   pems800v055@18   LED_COM1
pems800v055@30   pems800v055@31   LED_COM2
pems800v055@32   pems800v055@79   LED_COM3
pems800v055@LC98 pems800v055@LC100|74373:17|:14
pems800v055@LC87 pems800v055@LC103|74373:17|:18
pems800v055@LC106pems800v055@LC114|74373:3|:13
pems800v055@LC84 pems800v055@LC108|74373:18|:18
pems800v055@LC96 pems800v055@LC116|74373:3|:12
pems800v055@LC116pems800v055@LC127|74373:18|:12
pems800v055@LC90 pems800v055@LC122|74373:18|:17
pems800v055@LC122pems800v055@LC119|74373:17|:12
pems800v055@LC95 pems800v055@LC124|74373:17|:17
pems800v055@LC124pems800v055@LC106|74373:17|:13
pems800v055@LC127pems800v055@LC111|74373:18|:13
pems800v055@59   pems800v055@52   PX11
pems800v055@50   pems800v055@51   PX12
pems800v055@69   pems800v055@33   PX13
pems800v055@31   pems800v055@27   PX21
pems800v055@52   pems800v055@32   PX22
pems800v055@35   pems800v055@80   PX23
pems800v055@18   pems800v055@86   RLC0
pems800v055@19   pems800v055@15   RLC1
pems800v055@25   pems800v055@7    RLC2
pems800v055@26   pems800v055@14   RLC3
pems800v055@27   pems800v055@16   RLC4
pems800v055@24   pems800v055@77   RLC5
pems800v055@23   pems800v055@70   RLC6
pems800v055@22   pems800v055@60   RLC7
pems800v055@21   pems800v055@87   RLC8
pems800v055@87   pems800v055@69   RLC9
pems800v055@67                    RLC10
pems800v055@74   pems800v055@59   RLC11
pems800v055@7    pems800v055@58   RLC12
pems800v055@16   pems800v055@81   RLC13
pems800v055@14   pems800v055@74   RLC14
pems800v055@85   pems800v055@62   RLC15
pems800v055@56   pems800v055@43   SMOG
pems800v055@42   pems800v055@23   T/R1
pems800v055@LC108pems800v055@LC98 |74373:3|:14
pems800v055@LC111pems800v055@LC95 |74373:3|:15
pems800v055@LC100pems800v055@LC84 |74373:17|:15
pems800v055@LC92 pems800v055@LC82 |74373:17|:16
pems800v055@LC119pems800v055@LC87 |74373:17|:19
pems800v055@LC112                 |74373:18|:14
pems800v055@LC103pems800v055@LC90 |74373:18|:15
pems800v055@LC82 pems800v055@LC92 |74373:18|:16
pems800v055@LC114pems800v055@LC96 |74373:18|:19


Project Information                          e:\yp\cpld\dongli\pems800v055.rpt

** FILE HIERARCHY **



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Device-Specific Information:                 e:\yp\cpld\dongli\pems800v055.rpt
pems800v055

***** Logic for device 'pems800v055' compiled without errors.




Device: EPM7128SQC100-6

Device Options:
    Turbo Bit                                    = ON
    Security Bit                                 = OFF
    Enable JTAG Support                        = ON
    User Code                                  = ffff
    MultiVolt I/O                              = OFF



Device-Specific Information:                 e:\yp\cpld\dongli\pems800v055.rpt
pems800v055

** ERROR SUMMARY **

Info: Chip 'pems800v055' in device 'EPM7128SQC100-6' has less than 20% of pins available for future logic changes -- if your project is likely to change, Altera recommends using a larger device
                                                        
                                                        
                                                        
                             V                          
                             C                 V     R  
                             C           R R A C E   L  
               A     G       I G G G   G L L D C A E C  
               L D D N D R D N N N N D N C C _ I 1 A 1  
               E 1 4 D 3 D 2 T D D D 0 D 8 0 A O 3 5 3  
             ------------------------------------------_ 
            / 100  98  96  94  92  90  88  86  84  82   |_ 
           /     99  97  95  93  91  89  87  85  83  81    | 
    RESET |  1                                          80 | PX23 
       WR |  2                                          79 | LED_COM3 
      A14 |  3                                          78 | E2 
      A15 |  4                                          77 | RLC5 
    VCCIO |  5                                          76 | GND 
     #TDI |  6                                          75 | #TDO 
     RLC2 |  7                                          74 | RLC14 
      T/R |  8                                          73 | AD_B 
       D5 |  9                                          72 | /CS_T 
 INT_COMI | 10                                          71 | EA6 
       D6 | 11                                          70 | RLC6 
       D7 | 12                                          69 | RLC9 
      GND | 13                                          68 | VCCIO 
     RLC3 | 14                                          67 | RLC10 
     RLC1 | 15                                          66 | EM0 
     RLC4 | 16             EPM7128SQC100-6              65 | EA14 
     #TMS | 17                                          64 | #TCK 
 LED_COM1 | 18                                          63 | EA7 
   /CS_SW | 19                                          62 | RLC15 
    VCCIO | 20                                          61 | GND 
   /CS_KT | 21                                          60 | RLC7 
  /CS_COM | 22                                          59 | RLC11 
     T/R1 | 23                                          58 | RLC12 
   I/O_C1 | 24                                          57 | AD_C 
   I/O_C0 | 25                                          56 | EA3 
  INT_COM | 26                                          55 | EA15 
     PX21 | 27                                          54 | EA11 
      GND | 28                                          53 | VCCIO 
       E1 | 29                                          52 | PX11 
      EA2 | 30                                          51 | PX12 
          |      32  34  36  38  40  42  44  46  48  50  _| 
           \   31  33  35  37  39  41  43  45  47  49   | 
            \------------------------------------------- 
               L P P E L V E E E G V E S B G E E E E E  
               E X X A E C A A A N C A M E N A A A A A  
               D 2 1 1 D C 4 1 1 D C 1 O E D 8 9 1 0 1  
               _ 2 3 8 _ I   2 0   I   G R       6   7  
               C       A O         N                    
               O       R           T                    
               M       A                                
               2       L                                
                       M                                


N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.

^ = Dedicated configuration pin.
+ = Reserved configuration pin, which is tri-stated during user mode.
* = Reserved configuration pin, which drives out in user mode.
PDn = Power Down pin. 
@ = Special-purpose pin. 
# = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use.
& = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration.  JTAG pin stability prevents accidental loading of JTAG instructions.


Device-Specific Information:                 e:\yp\cpld\dongli\pems800v055.rpt
pems800v055

** RESOURCE USAGE **

                                                Shareable     External
Logic Array Block     Logic Cells   I/O Pins    Expanders   Interconnect

A:     LC1 - LC16     0/16(  0%)  10/10(100%)   0/16(  0%)   0/36(  0%) 
B:    LC17 - LC32     4/16( 25%)  10/10(100%)   0/16(  0%)   5/36( 13%) 
C:    LC33 - LC48     9/16( 56%)  10/10(100%)   2/16( 12%)  13/36( 36%) 
D:    LC49 - LC64    10/16( 62%)  10/10(100%)   9/16( 56%)  18/36( 50%) 
E:    LC65 - LC80    10/16( 62%)  10/10(100%)  10/16( 62%)  19/36( 52%) 
F:    LC81 - LC96    16/16(100%)  10/10(100%)  11/16( 68%)  23/36( 63%) 
G:   LC97 - LC112    16/16(100%)  10/10(100%)   9/16( 56%)  22/36( 61%)