lan_saa9730.c

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/************************************************************************
 *
 *      LAN_SAA9730.c
 *
 *      The 'LAN_SAA9730' module implements the LAN_SAA9730 
 *      device driver as an IO device with following services:
 *
 *        1) init  serial device:  configure and initialize LAN 
 *                                 SAA9730 driver
 *        2) open  serial device:  register receive handler
 *        3) close serial device:  not used
 *        4) read  serial device:  poll for received frame
 *        5) write serial device:  request frame to be transmitted
 *        6) ctrl  serial device:  not used
 *
 *
 * ######################################################################
 *
 * mips_start_of_legal_notice
 * 
 * Copyright (c) 2004 MIPS Technologies, Inc. All rights reserved.
 *
 *
 * Unpublished rights (if any) reserved under the copyright laws of the
 * United States of America and other countries.
 *
 * This code is proprietary to MIPS Technologies, Inc. ("MIPS
 * Technologies"). Any copying, reproducing, modifying or use of this code
 * (in whole or in part) that is not expressly permitted in writing by MIPS
 * Technologies or an authorized third party is strictly prohibited. At a
 * minimum, this code is protected under unfair competition and copyright
 * laws. Violations thereof may result in criminal penalties and fines.
 *
 * MIPS Technologies reserves the right to change this code to improve
 * function, design or otherwise. MIPS Technologies does not assume any
 * liability arising out of the application or use of this code, or of any
 * error or omission in such code. Any warranties, whether express,
 * statutory, implied or otherwise, including but not limited to the implied
 * warranties of merchantability or fitness for a particular purpose, are
 * excluded. Except as expressly provided in any written license agreement
 * from MIPS Technologies or an authorized third party, the furnishing of
 * this code does not give recipient any license to any intellectual
 * property rights, including any patent rights, that cover this code.
 *
 * This code shall not be exported, reexported, transferred, or released,
 * directly or indirectly, in violation of the law of any country or
 * international law, regulation, treaty, Executive Order, statute,
 * amendments or supplements thereto. Should a conflict arise regarding the
 * export, reexport, transfer, or release of this code, the laws of the
 * United States of America shall be the governing law.
 *
 * This code constitutes one or more of the following: commercial computer
 * software, commercial computer software documentation or other commercial
 * items. If the user of this code, or any related documentation of any
 * kind, including related technical data or manuals, is an agency,
 * department, or other entity of the United States government
 * ("Government"), the use, duplication, reproduction, release,
 * modification, disclosure, or transfer of this code, or any related
 * documentation of any kind, is restricted in accordance with Federal
 * Acquisition Regulation 12.212 for civilian agencies and Defense Federal
 * Acquisition Regulation Supplement 227.7202 for military agencies. The use
 * of this code by the Government is further restricted in accordance with
 * the terms of the license agreement(s) and/or applicable contract terms
 * and conditions covering this code from MIPS Technologies or an authorized
 * third party.
 *
 *
 *
 * 
 * mips_end_of_legal_notice
 * 
 *
 ************************************************************************/




/************************************************************************
 *      Include files
 ************************************************************************/

#include <string.h>
#include <stdio.h>
#include <sysdefs.h>
#include <syserror.h>
#include <sysdev.h>
#include <io_api.h>
#include <syscon_api.h>
#include <sys_api.h>
#include <lan_api.h>
#include <lan_saa9730_api.h>


/* #define  ETH_DEBUG 1 */
/************************************************************************
 *  Constant Definitions
*************************************************************************/

typedef enum
{
    LAN_MINOR_SAA9730_DEVICE_1 = 0,    /* The one and only SAA9730
		                                  LAN controller               */

	/******* ADD NEW MINOR DEVICES JUST BEFORE THIS LINE ONLY ********/

    LAN_MINOR_SAA9730_DEVICES
} t_LAN_MINOR_SAA9730_devices ;


/* PHY definitions for Basic registers QS6612 */

#define PHY_CONTROL                     0
#define PHY_STATUS                      1
#define PHY_REG31                       31

#define PHY_CONTROL_RESET               (1 << 15)
#define PHY_CONTROL_AUTO_NEG            (1 << 12)
#define PHY_CONTROL_RESTART_AUTO_NEG    (1 <<  9)

#define PHY_STATUS_LINK_UP              (1 << 2)

#define PHY_REG31_OPMODE_SHF             2
#define PHY_REG31_OPMODE_MSK             (7 << PHY_REG31_OPMODE_SHF)
#define OPMODE_AUTONEGOTIATE             0
#define OPMODE_10BASET_HALFDUPLEX        1
#define OPMODE_100BASEX_HALFDUPLEX       2
#define OPMODE_REPEATER_MODE             3
#define OPMODE_UNDEFINED                 4
#define OPMODE_10BASET_FULLDUPLEX        5
#define OPMODE_100BASEX_FULLDUPLEX       6
#define OPMODE_ISOLATE                   7

#define LAN_SAA9730_MD_CA_BUSY          (1 << 11)
#define LAN_SAA9730_MD_CA_WRITE         (1 << 10)


#define PHY_ADDRESS                     QS6612_PHY_ADDRESS
#define QS6612_PHY_ADDRESS              0


/* Number of 6-byte entries in the CAM */
#define LAN_SAA9730_CAM_ENTRIES                       10
#define	LAN_SAA9730_CAM_DWORDS                        15

/* TX and RX packet size: fixed to 2048 bytes,
   according to HW requirements                                        */
#define LAN_SAA9730_PACKET_SIZE                       2048

/* 
   Number of TX buffers = number of RX buffers = 2,
   which is fixed according to HW requirements                         */
#define LAN_SAA9730_BUFFERS                           2

/* 
   Number of RX packets per RX buffer                                  */
#define LAN_SAA9730_RCV_Q_SIZE                        16

/* 
   Number of TX packets per TX buffer                                  */
#define LAN_SAA9730_TXM_Q_SIZE                        1


/* Minimum pcket size */
#define LAN_SAA9730_MIN_PACKET_SIZE                   60

/* owner ship bit */
#define LAN_SAA9730_BLOCK_OWNED_BY_SYSTEM             0
#define LAN_SAA9730_BLOCK_OWNED_BY_HARDWARE           1

/* Default Rcv interrupt count */
#define LAN_SAA9730_DEFAULT_RCV_INTERRUPT_CNT         4

/* Default maxium transmit retry */
#define LAN_SAA9730_DEFAULT_MAX_TXM_RETRY	      16

/* Default time out value */
#define LAN_SAA9730_DEFAULT_TIME_OUT_CNT              200

/* MAX map registers */
#define LAN_SAA9730__MAX_MAP_REGISTERS		      64

/* Defines used by Interrupt code */
#define  LAN_SAA9730_DMA_PACKET_SIZE                  2048
#define  LAN_SAA9730_VALID_PACKET                     0xC0000000
#define  LAN_SAA9730_FRAME_TYPELEN_OFFSET             12
#define  LAN_SAA9730_ETH_MIN_FRAME_SIZE               60
#define  LAN_SAA9730_DEST_ADDR_SIZE                   6
#define  LAN_SAA9730_SRC_ADDR_SIZE                    6
#define  LAN_SAA9730_TYPE_LEN_SIZE                    2

/* MAC receive error */
#define  LAN_SAA9730_MAC_GOOD_RX                      (0x00004000) << 11
#define  LAN_SAA9730_MAC_RCV_ALIGN_ERROR              (0x00000100) << 11
#define  LAN_SAA9730_MAC_RCV_CRC_ERROR                (0x00000200) << 11
#define  LAN_SAA9730_MAC_RCV_OVERFLOW                 (0x00000400) << 11

/* This number is arbitrary and can be increased if needed */
#define LAN_SAA9730_MAX_MULTICAST_ADDRESSES           20 

/************************************************************************
 *  Macro Definitions
*************************************************************************/


#define IF_ERROR( completion, function )  \
{ \
  completion = function ; \
  if ( completion != OK )  \
{ \
    return( completion ) ; \
} \
}

// These macros are machine dependent.  
// They convert the big endian representation to the little endian
// format, used by the DMA-engine of the LAN-controller on the PCI-bus.
// Convert by BE:
#ifdef EL
#define cpu_to_le32( value ) (value)
#define le32_to_cpu( value ) (value)
#else
#define cpu_to_le32( value ) ( (                ((UINT32)value)  << 24) |   \
                               ((0x0000FF00UL & ((UINT32)value)) <<  8) |   \
                               ((0x00FF0000UL & ((UINT32)value)) >>  8) |   \
                               (                ((UINT32)value)  >> 24)   )
#define le32_to_cpu( value ) cpu_to_le32( value )
#endif
// Convert by LE:
#ifdef EB
#define cpu_to_be32( value ) (value)
#define be32_to_cpu( value ) (value)
#else
#define cpu_to_be32( value ) ( (                ((UINT32)value)  << 24) |   \
                               ((0x0000FF00UL & ((UINT32)value)) <<  8) |   \
                               ((0x00FF0000UL & ((UINT32)value)) >>  8) |   \
                               (                ((UINT32)value)  >> 24)   )
#define be32_to_cpu( value ) cpu_to_be32( value )
#endif

/************************************************************************
 *  Type Definitions
*************************************************************************/



/*
 *      Network device statistics. 
 */
typedef struct net_device_stats
{
        unsigned long   rx_packets;             /* total packets received       */
        unsigned long   tx_packets;             /* total packets transmitted    */
        unsigned long   rx_bytes;               /* total bytes received         */
        unsigned long   tx_bytes;               /* total bytes transmitted      */
        unsigned long   rx_errors;              /* bad packets received         */
        unsigned long   tx_errors;              /* packet transmit problems     */
        unsigned long   multicast;              /* multicast packets received   */
        unsigned long   collisions;

        /* detailed rx_errors: */
        unsigned long   rx_zero_length_errors;
        unsigned long   rx_buffer_length_errors;
        unsigned long   rx_length_errors;
        unsigned long   rx_crc_errors;          /* recved pkt with crc error    */
        unsigned long   rx_frame_errors;        /* recv'd frame alignment error */
        unsigned long   rx_fifo_errors;         /* recv'r fifo overrun          */

        /* detailed tx_errors */
        unsigned long   tx_aborted_errors;
        unsigned long   tx_carrier_errors;
        unsigned long   tx_fifo_errors;
        unsigned long   tx_heartbeat_errors;
        unsigned long   tx_window_errors;
        unsigned long   tx_timeout_errors;

} t_net_device_stats ;


/*
   Device context for a SAA9730 LAN controller 
                                                                        */
typedef struct LAN_SAA9730_device
{
	/* pointer for the SAA9730 LAN controller register set */
	UINT32                     *p9730Regs;

	/*  TRUE if the next buffer to write is RxBuffA,  FALSE if RxBuffB. */
	UINT8                      NextRcvToUseIsA;

	/* Rcv buffer Index */
	UINT8                      NextRcvPacketIndex;

	/* index of next packet to use in that buffer */
	UINT8                      NextTxmPacketIndex;	

	/* Tx buffer index */
	UINT8                      NextTxmBufferIndex;

	UINT8                      RcvAIndex; /* index into RcvBufferSpace[] for Blk A */
	UINT8                      RcvBIndex; /* index into RcvBufferSpace[] for Blk B */

	UINT32                     TxmBuffer[LAN_SAA9730_BUFFERS][LAN_SAA9730_TXM_Q_SIZE];
	UINT32                     RcvBuffer[LAN_SAA9730_BUFFERS][LAN_SAA9730_RCV_Q_SIZE];

	UINT16                     PhysicalAddress[LAN_SAA9730_CAM_ENTRIES][3];

        /* network statistics */
        t_net_device_stats         status ;

} t_LAN_SAA9730_device ;


/************************************************************************
 *  LAN SAA9730: Relative Register Addresses
*************************************************************************/


#define LAN_TXBUFA_OFS          0x20400 /* TX buffer A register         */
#define LAN_TXBUFB_OFS          0x20404 /* TX buffer B register         */
#define LAN_RXBUFA_OFS          0x20408 /* RX buffer A register         */
#define LAN_RXBUFB_OFS          0x2040C /* RX buffer B register         */
#define LAN_PCKCNT_OFS          0x20410 /* Packet count register        */
#define LAN_OK2USE_OFS          0x20414 /* OK-to-use register           */
#define LAN_DMACTL_OFS          0x20418 /* DMA control register         */
#define LAN_TIMOUT_OFS          0x2041C /* Time out register            */
#define LAN_DMASTA_OFS          0x20420 /* DMA status register          */
#define LAN_DMATST_OFS          0x20424 /* DMA loop back register       */
#define LAN_PAUSE_OFS           0x20430 /* Pause count register         */
#define LAN_REMPAUSE_OFS        0x20434 /* Remote Pause count register  */
#define LAN_MACCTL_OFS          0x20440 /* MAC control register         */
#define LAN_CAMCTL_OFS          0x20444 /* CAM control register         */
#define LAN_TXCTL_OFS           0x20448 /* TX control register          */
#define LAN_TXSTA_OFS           0x2044C /* TX status register           */
#define LAN_RXCTL_OFS           0x20450 /* RX control register          */
#define LAN_RXSTA_OFS           0x20454 /* RX status register           */
#define LAN_MDDATA_OFS          0x20458 /* PHY management data register */
#define LAN_MDCTL_OFS           0x2045C /* PHY management control reg.  */
#define LAN_CAMADR_OFS          0x20460 /* CAM address register         */
#define LAN_CAMDAT_OFS          0x20464 /* CAM data register            */
#define LAN_CAMENA_OFS          0x20468 /* CAM enable register          */

#define LAN_DBGRXS_OFS          0x20508 /* DEBUG: RX-state machine      */

/************************************************************************
 *  LAN SAA9730: Register field encodings
*************************************************************************/



/******** reg: TXBUFA ********/

/* field: BUF */
#define LAN_TXBUFA_BUF_SHF              11
#define LAN_TXBUFA_BUF_MSK              (MSK(21) << LAN_TXBUFA_BUF_SHF)


/******** reg: TXBUFB ********/

/* field: BUF */
#define LAN_TXBUFB_BUF_SHF              11
#define LAN_TXBUFB_BUF_MSK              (MSK(21) << LAN_TXBUFB_BUF_SHF)


/******** reg: RXBUFB ********/

/* field: BUF */
#define LAN_RXBUFB_BUF_SHF              11
#define LAN_RXBUFB_BUF_MSK              (MSK(21) << LAN_RXBUFB_BUF_SHF)


/******** reg: RXBUFB ********/

/* field: BUF */
#define LAN_RXBUFB_BUF_SHF              11
#define LAN_RXBUFB_BUF_MSK              (MSK(21) << LAN_RXBUFB_BUF_SHF)


/******** reg: PCKCNT ********/

/* field: TXA */
#define LAN_PCKCNT_TXA_SHF              24
#define LAN_PCKCNT_TXA_MSK              (MSK(8) << LAN_PCKCNT_TXA_SHF)

/* field: TXB */
#define LAN_PCKCNT_TXB_SHF              16
#define LAN_PCKCNT_TXB_MSK              (MSK(8) << LAN_PCKCNT_TXB_SHF)

/* field: RXA */
#define LAN_PCKCNT_RXA_SHF              8
#define LAN_PCKCNT_RXA_MSK              (MSK(8) << LAN_PCKCNT_RXA_SHF)

/* field: RXB */
#define LAN_PCKCNT_RXB_SHF              0
#define LAN_PCKCNT_RXB_MSK              (MSK(8) << LAN_PCKCNT_RXB_SHF)