bonito64_core.s

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/************************************************************************
 *
 *  bonito64_core.S
 *
 *  Bonito64 specific functions
 *
 * ######################################################################
 *
 * mips_start_of_legal_notice
 * 
 * Copyright (c) 2004 MIPS Technologies, Inc. All rights reserved.
 *
 *
 * Unpublished rights (if any) reserved under the copyright laws of the
 * United States of America and other countries.
 *
 * This code is proprietary to MIPS Technologies, Inc. ("MIPS
 * Technologies"). Any copying, reproducing, modifying or use of this code
 * (in whole or in part) that is not expressly permitted in writing by MIPS
 * Technologies or an authorized third party is strictly prohibited. At a
 * minimum, this code is protected under unfair competition and copyright
 * laws. Violations thereof may result in criminal penalties and fines.
 *
 * MIPS Technologies reserves the right to change this code to improve
 * function, design or otherwise. MIPS Technologies does not assume any
 * liability arising out of the application or use of this code, or of any
 * error or omission in such code. Any warranties, whether express,
 * statutory, implied or otherwise, including but not limited to the implied
 * warranties of merchantability or fitness for a particular purpose, are
 * excluded. Except as expressly provided in any written license agreement
 * from MIPS Technologies or an authorized third party, the furnishing of
 * this code does not give recipient any license to any intellectual
 * property rights, including any patent rights, that cover this code.
 *
 * This code shall not be exported, reexported, transferred, or released,
 * directly or indirectly, in violation of the law of any country or
 * international law, regulation, treaty, Executive Order, statute,
 * amendments or supplements thereto. Should a conflict arise regarding the
 * export, reexport, transfer, or release of this code, the laws of the
 * United States of America shall be the governing law.
 *
 * This code constitutes one or more of the following: commercial computer
 * software, commercial computer software documentation or other commercial
 * items. If the user of this code, or any related documentation of any
 * kind, including related technical data or manuals, is an agency,
 * department, or other entity of the United States government
 * ("Government"), the use, duplication, reproduction, release,
 * modification, disclosure, or transfer of this code, or any related
 * documentation of any kind, is restricted in accordance with Federal
 * Acquisition Regulation 12.212 for civilian agencies and Defense Federal
 * Acquisition Regulation Supplement 227.7202 for military agencies. The use
 * of this code by the Government is further restricted in accordance with
 * the terms of the license agreement(s) and/or applicable contract terms
 * and conditions covering this code from MIPS Technologies or an authorized
 * third party.
 *
 *
 *
 * 
 * mips_end_of_legal_notice
 * 
 *
 ************************************************************************/

/************************************************************************
 *  Include files
 ************************************************************************/
	
#include <sysdefs.h>
#include <mips.h>
#include <init.h>
#include <spd.h>
#include <pci_api.h>
#include <pci.h>     
#include <core_bonito64.h>
#include <bonito64.h>

/************************************************************************
 *  Definitions
 ************************************************************************/

/************************************************************************
 *  Public variables
 ************************************************************************/

/************************************************************************
 *  Static variables
 ************************************************************************/

/************************************************************************
 *  Implementation : Public functions
 ************************************************************************/
	
	.set noreorder


/************************************************************************	
 *
 *                          bonito64_write_sdcfg
 *  Description :
 *  -------------
 *  Write data to SDCFG register.
 *
 *  Note :
 *  ------
 *  This routine is called also via sys_func_noram() in module sys.c
 *  and must obey c calling conventions.
 *
 *  Parameters :
 *  ------------
 *  a0 = data to be written.
 *
 *  Return values :
 *  ---------------
 *  0
 *
 ************************************************************************/
LEAF(bonito64_write_sdcfg)

	/* Flush all RAM accesses */	
	sync
	lw	t0,   KSEG1(0)
	move	zero, t0

	/* SDCFG register address */
	li	t3, KSEG1(BONITO_REG_BASE)

	/* Prepare data to write */
	li	t1, BONITO_SDCFG_DRAMMODESET;
	or	t1, a0

	/* Write data to SDCFG */
	sw	t1, BONITO_SDCFG(t3)

	/* Poll for done */
	li	t2, BONITO_SDCFG_DRAMMODESET_DONE
1:		
	lw	t1, BONITO_SDCFG(t3)
	and	t1, t2
	beq	t1, zero, 1b
	nop

	/* Write the data again, but without setting the MODESET request */
	sw	a0, BONITO_SDCFG(t3)

	/* Flush */
	lw	t1, BONITO_SDCFG(t3)
	sync

	/* Done */
	jr	ra
	move    v0, zero

END(bonito64_write_sdcfg)


/************************************************************************	
 *
 *                          bonito64_write_iodevcfg
 *  Description :
 *  -------------
 *  Write data to IODEVCFG register.
 *
 *  Note :
 *  ------
 *  This routine is called only via sys_func_noram() in module sys.c
 *  and must obey c calling conventions.
 *
 *  Parameters :
 *  ------------
 *  a0 = data to be written.
 *
 *  Return values :
 *  ---------------
 *  0
 *
 ************************************************************************/
LEAF(bonito64_write_iodevcfg)

	/* Flush all RAM accesses */	
	sync
	lw	t0,   KSEG1(0)
	move	zero, t0

	/* IODEVCFG register address */
	li	t3, KSEG1(BONITO_REG_BASE)

	/* Write data to SDCFG */
	sw	a0, BONITO_IODEVCFG(t3)

	/* Done */
	jr	ra
	move    v0, zero

END(bonito64_write_iodevcfg)




/************************************************************************	
 *		access_bonito64
 *	Common function calling conventions, see init_core.S
 ************************************************************************/


LEAF(access_bonito64)
	
        li      t8, FUNC_INIT
	beql    t9, t8, bonito64_init
	move	a1, zero /* 0 => CoreBonito64, 1 => Core20K */

        li      t8, FUNC_GET_PCIMEM_BASE
	beq     t9, t8, bonito64_get_pcimem_base
	nop

        li      t8, FUNC_CONFIG_WRITE
	beq     t9, t8, bonito64_config_write
	nop

        li      t8, FUNC_CONFIGURE_SDRAM
	beql    t9, t8, bonito64_configure_sdram
	move	a3, zero /* 0 => CoreBonito64, 1 => Core20K */	

        li      t8, FUNC_SETUP_DECODE
	beq     t9, t8, bonito64_setup_decode
	nop

        /* FUNC_REMAP_PCI_IO */
	j	bonito64_remap_pci_io
	nop
END(access_bonito64)


/************************************************************************	
 *		access_core_20k
 *	Common function calling conventions, see init_core.S
 ************************************************************************/

LEAF(access_core_20k)
	
        li      t8, FUNC_INIT
	beql    t9, t8, bonito64_init
	li      a1, 1 /* 0 => CoreBonito64, 1 => Core20K */

        li      t8, FUNC_GET_PCIMEM_BASE
	beq     t9, t8, bonito64_get_pcimem_base
	nop

        li      t8, FUNC_CONFIG_WRITE
	beq     t9, t8, bonito64_config_write
	nop

        li      t8, FUNC_CONFIGURE_SDRAM
	beql    t9, t8, bonito64_configure_sdram
	li      a3, 1 /* 0 => CoreBonito64, 1 => Core20K */

        li      t8, FUNC_SETUP_DECODE
	beq     t9, t8, bonito64_setup_decode
	nop

        /* FUNC_REMAP_PCI_IO */
	j	bonito64_remap_pci_io
	nop
END(access_core_20k)


/************************************************************************
 *  Implementation : Static functions
 ************************************************************************/




/************************************************************************	
 *
 *                          bonito64_init
 *  Description :
 *  -------------
 *
 *  Initialise Bonito64 just enough so that we can access PCI.
 *
 *  Parameters :
 *  ------------
 *
 *  a0 = Base address to be used for access to North Bridge registers.
 *  (a0 is ignored since this is not configurable for Bonito64)
 *
 *  a1 = 0 => CoreBonito64
 *  a1 = 1 => Core20K
 *
 *  Return values :
 *  ---------------
 *
 *  v0 = error code (0 = OK)
 *  v1 = 1 -> Request software reset
 *
 ************************************************************************/
SLEAF(bonito64_init)

        /*  We need to determine if we arrived here due to either :
	 *
	 *  1) A hardware or software reset.
	 *  2) Due to a "go bfc00000" command or under EJTAG control.
	 *
	 *  In case 2, we issue a software reset. We need to do
	 *  this since some devices will not otherwise be properly
	 *  reset.
	 *
	 *  We detect case 2 by checking if the Bonito64 PCI configuration
	 *  space COMMAND register has the "Memory Space Control" bit
	 *  set. This is NOT the case after a hardware or software reset, 
	 *  but IS otherwise the case since it is set below.
	 */
	
	li      t3, KSEG1(BONITO_REG_BASE)
	lw      t1, BONITO_PCICMD(t3)
	and	t1, PCI_SC_CMD_MS_BIT
	beq	t1, zero, 1f
	nop

	/* Request software reset */
	li	v1, 1
	jr	ra
	nop

1:

        /* Setup Bonito64 to have Master capability */
	li	t1, (PCI_SC_CMD_MS_BIT   | PCI_SC_CMD_BM_BIT     | \
		     PCI_SC_CMD_PERR_BIT | PCI_SC_CMD_SERR_BIT )
	sw	t1, BONITO_PCICMD(t3)

        /* Setup Bonito64 PCI latency timer */
	li	t1, PCI_LATTIM_FIXED << BONITO_PCILTIMER_BUSLATENCY_SHIFT
	sw	t1, BONITO_PCILTIMER(t3)

	/* Setup PCI_Lo0,1,2 to map transparently */
	li      t1,\
          BONITO_PCIMAP_WIN(0, BONITO_PCILO_BASE)			   |\
	  BONITO_PCIMAP_WIN(1, BONITO_PCILO_BASE + BONITO_PCIMAP_WINSIZE)  |\
	  BONITO_PCIMAP_WIN(2, BONITO_PCILO_BASE + 2*BONITO_PCIMAP_WINSIZE)
	sw	t1, BONITO_PCIMAP(t3)

	/* Core20K (ie 20Kc CPU) vs CoreBonito64 (ie QED CPU) */
        beq     a1, zero, 1f
	nop

	/* Core20K, setup sequential burstorder */
	lw	t1, BONITO_BONPONCFG(t3)
	li	t2, BONITO_BONPONCFG_BURSTORDER
	or	t1, t2
	sw	t1, BONITO_BONPONCFG(t3)
	b	2f
	nop
1:
	/* CoreBonito64, setup subblock transfer */
	lw	t1, BONITO_BONPONCFG(t3)
	li	t2, ~BONITO_BONPONCFG_BURSTORDER
	and	t1, t2
	sw	t1, BONITO_BONPONCFG(t3)
2:
	/* Done */
	move	v0, zero
	jr	ra
	move	v1, zero

END(bonito64_init)


/************************************************************************	
 *
 *                          bonito64_get_pcimem_base
 *  Description :
 *  -------------
 *
 *  Return base address for PCI memory cycles.
 *
 *  Parameters :
 *  ------------
 * 
 *  None
 *
 *  Return values :
 *  ---------------
 *
 *  v0 = Base address for PCI memory cycles
 *
 ************************************************************************/
SLEAF(bonito64_get_pcimem_base)

	li	v0, BONITO_PCILO_BASE
	jr	ra
	nop