atlas.h
来自「MIPS YAMON, a famous monitor inc. source」· C头文件 代码 · 共 602 行 · 第 1/2 页
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602 行
/************************************************************************ * * ATLAS.h * * The 'ATLAS' module defines the ATLAS board specific * address-MAP, registers, etc. * * * ###################################################################### * * mips_start_of_legal_notice * * Copyright (c) 2004 MIPS Technologies, Inc. All rights reserved. * * * Unpublished rights (if any) reserved under the copyright laws of the * United States of America and other countries. * * This code is proprietary to MIPS Technologies, Inc. ("MIPS * Technologies"). Any copying, reproducing, modifying or use of this code * (in whole or in part) that is not expressly permitted in writing by MIPS * Technologies or an authorized third party is strictly prohibited. At a * minimum, this code is protected under unfair competition and copyright * laws. Violations thereof may result in criminal penalties and fines. * * MIPS Technologies reserves the right to change this code to improve * function, design or otherwise. MIPS Technologies does not assume any * liability arising out of the application or use of this code, or of any * error or omission in such code. Any warranties, whether express, * statutory, implied or otherwise, including but not limited to the implied * warranties of merchantability or fitness for a particular purpose, are * excluded. Except as expressly provided in any written license agreement * from MIPS Technologies or an authorized third party, the furnishing of * this code does not give recipient any license to any intellectual * property rights, including any patent rights, that cover this code. * * This code shall not be exported, reexported, transferred, or released, * directly or indirectly, in violation of the law of any country or * international law, regulation, treaty, Executive Order, statute, * amendments or supplements thereto. Should a conflict arise regarding the * export, reexport, transfer, or release of this code, the laws of the * United States of America shall be the governing law. * * This code constitutes one or more of the following: commercial computer * software, commercial computer software documentation or other commercial * items. If the user of this code, or any related documentation of any * kind, including related technical data or manuals, is an agency, * department, or other entity of the United States government * ("Government"), the use, duplication, reproduction, release, * modification, disclosure, or transfer of this code, or any related * documentation of any kind, is restricted in accordance with Federal * Acquisition Regulation 12.212 for civilian agencies and Defense Federal * Acquisition Regulation Supplement 227.7202 for military agencies. The use * of this code by the Government is further restricted in accordance with * the terms of the license agreement(s) and/or applicable contract terms * and conditions covering this code from MIPS Technologies or an authorized * third party. * * * * * mips_end_of_legal_notice * * ************************************************************************/#ifndef ATLAS_H#define ATLAS_H/************************************************************************ * Note: all addresses are physical ! * Must be mapped into kseg0 (system RAM) or kseg1 (registers, devices)*************************************************************************//************************************************************************ * Include files ************************************************************************/#include <sysdefs.h>#include <mips.h>#include <pci_api.h>/************************************************************************ * ATLAS, EEPROM devices, IIC-slaveadresses*************************************************************************/#define ATLAS_EEPROM_IICADR_SN 0x54 /* NM24C09, 1024 bytes */#define ATLAS_EEPROM_IICADR_SPD000 0x50 /* PC-SDRAM, 256 bytes *//************************************************************************ * ATLAS, IIC-bus frequencies for the SAA9730 controller*************************************************************************/#define ATLAS_IICFREQ_5156HZ 0x05#define ATLAS_IICFREQ_10312HZ 0x01#define ATLAS_IICFREQ_68750HZ 0x04#define ATLAS_IICFREQ_103125HZ 0x06#define ATLAS_IICFREQ_275000HZ 0x00#define ATLAS_IICFREQ_412500HZ 0x02/************************************************************************ * ATLAS physical address MAP (512 MByte)*************************************************************************/#define ATLAS_SYSTEMRAM_BASE 0x00000000 /* System RAM: */#define ATLAS_SYSTEMRAM_SIZE 0x10000000 /* 256 MByte *//* The following 6 definitions are used with Galileo 64120 only */#define ATLAS_PCIMEM1_BASE 0x10000000 /* PCI 1 memory: */#define ATLAS_PCIMEM1_SIZE 0x0be00000 /* 128+2+60 MByte */ /* the 2 MByte constitutes a "red page" (PCIMEM2) */#define ATLAS_PCIMEM2_BASE 0x18000000 /* PCI 2 memory */#define ATLAS_PCIMEM2_SIZE 0x00200000 /* 2 MByte */#define ATLAS_CORECTRL_BASE 0x1BE00000 /* Core control: */#define ATLAS_CORECTRL_SIZE 0x00200000 /* 2 MByte */#define ATLAS_SYSTEMFLASH_BASE 0x1C000000 /* System Flash: */#define ATLAS_SYSTEMFLASH_SIZE 0x02000000 /* 32 MByte */#define ATLAS_SYSTEMFLASH_SECTORSIZE 0x00020000 /* Sect. = 128 KB */#define ATLAS_SYSTEMFLASH_BANKCOUNT 2 /* */#define ATLAS_SYSTEMFLASH_BLOCKCOUNT 64 /* */#define ATLAS_MONITORFLASH_BASE 0x1E000000 /* Monitor Flash: */#define ATLAS_MONITORFLASH_SIZE 0x003E0000 /* 4 MByte */#define ATLAS_MONITORFLASH_SECTORSIZE 0x00010000 /* Sect. = 64 KB */#define ATLAS_RESERVED_BASE 0x1E400000 /* Reserved: */#define ATLAS_RESERVED_SIZE 0x00C00000 /* 12 MByte */#define ATLAS_FPGA_BASE 0x1F000000 /* FPGA: */#define ATLAS_FPGA_SIZE 0x00C00000 /* 12 MByte */#define ATLAS_BOOTROM_BASE 0x1FC00000 /* Boot ROM: */#define ATLAS_BOOTROM_SIZE 0x00400000 /* 4 MByte *//************************************************************************ * Use of PCI ranges (Memory vs I/O)*************************************************************************/#define ATLAS_PCI_MEM_BASE ATLAS_PCIMEM1_BASE#define ATLAS_PCI_MEM_SIZE ATLAS_PCIMEM1_SIZE#define ATLAS_PCI_IO_BASE ATLAS_PCIMEM2_BASE#define ATLAS_PCI_IO_SIZE ATLAS_PCIMEM2_SIZE/************************************************************************ * ATLAS FILEFLASH: upper 128 KByte (2x64 KByte sectors) of MONITORFLASH*************************************************************************/#define ATLAS_FILEFLASH_BASE 0x1E3E0000 /* File Flash: */#define ATLAS_FILEFLASH_SIZE 0x00020000 /* 128 KByte */#define ATLAS_FILEFLASH_SECTORSIZE 0x00010000 /* Sect. = 64 KB *//************************************************************************ * ATLAS, devices, base adresses:*************************************************************************/#define ATLAS_ICTA_BASE 0x1F000000 /* FPGA, Int. ctrl, ref. 'icta.h' */#define ATLAS_TMRA_BASE 0x1F000300 /* FPGA, Timer device, ref. 'tmra.h' */#define ATLAS_TI16C550_BASE 0x1F000900 /* TI16C550 UART, upper connector *//************************************************************************ * ATLAS FPGA, register address map:*************************************************************************//************************************************************************ * REVISION: MUST BE FIXED TO 0x1FC00010 on any baseboard*************************************************************************//************************************************************************ * Register Addresses*************************************************************************/#define ATLAS_REVISION 0x1FC00010 /* REVISION *//************************************************************************ * Register field encodings*************************************************************************//******** reg: REVISION ********//* field: FPGRV */#define ATLAS_REVISION_FPGRV_SHF 16#define ATLAS_REVISION_FPGRV_MSK (MSK(8) << ATLAS_REVISION_FPGRV_SHF)/* field: CORID */#define ATLAS_REVISION_CORID_SHF 10#define ATLAS_REVISION_CORID_MSK (MSK(6) << ATLAS_REVISION_CORID_SHF)/* field: CORRV */#define ATLAS_REVISION_CORRV_SHF 8#define ATLAS_REVISION_CORRV_MSK (MSK(2) << ATLAS_REVISION_CORRV_SHF)/* field: PROID */#define ATLAS_REVISION_PROID_SHF 4#define ATLAS_REVISION_PROID_MSK (MSK(4) << ATLAS_REVISION_PROID_SHF)/* field: PRORV */#define ATLAS_REVISION_PRORV_SHF 0#define ATLAS_REVISION_PRORV_MSK (MSK(4) << ATLAS_REVISION_PRORV_SHF)/************************************************************************ * HWINTACK: *************************************************************************//************************************************************************ * Register Addresses*************************************************************************/#define ATLAS_HWINTACK 0x1F000100 /* HWINTACK *//************************************************************************ * Register field encodings*************************************************************************//******** reg: HWINTACK ********//* bit 1: ACKDEG */#define ATLAS_HWINTACK_ACKDEG_SHF 1#define ATLAS_HWINTACK_ACKDEG_MSK (MSK(1) << ATLAS_HWINTACK_ACKDEG_SHF)#define ATLAS_HWINTACK_ACKDEG_SET ATLAS_HWINTACK_ACKDEG_MSK/************************************************************************ * NMISTATUS: *************************************************************************//************************************************************************ * Register Addresses*************************************************************************/#define ATLAS_NMISTATUS 0x1F000024 /* NMISTATUS *//************************************************************************ * Register field encodings*************************************************************************//******** reg: NMISTATUS ********//* bit 0: NMISTATUS */#define ATLAS_NMISTATUS_ONNMI_SHF 0#define ATLAS_NMISTATUS_ONNMI_MSK (MSK(1) << ATLAS_NMISTATUS_ONNMI_SHF)#define ATLAS_NMISTATUS_ONNMI_BIT ATLAS_NMISTATUS_ONNMI_MSK /************************************************************************ * NMIACK:*************************************************************************//************************************************************************ * Register Addresses*************************************************************************/#define ATLAS_NMIACK 0x1F000104 /* NMIACK *//************************************************************************ * Register field encodings*************************************************************************//******** reg: NMIACK ********//* bit 0: NMI */#define ATLAS_NMIACK_ONNMI_SHF 0#define ATLAS_NMIACK_ONNMI_MSK (MSK(1) << ATLAS_NMIACK_ONNMI_SHF)#define ATLAS_NMIACK_ONNMI_BIT ATLAS_NMIACK_ONNMI_MSK/************************************************************************ * SWITCHES / STATUS: *************************************************************************//************************************************************************ * Register Addresses*************************************************************************/#define ATLAS_SWVALUE 0x1F000200 /* SWVALUE */#define ATLAS_STATUS 0x1F000208 /* STATUS */#define ATLAS_JMPRS 0x1F000210 /* JMPRS */
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