📄 bonito64.h
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/* * Bonito Register Map * Copyright (c) 1999 Algorithmics Ltd * * Algorithmics gives permission for anyone to use and modify this file * without any obligation or license condition except that you retain * this copyright message in any source redistribution in whole or part. * * Updated copies of this and other files can be found at * ftp://ftp.algor.co.uk/pub/bonito/ * * Users of the Bonito controller are warmly recommended to contribute * any useful changes back to Algorithmics (mail to * bonito@algor.co.uk). *//* MIPS Technologies, Inc. has made modifications to the * original Algorithmics Ltd. version of this file. Use of the MIPS * Technologies modifications is subject to the MIPS Technologies Yamon * Software License Agreement. *//* Revision 1.48 autogenerated on 08/17/99 15:20:01 *//* This bonito64 version editted from bonito.h Revision 1.48 on 11/09/00 */#ifndef _BONITO_H_#ifdef _ASSEMBLER_/* offsets from base register */#define BONITO(x) (x)#else /* !__ASSEMBLER *//* offsets from base pointer, this construct allows optimisation *//* static char * const _bonito = PA_TO_KVA1(BONITO_BASE); */#define BONITO(x) *(volatile unsigned long *)(_bonito + (x))#endif /* __ASSEMBLER__ */#define BONITO_BOOT_BASE 0x1fc00000#define BONITO_BOOT_SIZE 0x00100000#define BONITO_BOOT_TOP (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1)#define BONITO_FLASH_BASE 0x1c000000#define BONITO_FLASH_SIZE 0x03000000#define BONITO_FLASH_TOP (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1)#define BONITO_SOCKET_BASE 0x1f800000#define BONITO_SOCKET_SIZE 0x00400000#define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1)#define BONITO_REG_BASE 0x1fe00000#define BONITO_REG_SIZE 0x00040000#define BONITO_REG_TOP (BONITO_REG_BASE+BONITO_REG_SIZE-1)#define BONITO_DEV_BASE 0x1ff00000#define BONITO_DEV_SIZE 0x00100000#define BONITO_DEV_TOP (BONITO_DEV_BASE+BONITO_DEV_SIZE-1)#define BONITO_PCILO_BASE 0x10000000#define BONITO_PCILO_SIZE 0x0c000000#define BONITO_PCILO_TOP (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1)#define BONITO_PCILO0_BASE 0x10000000#define BONITO_PCILO1_BASE 0x14000000#define BONITO_PCILO2_BASE 0x18000000#define BONITO_PCIHI_BASE 0x20000000#define BONITO_PCIHI_SIZE 0x20000000#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1)#define BONITO_PCIIO_BASE 0x1fd00000#define BONITO_PCIIO_SIZE 0x00100000#define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1)#define BONITO_PCICFG_BASE 0x1fe80000#define BONITO_PCICFG_SIZE 0x00080000#define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1) /* Bonito Register Bases */#define BONITO_PCICONFIGBASE 0x00#define BONITO_REGBASE 0x100/* PCI Configuration Registers */#define BONITO_PCI_REG(x) BONITO(BONITO_PCICONFIGBASE + (x))#define BONITO_PCIDID BONITO_PCI_REG(0x00)#define BONITO_PCICMD BONITO_PCI_REG(0x04)#define BONITO_PCICLASS BONITO_PCI_REG(0x08)#define BONITO_PCILTIMER BONITO_PCI_REG(0x0c)#define BONITO_PCIBASE0 BONITO_PCI_REG(0x10)#define BONITO_PCIBASE1 BONITO_PCI_REG(0x14)#define BONITO_PCIBASE2 BONITO_PCI_REG(0x18)#define BONITO_PCIEXPRBASE BONITO_PCI_REG(0x30)#define BONITO_PCIINT BONITO_PCI_REG(0x3c)#define BONITO_PCICMD_PERR_CLR 0x80000000#define BONITO_PCICMD_SERR_CLR 0x40000000#define BONITO_PCICMD_MABORT_CLR 0x20000000#define BONITO_PCICMD_MTABORT_CLR 0x10000000#define BONITO_PCICMD_TABORT_CLR 0x08000000#define BONITO_PCICMD_MPERR_CLR 0x01000000#define BONITO_PCICMD_PERRRESPEN 0x00000040#define BONITO_PCICMD_ASTEPEN 0x00000080#define BONITO_PCICMD_SERREN 0x00000100#define BONITO_PCILTIMER_BUSLATENCY 0x0000ff00#define BONITO_PCILTIMER_BUSLATENCY_SHIFT 8/* 1. Bonito h/w Configuration *//* Power on register */#define BONITO_BONPONCFG BONITO(BONITO_REGBASE + 0x00)#define BONITO_BONPONCFG_SYSCONTROLLERRD 0x00040000#define BONITO_BONPONCFG_ROMCS1SAMP 0x00020000#define BONITO_BONPONCFG_ROMCS0SAMP 0x00010000#define BONITO_BONPONCFG_CPUBIGEND 0x00004000/* Added by RPF 11-9-00 */#define BONITO_BONPONCFG_BURSTORDER 0x00001000/* --- */#define BONITO_BONPONCFG_CPUPARITY 0x00002000#define BONITO_BONPONCFG_CPUTYPE 0x00000007#define BONITO_BONPONCFG_CPUTYPE_SHIFT 0#define BONITO_BONPONCFG_PCIRESET_OUT 0x00000008#define BONITO_BONPONCFG_IS_ARBITER 0x00000010#define BONITO_BONPONCFG_ROMBOOT 0x000000c0#define BONITO_BONPONCFG_ROMBOOT_SHIFT 6#define BONITO_BONPONCFG_ROMBOOT_FLASH (0x0<<BONITO_BONPONCFG_ROMBOOT_SHIFT)#define BONITO_BONPONCFG_ROMBOOT_SOCKET (0x1<<BONITO_BONPONCFG_ROMBOOT_SHIFT)#define BONITO_BONPONCFG_ROMBOOT_SDRAM (0x2<<BONITO_BONPONCFG_ROMBOOT_SHIFT)#define BONITO_BONPONCFG_ROMBOOT_CPURESET (0x3<<BONITO_BONPONCFG_ROMBOOT_SHIFT)#define BONITO_BONPONCFG_ROMCS0WIDTH 0x00000100#define BONITO_BONPONCFG_ROMCS1WIDTH 0x00000200#define BONITO_BONPONCFG_ROMCS0FAST 0x00000400#define BONITO_BONPONCFG_ROMCS1FAST 0x00000800#define BONITO_BONPONCFG_CONFIG_DIS 0x00000020/* Other Bonito configuration */#define BONITO_BONGENCFG_OFFSET 0x4#define BONITO_BONGENCFG BONITO(BONITO_REGBASE + BONITO_BONGENCFG_OFFSET)#define BONITO_BONGENCFG_DEBUGMODE 0x00000001#define BONITO_BONGENCFG_SNOOPEN 0x00000002#define BONITO_BONGENCFG_CPUSELFRESET 0x00000004#define BONITO_BONGENCFG_FORCE_IRQA 0x00000008#define BONITO_BONGENCFG_IRQA_ISOUT 0x00000010#define BONITO_BONGENCFG_IRQA_FROM_INT1 0x00000020#define BONITO_BONGENCFG_BYTESWAP 0x00000040#define BONITO_BONGENCFG_UNCACHED 0x00000080#define BONITO_BONGENCFG_PREFETCHEN 0x00000100#define BONITO_BONGENCFG_WBEHINDEN 0x00000200#define BONITO_BONGENCFG_CACHEALG 0x00000c00#define BONITO_BONGENCFG_CACHEALG_SHIFT 10#define BONITO_BONGENCFG_PCIQUEUE 0x00001000#define BONITO_BONGENCFG_CACHESTOP 0x00002000#define BONITO_BONGENCFG_MSTRBYTESWAP 0x00004000#define BONITO_BONGENCFG_BUSERREN 0x00008000#define BONITO_BONGENCFG_NORETRYTIMEOUT 0x00010000#define BONITO_BONGENCFG_SHORTCOPYTIMEOUT 0x00020000/* 2. IO & IDE configuration */#define BONITO_IODEVCFG BONITO(BONITO_REGBASE + 0x08)/* 3. IO & IDE configuration */#define BONITO_SDCFG BONITO(BONITO_REGBASE + 0x0c)/* 4. PCI address map control */#define BONITO_PCIMAP BONITO(BONITO_REGBASE + 0x10)#define BONITO_PCIMEMBASECFG BONITO(BONITO_REGBASE + 0x14)#define BONITO_PCIMAP_CFG BONITO(BONITO_REGBASE + 0x18)/* 5. ICU & GPIO regs */ /* GPIO Regs - r/w */#define BONITO_GPIODATA_OFFSET 0x1c#define BONITO_GPIODATA BONITO(BONITO_REGBASE + BONITO_GPIODATA_OFFSET)#define BONITO_GPIOIE BONITO(BONITO_REGBASE + 0x20)/* ICU Configuration Regs - r/w */#define BONITO_INTEDGE BONITO(BONITO_REGBASE + 0x24)#define BONITO_INTSTEER BONITO(BONITO_REGBASE + 0x28)#define BONITO_INTPOL BONITO(BONITO_REGBASE + 0x2c)/* ICU Enable Regs - IntEn & IntISR are r/o. */#define BONITO_INTENSET BONITO(BONITO_REGBASE + 0x30)#define BONITO_INTENCLR BONITO(BONITO_REGBASE + 0x34)#define BONITO_INTEN BONITO(BONITO_REGBASE + 0x38)#define BONITO_INTISR BONITO(BONITO_REGBASE + 0x3c)/* PCI mail boxes */#define BONITO_PCIMAIL0_OFFSET 0x40#define BONITO_PCIMAIL1_OFFSET 0x44#define BONITO_PCIMAIL2_OFFSET 0x48#define BONITO_PCIMAIL3_OFFSET 0x4c#define BONITO_PCIMAIL0 BONITO(BONITO_REGBASE + 0x40)#define BONITO_PCIMAIL1 BONITO(BONITO_REGBASE + 0x44)#define BONITO_PCIMAIL2 BONITO(BONITO_REGBASE + 0x48)#define BONITO_PCIMAIL3 BONITO(BONITO_REGBASE + 0x4c)/* 6. PCI cache */#define BONITO_PCICACHECTRL BONITO(BONITO_REGBASE + 0x50)#define BONITO_PCICACHETAG BONITO(BONITO_REGBASE + 0x54)#define BONITO_PCIBADADDR BONITO(BONITO_REGBASE + 0x58)#define BONITO_PCIMSTAT BONITO(BONITO_REGBASE + 0x5c)/*
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