malta.h

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/************************************************************************
 *
 *      malta.h
 *
 *      The 'Malta' module defines the Malta board specific
 *      address-MAP, registers, etc.
 *
 *
 * ######################################################################
 *
 * mips_start_of_legal_notice
 * 
 * Copyright (c) 2004 MIPS Technologies, Inc. All rights reserved.
 *
 *
 * Unpublished rights (if any) reserved under the copyright laws of the
 * United States of America and other countries.
 *
 * This code is proprietary to MIPS Technologies, Inc. ("MIPS
 * Technologies"). Any copying, reproducing, modifying or use of this code
 * (in whole or in part) that is not expressly permitted in writing by MIPS
 * Technologies or an authorized third party is strictly prohibited. At a
 * minimum, this code is protected under unfair competition and copyright
 * laws. Violations thereof may result in criminal penalties and fines.
 *
 * MIPS Technologies reserves the right to change this code to improve
 * function, design or otherwise. MIPS Technologies does not assume any
 * liability arising out of the application or use of this code, or of any
 * error or omission in such code. Any warranties, whether express,
 * statutory, implied or otherwise, including but not limited to the implied
 * warranties of merchantability or fitness for a particular purpose, are
 * excluded. Except as expressly provided in any written license agreement
 * from MIPS Technologies or an authorized third party, the furnishing of
 * this code does not give recipient any license to any intellectual
 * property rights, including any patent rights, that cover this code.
 *
 * This code shall not be exported, reexported, transferred, or released,
 * directly or indirectly, in violation of the law of any country or
 * international law, regulation, treaty, Executive Order, statute,
 * amendments or supplements thereto. Should a conflict arise regarding the
 * export, reexport, transfer, or release of this code, the laws of the
 * United States of America shall be the governing law.
 *
 * This code constitutes one or more of the following: commercial computer
 * software, commercial computer software documentation or other commercial
 * items. If the user of this code, or any related documentation of any
 * kind, including related technical data or manuals, is an agency,
 * department, or other entity of the United States government
 * ("Government"), the use, duplication, reproduction, release,
 * modification, disclosure, or transfer of this code, or any related
 * documentation of any kind, is restricted in accordance with Federal
 * Acquisition Regulation 12.212 for civilian agencies and Defense Federal
 * Acquisition Regulation Supplement 227.7202 for military agencies. The use
 * of this code by the Government is further restricted in accordance with
 * the terms of the license agreement(s) and/or applicable contract terms
 * and conditions covering this code from MIPS Technologies or an authorized
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 *
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 * 
 * mips_end_of_legal_notice
 * 
 *
 ************************************************************************/

#ifndef MALTA_H
#define MALTA_H

/************************************************************************
 *  Note: all addresses are physical ! 
 *  Must be mapped into kseg0 (system RAM) or kseg1 (registers, devices)
*************************************************************************/

/************************************************************************
 *  Include files
 ************************************************************************/

#include <sysdefs.h>
#include <piix4.h>
#include <pci_api.h>
#include <sys_api.h>
#include <mips.h>

/************************************************************************
 *  Malta, EEPROM devices,  IIC-slaveadresses
*************************************************************************/

#define MALTA_EEPROM_IICADR_SN      0x54 /* EEPROM with serial number   */
#define MALTA_EEPROM_IICADR_SPD000  0x50 /* PC-SDRAM, 256 bytes         */


/************************************************************************
 *  Malta physical address MAP (512 MByte)
*************************************************************************/

#define MALTA_SYSTEMRAM_BASE      0x00000000  /* System RAM:          */
#define MALTA_SYSTEMRAM_SIZE      0x10000000  /*   256 MByte          */
 
/* The following 6 definitions are used with Galileo 64120 only       */
#define MALTA_PCIMEM1_BASE        0x10000000  /* PCI 1 memory:        */
#define MALTA_PCIMEM1_SIZE        0x0be00000  /*  128 + 2 + 60 MByte  */
                    /* the 2 MByte constitutes a "red page" (PCIMEM2) */

#define MALTA_PCIMEM2_BASE        0x18000000  /* PCI 2 memory         */
#define MALTA_PCIMEM2_SIZE        0x00200000  /*     2 MByte          */

#define MALTA_CORECTRL_BASE       0x1BE00000  /* Core control:        */
#define MALTA_CORECTRL_SIZE       0x00200000  /*     2 MByte          */

#define MALTA_RESERVED_BASE1      0x1C000000  /* Reserved:            */
#define MALTA_RESERVED_SIZE1      0x02000000  /*    32 MByte          */

#define MALTA_MONITORFLASH_BASE   0x1E000000  /* Monitor Flash:       */
#define MALTA_MONITORFLASH_SIZE   0x003E0000  /*     4 MByte          */
#define MALTA_MONITORFLASH_SECTORSIZE 0x00010000 /* Sect. = 64 KB     */


#define MALTA_RESERVED_BASE2      0x1E400000  /* Reserved:            */
#define MALTA_RESERVED_SIZE2      0x00C00000  /*    12 MByte          */

#define MALTA_FPGA_BASE           0x1F000000  /* FPGA:                */
#define MALTA_FPGA_SIZE           0x00C00000  /*    12 MByte          */

#define MALTA_BOOTROM_BASE        0x1FC00000  /* Boot ROM:            */
#define MALTA_BOOTROM_SIZE        0x00400000  /*     4 MByte          */


/************************************************************************
 *  Use of PCI ranges (Memory vs I/O)
*************************************************************************/

#define  MALTA_PCI_MEM_BASE	      MALTA_PCIMEM1_BASE
#define  MALTA_PCI_MEM_SIZE	      MALTA_PCIMEM1_SIZE

#define  MALTA_PCI_IO_BASE	      MALTA_PCIMEM2_BASE
#define  MALTA_PCI_IO_SIZE	      MALTA_PCIMEM2_SIZE


/************************************************************************
 * Malta FILEFLASH: upper 128 KByte (2x64 KByte sectors) of MONITORFLASH
*************************************************************************/

#define MALTA_FILEFLASH_BASE       0x1E3E0000 /* File Flash:           */
#define MALTA_FILEFLASH_SIZE       0x00020000 /*   128 KByte           */

#define MALTA_FILEFLASH_SECTORSIZE 0x00010000 /* Sect. = 64 KB	       */


/************************************************************************
 *  Malta, devices, base adresses:
*************************************************************************/

#define  MALTA_TI16C550_BASE      0x1F000900 /* TI16C550 UART (tty2)  */


/************************************************************************
 *  Malta FPGA, register address map:
*************************************************************************/

/************************************************************************
 *  REVISION: MUST BE FIXED TO  0x1FC00010 on any baseboard
*************************************************************************/

/************************************************************************
 *      Register Addresses
*************************************************************************/

#define MALTA_REVISION            0x1FC00010 /* REVISION              */
#define MALTA_SWITCH              0x1F000200 /* SWITCH                */
#define MALTA_STATUS              0x1F000208 /* STATUS                */
#define MALTA_JMPRS               0x1F000210 /* JMPRS                 */
#define MALTA_NMISTATUS           0x1F000024 /* NMISTATUS	      */
#define MALTA_NMIACK              0x1F000104 /* NMIACK                */
#define MALTA_LEDBAR              0x1F000408 /* LEDBAR       bit 7:0  */
#define MALTA_ASCIIWORD           0x1F000410 /* ASCIIWORD    bit 32:0 */
#define MALTA_ASCIIPOS0           0x1F000418 /* ASCIIPOS0    bit 7:0  */
#define MALTA_ASCIIPOS1           0x1F000420 /* ASCIIPOS1    bit 7:0  */
#define MALTA_ASCIIPOS2           0x1F000428 /* ASCIIPOS2    bit 7:0  */
#define MALTA_ASCIIPOS3           0x1F000430 /* ASCIIPOS3    bit 7:0  */
#define MALTA_ASCIIPOS4           0x1F000438 /* ASCIIPOS4    bit 7:0  */
#define MALTA_ASCIIPOS5           0x1F000440 /* ASCIIPOS5    bit 7:0  */
#define MALTA_ASCIIPOS6           0x1F000448 /* ASCIIPOS6    bit 7:0  */
#define MALTA_ASCIIPOS7           0x1F000450 /* ASCIIPOS7    bit 7:0  */
#define MALTA_SOFTRES             0x1F000500 /* SOFTRES               */
#define MALTA_BRKRES              0x1F000508 /* BRKRES                */
#define MALTA_GPOUT               0x1F000A00 /* GPOUT                 */
#define MALTA_GPINP               0x1F000A08 /* GPINP                 */
#define MALTA_I2CINP              0x1F000b00 /* I2CINP                */
#define MALTA_I2COE               0x1F000b08 /* I2COE                 */
#define MALTA_I2COUT              0x1F000b10 /* I2COUT                */
#define MALTA_I2CSEL		  0x1F000b18 /* I2CSEL		      */


/************************************************************************
 *      Register field encodings
*************************************************************************/


/******** reg: REVISION ********/

/* field: FPGRV */
#define MALTA_REVISION_FPGRV_SHF  16
#define MALTA_REVISION_FPGRV_MSK  (MSK(8) << MALTA_REVISION_FPGRV_SHF)

/* field: CORID */
#define MALTA_REVISION_CORID_SHF  10
#define MALTA_REVISION_CORID_MSK  (MSK(6) << MALTA_REVISION_CORID_SHF)

/* field: CORRV */
#define MALTA_REVISION_CORRV_SHF  8
#define MALTA_REVISION_CORRV_MSK  (MSK(2) << MALTA_REVISION_CORRV_SHF)

/* field: PROID */
#define MALTA_REVISION_PROID_SHF  4
#define MALTA_REVISION_PROID_MSK  (MSK(4) << MALTA_REVISION_PROID_SHF)

/* field: PRORV */
#define MALTA_REVISION_PRORV_SHF  0
#define MALTA_REVISION_PRORV_MSK  (MSK(4) << MALTA_REVISION_PRORV_SHF)


/******** reg: NMISTATUS ********/

/* bit 1: SOUTHBRIDGE */
#define MALTA_NMISTATUS_SB_SHF    1
#define MALTA_NMISTATUS_SB_MSK    (MSK(1) << MALTA_NMISTATUS_SB_SHF)
#define MALTA_NMISTATUS_SB_BIT    MALTA_NMISTATUS_SB_MSK

/* bit 0: PUSHBUTTON */
#define MALTA_NMISTATUS_ONNMI_SHF 0
#define MALTA_NMISTATUS_ONNMI_MSK (MSK(1) << MALTA_NMISTATUS_ONNMI_SHF)
#define MALTA_NMISTATUS_ONNMI_BIT MALTA_NMISTATUS_ONNMI_MSK


/******** reg: NMIACK ********/

/* bit 0: NMI */
#define MALTA_NMIACK_ONNMI_SHF    0
#define MALTA_NMIACK_ONNMI_MSK    (MSK(1) << MALTA_NMIACK_ONNMI_SHF)
#define MALTA_NMIACK_ONNMI_BIT    MALTA_NMIACK_ONNMI_MSK


/******** reg: SWITCH ********/

/* bits 7:0: S2 */
#define MALTA_SWITCH_S2_SHF      0
#define MALTA_SWITCH_S2_MSK      (MSK(8) << MALTA_SWITCH_S2_SHF)


/******** reg: STATUS ********/

/* bit 4 : MFWR */
#define MALTA_STATUS_MFWR_SHF     4
#define MALTA_STATUS_MFWR_MSK     (MSK(1) << MALTA_STATUS_MFWR_SHF)
#define MALTA_STATUS_MFWR_BIT     MALTA_STATUS_MFWR_MSK

/* bit 3 : S54 */
#define MALTA_STATUS_S54_SHF      3