init_tlb.c

MIPS 虚存测试, 表明在裸机环境, 无OS,无LOADER时如何定位目标码,将虚存与相应的物理单元做比较.原创.

/* init_tlb.c, tesing MIPS 4KEc TLB by mappiing kseg3 to CSI RAM, write via PA and read via VA
 */
#define VIRT_PAGE_SIZE		0x1000		//4KB
#define INIT_VADDR_TLB		0xE0000000	//kseg 3		

#define INIT_PADDR_TLB		0x1E00A000
#define INIT_EntryLO_PFN	(INIT_PADDR_TLB>>6)
#define INIT_EntryLo_C		(2<<3)		//uncached
#define INIT_EntryLo_G		(1<<1)		//Global to bypass ASID
#define INIT_EntryLo_V		1		//valid
#define INIT_EntryLo		(INIT_EntryLO_PFN | INIT_EntryLo_C | INIT_EntryLo_G | INIT_EntryLo_V)

#define INIT_PAGE_MASK		(3<<11)		//4KB page size
#define INIT_EntryHi_VPN2	(INIT_VADDR_TLB & 0xFFFFE000 )

typedef unsigned long UINT32;
void tlb_init_sub(void);

int main(void)
{
UINT32 i, j;
UINT32 idata[5];
volatile UINT32 *pmemv = (UINT32*)(INIT_VADDR_TLB);
volatile UINT32 *pmemp = (UINT32*)(INIT_PADDR_TLB | 0xA0000000);


	tlb_init_sub();		//program all 16 JTAB entry
	sys_tlb_read(0, idata);	//read back entry 0
	
	*pmemp = 0x001155AA;	//these two lines try to access physical
	j = 1 + *pmemp;
	for (i=0; i< 2; i++);	//mark 1
	j = *pmemv;		//read virtual data it shall be 001155AA
	for (i=0; i< 3; i++);	//mark 2
	pmemv = (j==0x001155AA) ? (UINT32*)0xA0000400 : (UINT32*)0xA0000500;
	*pmemv = 0;		
}

void tlb_init_sub(void)
{
    /* Initialise TLB. We make sure all entries have different VPN2 */
    UINT32 i, j = 0;
    UINT32 data[5];
    UINT32 value;

    for (i=0; i<16; i++) 
    {
	data[0] = i;				//index
	data[1] = INIT_PAGE_MASK;		//pagemask				
	data[2] = INIT_EntryHi_VPN2 + (i<<13);	//entry hi, each 8KB
	data[3] = INIT_EntryLo + (i<<7);	//entry lo1, even 4kB 
	data[4] = data[3] | (1<<6);		//entry lo1, odd 4KB

	sys_tlb_write( data );
    }
}