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📄 44binit_1.s

📁 arm的非向量中断通过执行IsrIRQ判断中断源
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/* *******************************************************
 * NAME    : 44BINIT_1.S					*
 * Version : 2005				*
 * Description:					*
 *	C start up codes				*
 *	Configure memory, Initialize ISR ,stacks	*
 *	Initialize C-variables				*
 *	Fill zeros into zero-initialized C-variables	*
 *******************************************************/
 


.globl _start
_start:
    b ResetHandler  //for debug
    b HandlerUndef  //handlerUndef
    b HandlerSWI    //SWI interrupt handler
    b HandlerPabort //handlerPAbort
    b HandlerDabort //handlerDAbort
    b .		    //handlerReserved
//  b IsrIRQ
//  b HandlerFIQ
    subs pc,lr,#4
    subs pc,lr,#4
	//***IMPORTANT NOTE***
	//If the H/W vectored interrutp mode is enabled, The above two instructions should
	//be changed like below, to work-around with H/W bug of S3C44B0X interrupt controller. 
    ldr pc,=HandlerEINT0    //mGA    H/W interrupt vector table
    ldr pc,=HandlerEINT1    //	
    ldr pc,=HandlerEINT2    //
    ldr pc,=HandlerEINT3    //
    ldr pc,=HandlerEINT4567 //
    ldr pc,=HandlerTICK	    //mGA
    b .
    b .
    ldr pc,=HandlerZDMA0    //mGB
    ldr pc,=HandlerZDMA1    //
    ldr pc,=HandlerBDMA0    //
    ldr pc,=HandlerBDMA1    //
    ldr pc,=HandlerWDT	    //
    ldr pc,=HandlerUERR01   //mGB
    b .
    b .
    ldr pc,=HandlerTIMER0   //mGC
    ldr pc,=HandlerTIMER1   //
    ldr pc,=HandlerTIMER2   //
    ldr pc,=HandlerTIMER3   //
    ldr pc,=HandlerTIMER4   //
    ldr pc,=HandlerTIMER5   //mGC
    b .
    b .
    ldr pc,=HandlerURXD0    //mGD
    ldr pc,=HandlerURXD1    //
    ldr pc,=HandlerIIC	    //
    ldr pc,=HandlerSIO	    //
    ldr pc,=HandlerUTXD0    //
    ldr pc,=HandlerUTXD1    //mGD
    b .
    b .
    ldr pc,=HandlerRTC	    //mGKA
    b .			    //
    b .			    //
    b .			    //
    b .			    //
    b .			    //mGKA
    b .
    b .
    ldr pc,=HandlerADC	    //mGKB
    b .			    //
    b .			    //
    b .			    //
    b .			    //
    b .			    //mGKB
    b .
    b .

    ldr pc,=EnterPWDN

	

HandlerFIQ:		.word HandleFIQ
HandlerIRQ:		.word HandleIRQ
HandlerUndef:	.word HandleUndef
HandlerSWI:		.word HandleSWI
HandlerDabort:	.word HandleDabort
HandlerPabort:	.word HandlePabort

HandlerADC:		.word HandleADC
HandlerRTC:		.word HandleRTC
HandlerUTXD1:	.word HandleUTXD1
HandlerUTXD0:	.word HandleUTXD0
HandlerSIO:		.word HandleSIO
HandlerIIC:		.word HandleIIC
HandlerURXD1:	.word HandleURXD1
HandlerURXD0:	.word HandleURXD0
HandlerTIMER5:	.word HandleTIMER5
HandlerTIMER4:	.word HandleTIMER4
HandlerTIMER3:	.word HandleTIMER3
HandlerTIMER2:	.word HandleTIMER2
HandlerTIMER1:	.word HandleTIMER1
HandlerTIMER0:	.word HandleTIMER0
HandlerUERR01:	.word HandleUERR01
HandlerWDT:		.word HandleWDT
HandlerBDMA1:	.word HandleBDMA1
HandlerBDMA0:	.word HandleBDMA0
HandlerZDMA1:	.word HandleZDMA1
HandlerZDMA0:	.word HandleZDMA0
HandlerTICK:	.word HandleTICK
HandlerEINT4567:.word HandleEINT4567
HandlerEINT3:	.word HandleEINT3
HandlerEINT2:	.word HandleEINT2
HandlerEINT1:	.word HandleEINT1
HandlerEINT0:	.word HandleEINT0



/*****************************************************
 *	START					    *
 *****************************************************/
ResetHandler:
    	ldr	    r0,WTCON	    //watch dog disable 
    	ldr	    r1,=0x0 		
    	str	    r1,[r0]

    	ldr	    r0,INTMSK
    	ldr	    r1,MASKALL   //all interrupt disable
    	str	    r1,[r0]

/*  ****************************************************
    *	Set clock control registers			*
    *****************************************************/
    	ldr	r0,LOCKTIME
    	ldr	r1,=800	    // count = t_lock * Fin (t_lock=200us, Fin=4MHz) = 800
    	str	r1,[r0]

	ldr	r0,PLLCON			//temporary setting of PLL
	ldr	r1,PLLCON_DAT 	//Fin=10MHz,Fout=40MHz
	str	r1,[r0]

    	ldr	    r0,CLKCON		 
    	ldr	    r1,=0x7ff8	    //All unit block CLK enable	
    	str	    r1,[r0]
	
        ldr	    r0,SYSCFG	    //sysytem cfg disable 
    	ldr	    r1,=0x0 		
    	str	    r1,[r0]
/*  ****************************************************
    *	Set memory control registers			* 	
    *****************************************************/
    	adr	    r0,SMRDATA
    	ldmia   r0,{r1-r13}
    	ldr	    r0,=0x01c80000  //BWSCON Address
    	stmia   r0,{r1-r13}

/*  ***************************************************
    *	Initialize stacks				* 
    *****************************************************/
    	ldr	    sp, SVCStack	//Why?
    	bl	    InitStacks


    	BL		Main	    //Don't use main() because ......
    	B	.			

   				


/*****************************************************
	The function for initializing stack	    *
/*****************************************************/
InitStacks:
	//Don't use DRAM,such as stmfd,ldmfd......
	//SVCstack is initialized before
	//Under toolkit ver 2.50, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'

    	mrs	    r0,cpsr
    	bic	    r0,r0,#0X1F
    	orr	    r1,r0,#0xDB		//UNDEFMODE|NOINT
    	msr	    cpsr,r1		//UndefMode
    	ldr	    sp,UndefStack
	
    	orr	    r1,r0,#0XD7		//ABORTMODE|NOINT
    	msr	    cpsr,r1 	    	//AbortMode
    	ldr	    sp,AbortStack

    	orr	    r1,r0,#0XD2		//IRQMODE|NOINT
    	msr	    cpsr,r1 	    	//IRQMode
    	ldr	    sp,IRQStack
	
    	orr	    r1,r0,#0XD1		//FIQMODE|NOINT
    	msr	    cpsr,r1 	    	//FIQMode
    	ldr	    sp,FIQStack

    	bic	    r0,r0,#0XDF		//MODEMASK|NOINT
    	orr	    r1,r0,#0X13
    	msr	    cpsr,r1 	    	//SVCMode
    	ldr	    sp,SVCStack

	//USER mode is not initialized.
    	mov	    pc,lr //The LR register may be not valid for the mode changes.

/*****************************************************
 *	The function for entering power down mode   *
 *****************************************************/
/*void EnterPWDN(int CLKCON)*/
EnterPWDN:
   	 mov	    r2,r0               //r0=CLKCON
    	ldr	    r0,REFRESH		
    	ldr	    r3,[r0]
    	mov	    r1, r3
    	orr	    r1, r1, #0x400000   //self-refresh enable
    	str	    r1, [r0]

    	nop     //Wait until self-refresh is issued. May not be needed.
    	nop     //If the other bus master holds the bus, ...
    	nop	    // mov r0, r0
    	nop
    	nop
    	nop
    	nop

/*enter POWERDN mode*/
    	ldr	    r0,CLKCON
    	str	    r2,[r0]

/*wait until enter SL_IDLE,STOP mode and until wake-up*/
    	mov	    r0,#0xff
    
B0: 	subs    r0,r0,#1
    	bne	B0

/*exit from DRAM/SDRAM self refresh mode.*/
    	ldr	    r0,REFRESH
    	str	    r3,[r0]
       	mov	    pc,lr

SMRDATA:
/******************************************************************
 * Memory configuration has to be optimized for best performance *
 * The following parameter is not optimized.                     *
 ******************************************************************/

/**** memory access cycle parameter strategy ***
// 1) Even FP-DRAM, EDO setting has more late fetch point by half-clock
// 2) The memory settings,here, are made the safe parameters even at 66Mhz.
// 3) FP-DRAM Parameters:tRCD=3 for tRAC, tcas=2 for pad delay, tcp=2 for bus load.
// 4) DRAM refresh rate is for 40Mhz.
*/
   
	.long	 0x11111112//0x11110090	//Bank0=OM[1:0], Bank1~Bank7=16bit, bank2=8bit//
 	.long	 0X600		//GCS0
	.long	 0X7FFC//0X7bc0		//GCS1 
	.long    0X7FFC//0X7fc0		//GCS2
	.long    0X7ffc		//GCS3
	.long	 0X7ffc		//GCS4
	.long	 0X7ffc		//GCS5
	//rem GCS6 EDO DRAM(Trcd=3,Tcas=2,Tcp=1,CAN=10)
	//GCS6 SDRAM(Trcd=2,SCAN=8)
	.long	 0X18000	//GCS6
	.long	 0X18000	//GCS7
	//rem Refresh(REFEN=1,TREFMD=0,Trp=3.5(D)or 4(SD),Trc=5(S), Tchr=3(D),Ref CNT)
	.long	 0x820591//0X1002a//0x820591	//REFRESH RFEN=1, TREFMD=0, trp=3clk, trc=5clk, tchr=3clk,count=1019
	//rem Bank size, 8MB/8MB
	.long	 0x16				//SCLK power mode, BANKSIZE 32M/32M
	//rem MRSR 6(CL=2)
	.long	 0x20
	//rem MRSR 7(CL=2)			//MRSR6 CL=2clk
	.long	 0x20			//MRSR7
				
UserStack:	.word	0xc7ffa00
SVCStack:	.word	0xc7ffb00
UndefStack:	.word	0xc7ffc00
AbortStack:	.word	0xc7ffd00
IRQStack:	.word	0xc7ffe00
FIQStack:	.word	0xc7fff00


HandleReset:	.word	0xc7fff00
HandleUndef:	.word	0xc7fff04
HandleSWI:		.word	0xc7fff08
HandlePabort:	.word	0xc7fff0c
HandleDabort:	.word	0xc7fff10
HandleReserved:	.word	0xc7fff14
HandleIRQ:		.word	0xc7fff18
HandleFIQ:		.word	0xc7fff1c

//Don't use the label 'IntVectorTable',
//because armasm.exe cann't recognize this label correctly.
//the value is different with an address you think it may be.
//IntVectorTable
HandleADC:		.word	0xc7fff20
HandleRTC:		.word	0xc7fff24
HandleUTXD1:	.word	0xc7fff28
HandleUTXD0:	.word	0xc7fff2c
HandleSIO:		.word	0xc7fff30
HandleIIC:		.word	0xc7fff34
HandleURXD1:	.word	0xc7fff38
HandleURXD0:	.word	0xc7fff3c
HandleTIMER5:	.word	0xc7fff40
HandleTIMER4:	.word	0xc7fff44
HandleTIMER3:	.word	0xc7fff48
HandleTIMER2:	.word	0xc7fff4c
HandleTIMER1:	.word	0xc7fff50
HandleTIMER0:	.word	0xc7fff54
HandleUERR01:	.word	0xc7fff58
HandleWDT:		.word	0xc7fff5c
HandleBDMA1:	.word	0xc7fff60
HandleBDMA0:	.word	0xc7fff64
HandleZDMA1:	.word	0xc7fff68
HandleZDMA0:	.word	0xc7fff6c
HandleTICK:		.word	0xc7fff70
HandleEINT4567:	.word	0xc7fff74
HandleEINT3:	.word	0xc7fff78
HandleEINT2:	.word	0xc7fff7c
HandleEINT1:	.word	0xc7fff80
HandleEINT0:	.word	0xc7fff84

/* some parameters for the board */
/*Interrupt Control*/
INTPND:
	.long	    0x01e00004
INTMOD:
	.long	    0x01e00008
INTMSK:
	.long	    0x01e0000c
I_ISPR:
	.long	    0x01e00020
I_CMST:
	.long	    0x01e0001c
led_Address:  .long           0x6000000

/*;Watchdog timer*/
WTCON:
	.long	    0x01d30000

/*;Clock Controller*/
PLLCON:
	.long	    0x01d80000
CLKCON:
	.long	    0x01d80004
LOCKTIME:
	.long    0x01d8000c
SYSCFG:
    .long    0x01c00000	
/*;Memory Controller*/
REFRESH:
	.long	     	0x01c80024

/*;Pre-defined constants*/
USERMODE:
	.long    0x10
FIQMODE:
	.long	    0x11
IRQMODE:
	.long	    0x12
SVCMODE:
	.long	    0x13
ABORTMODE:
	.long   0x17
UNDEFMODE:
	.long   0x1b
MODEMASK:
	.long    0x1f
NOINT:
	.long	    0xc0

_ISR_STARTADDRESS:
	.long   0xc7fff00 //GCS6:64M DRAM/SDRAM

PLLCLK:
	.long		40000000
PLLCON_DAT:
    .long  0x48032	// ((2 << 0) + (3 << 4) +( 0x48<< 12))

MASKALL:
	.long   0x07ffffff
	

		




















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