in_reset.s

uC/OS 使用SDT 开发工具包,可以参考一下

                str         r1, [r1, #AIC_EOICR]
                subs        r0, r0, #1
                bhi         LoopAic

    IF  :DEF:AT91_DEBUG_ICE
;- | -- Set IRQ and FIQ interrupt vectors
                adr         r0, irqvec                  ; @ where to read values
                ldmia       r0!, {r1-r2}                ; read the vectors
                mov         r0, #(6*4)                  ; @ of the interrupt vector
                stmia       r0!, {r1-r2}                ; store them
    ENDIF

    IF  :DEF: AT91EB01
;- | -- Get the top of the SRAM
;- | top <- InitMainSram()
                stmfd       r13!, {lr}
                ldr         r0, =InitMainSram
                mov         lr, pc
                bx          r0
                ldmfd       r13!, {lr}
    ENDIF

    IF  :DEF: AT91DB01
;- | -- Get the top of the SSRAM
;- | top <- SSRAM_BASE
                ldr         r0, =SSRAM_LIMIT
    ENDIF

;- | -- Save current CPSR and work registers
                mrs         r12, CPSR

;- | Get the size of the stacks
                ldr         r2, =InitTableStack

;- | Reserve debugger stack size
                ldr         r3, [r2, #0]
                sub         r0, r0, r3

    IF  :LNOT::DEF:AT91_DEBUG_ANGEL

;- | If (FIQ size defined)
                ldr         r3, [r2, #0]
                teq         r3, #0
;- | Then
                beq         InitFiqEnd
;- | | -- Set up Fast Interrupt mode and set FIQ stack
                mov         r1, #ARM_MODE_FIQ:OR:I_BIT:OR:F_BIT
                msr         CPSR_c, r1
;- | | FIQ_r13 <- top
                mov         r13, r0
;- | | top <- top - size_FIQ
                sub         r0, r0, r3
;- | Endif
InitFiqEnd

;- | If (IRQ size defined)
                ldr         r3, [r2, #4]
                teq         r3, #0
;- | Then
                beq         InitIrqEnd
;- | | -- Set up Interrupt mode and set IRQ stack
                mov         r1, #ARM_MODE_IRQ:OR:I_BIT:OR:F_BIT
                msr         CPSR_c, r1
;- | | IRQ_r13 <- top
                mov         r13, r0
;- | | top <- top - size_IRQ
                sub         r0, r0, r3
;- | Endif
InitIrqEnd

    IF  :LNOT::DEF:AT91_DEBUG_ICE

;- | If (SVC size defined)
                ldr         r3, [r2, #8]
                teq         r3, #0
;- | Then
                beq         InitSvcEnd
;- | | -- Set up Supervisor mode and set SVC stack
                mov         r1, #ARM_MODE_SVC:OR:I_BIT:OR:F_BIT
                msr         CPSR_c, r1
;- | | SVC_r13 <- top
                mov         r13, r0
;- | | top <- top - size_SVC
                sub         r0, r0, r3
;- | Endif
InitSvcEnd

    ENDIF
    ENDIF

;- | If (ABORT size defined)
                ldr         r3, [r2, #12]
                teq         r3, #0
;- | Then
                beq         InitAbortEnd
;- | | -- Set up Abort mode and set ABORT stack
                mov         r1, #ARM_MODE_ABORT:OR:I_BIT:OR:F_BIT
                msr         CPSR_c, r1
;- | | Abort_r13 <- top
                mov         r13, r0
;- | | top <- top - size_ABORT
                sub         r0, r0, r3
;- | Endif
InitAbortEnd

;- | If (UNDEF size defined)
                ldr         r3, [r2, #16]
                teq         r3, #0
;- | Then
                beq         InitUndefEnd
;- | | -- Set up Undefined mode and set UNDEF stack
                mov         r1, #ARM_MODE_UNDEF:OR:I_BIT:OR:F_BIT
                msr         CPSR_c, r1
;- | | UNDEF_r13 <- top
                mov         r13, r0
;- | | top <- top - size_UNDEF
                sub         r0, r0, r3
;- | Endif
InitUndefEnd

;- | -- Set up USER/SYStem mode and set USER/SYStem stack
                mov         r1, #ARM_MODE_SYS:OR:I_BIT:OR:F_BIT
                msr         CPSR_c, r1
;- | r13 <- top
                mov         r13, r0

;- | -- Restore current CPSR enabling interrupt and fast interrupt
                bic         r12, r12, #I_BIT:OR:F_BIT
                msr         CPSR_cxsf, r12

;- | return
                bx          lr

;------------------------------------------------------------------------------
;-    ATMEL Microcontroller Software Support  -   ROUSSET -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;-----------------------------------------------------------------------------
;- File source          : in_eb01.s
;- Object               : table for AT91EB01 initialization
;- Translator           : ARM Software Development Toolkit V2.11a
;-
;- Exported Resources   : InitTableEBI - InitTableStack
;- Imported Resources   : None
;-
;- 1.0 15/09/98 JLV     : Creation
;- 2.0 21/10/98 JCZ     : Clean up.
;- 2.1 16/03/99 JCZ     : SDT V2.5
;-                      : Reserve stack space on top of memory for ICE Debug.
;------------------------------------------------------------------------------

            AREA        Init, CODE, READONLY

; -------------------------- List of Included Files ---------------------------

;            INCLUDE     Include/ebi.inc
EBI_BASE        EQU     0xFFE00000

; -------------------------- List of Macro definitions ------------------------

            MACRO
            STACK_SIZE  $debug, $fiq, $irq, $svc, $abort, $undef

            DCD     $debug*4
            DCD     $fiq*4
            DCD     $irq*4
            DCD     $svc*4
            DCD     $abort*4
            DCD     $undef*4

            MEND

; ------------------------ List of constants and types ------------------------
; None

; ------------------------ List of Imported resources -------------------------
; None

; ------------------------ List of Internal resources -------------------------
; None

; ------------------------ List of Exported resources -------------------------

    IF  :DEF:AT91_DEBUG_NONE

;------------------------------------------------------------------------------
;- Function             : InitTableEBI
;- Treatments           : Table for EBI initialization
;- Input Parameters     : None
;- Output Parameters    : None
;- Registers lost       : None
;- Called Functions     : None
;- Called Macros        : None
;------------------------------------------------------------------------------

;                EXPORT      InitTableEBI
; 32,768 MHz master clock assumed
InitTableEBI
            DCD         0x01002535  ; 0x01000000, 16MB, 2 hold, 16 bits, 6 WS
            DCD         0x02002121  ; 0x02000000, 16MB, 0 hold, 16 bits, 1 WS
            DCD         0x20000000  ; unused
            DCD         0x30000000  ; unused
            DCD         0x40000000  ; unused
            DCD         0x50000000  ; unused
            DCD         0x60000000  ; unused
            DCD         0x70000000  ; unused
            DCD         0x00000001  ; REMAP command
            DCD         0x00000006  ; 7 memory regions, standard read
            DCD         EBI_BASE    ; EBI Base address

    ENDIF

;------------------------------------------------------------------------------
;- Function             : InitTableStack
;- Treatments           : Table for stack initialization ( stack sizes)
;- Input Parameters     : None
;- Output Parameters    : None
;- Registers lost       : None
;- Called Functions     : None
;- Called Macros        : None
;------------------------------------------------------------------------------

;                EXPORT      InitTableStack

InitTableStack
    IF  :DEF:AT91_DEBUG_NONE
            STACK_SIZE  0, 3, 3*8, 256, 3, 3
    ENDIF
    IF  :DEF:AT91_DEBUG_ANGEL
            STACK_SIZE  0, 0, 0, 0, 0, 0
    ENDIF
    IF  :DEF:AT91_DEBUG_ICE
            STACK_SIZE  1024, 3, 3*8, 0, 3, 3
    ENDIF

            END