in_reset.s

uC/OS 使用SDT 开发工具包,可以参考一下

;------------------------------------------------------------------------------
;-    ATMEL Microcontroller Software Support  -   ROUSSET -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;-----------------------------------------------------------------------------
;- File source          : in_reset.s
;- Object               : Boot of AT91EB01/DB01
;- Translator           : ARM Software Development Toolkit V2.11a
;-
;- Exported Resources   : __main - InitResetStacks
;- Imported Resources   : MainApplication - InitTableEBI - InitTableStack
;-
;- 1.0 15/09/98 JLV     : Creation
;- 2.0 21/10/98 JCZ     : Clean up.
;- 2.1 16/03/99 JCZ     : SDT V2.5
;-                      : Remove warning concerning CPSR field specifier.
;-                      : Reserve stack space on top of memory for ICE Debug.
;------------------------------------------------------------------------------

                AREA        IN_RESET, CODE, READONLY, INTERWORK

; -------------------------- List of Included Files ---------------------------

;                INCLUDE     Include/arm.inc
;-------------------------------
;- ARM Core Mode and Status Bits
;-------------------------------

ARM_MODE_USER           EQU     0x10
ARM_MODE_FIQ            EQU     0x11
ARM_MODE_IRQ            EQU     0x12
ARM_MODE_SVC            EQU     0x13
ARM_MODE_ABORT          EQU     0x17
ARM_MODE_UNDEF          EQU     0x1B
ARM_MODE_SYS            EQU     0x1F

I_BIT                   EQU     0x80
F_BIT                   EQU     0x40
T_BIT                   EQU     0x20

;                INCLUDE     Include/int_mem.inc
;------------------------------
;- AT91 Internal RAM Definition
;------------------------------

RAM_BASE            EQU     0x00000000
RAM_SIZE            EQU     4096
RAM_LIMIT           EQU     RAM_BASE + RAM_SIZE

;                INCLUDE     Include/aic.inc
AIC_BASE            EQU     0xFFFFF000
;-----------------------------------------
;- Advanced Interrupt Controller Structure
;-----------------------------------------
                    ^       0
AIC_SMR             #       32*4        ; Source Mode Register
AIC_SVR             #       32*4        ; Source Vector Register
AIC_IVR             #       4           ; Interrupt Vector Register
AIC_FVR             #       4           ; Fast Interrupt Vector Register
AIC_ISR             #       4           ; Interrupt Status Register
AIC_IPR             #       4           ; Interrupt Pending Register
AIC_IMR             #       4           ; Interrupt Mask Register
AIC_CISR            #       4           ; Core Interrupt Status Register
                    #       4
                    #       4
AIC_IECR            #       4           ; Interrupt Enable Command Register
AIC_IDCR            #       4           ; Interrupt Disable Command Register
AIC_ICCR            #       4           ; Interrupt Clear Command Register
AIC_ISCR            #       4           ; Interrupt Set Command Register
AIC_EOICR           #       4           ; End Of Interrupt Command Register

US0IRQ              EQU     2

; ------------------------ List of constants and types ------------------------
; None

; ------------------------ List of Imported resources -------------------------

                IMPORT      InitMainSram
;                IMPORT      InitTableStack

    IF  :DEF:AT91_DEBUG_NONE
;                IMPORT      InitTableEBI
                IMPORT      MainApplication
                IMPORT      |Image$$RO$$Limit|      ; End of ROM code (=start of ROM data)
                IMPORT      |Image$$RW$$Base|       ; Base of RAM to initialise
                IMPORT      |Image$$ZI$$Base|       ; Base and limit of area
                IMPORT      |Image$$ZI$$Limit|      ; to zero initialise
    ENDIF

; ------------------------ List of Internal resources -------------------------
; None

; ------------------------ List of Exported resources -------------------------

    IF  :DEF:AT91_DEBUG_NONE

;- Define the entry point
                ENTRY

;------------------------------------------------------------------------------
;- Function             : boot
;- Treatments           : AT91 boot code
;- Input Parameters     : None
;- Output Parameters    : None
;- Registers lost       : None
;- Called Functions     : MainApplication
;- Called Macros        : None
;------------------------------------------------------------------------------

;- Define "__main" to ensure that C runtime system is not linked
                EXPORT      __main
__main
                B           InitReset ; reset
undefvec
                B           undefvec ; Undef
swivec
                B           swivec   ; SW
pabtvec
                B           pabtvec  ; P abt
dabtvec
                B           dabtvec  ; D abt
rsvdvec
                B           rsvdvec  ; reserved
irqvec
                ldr         pc, [pc,#-0xF20]        ; IRQ : read the AIC
fiqvec
                ldr         pc, [pc,#-0xF20]        ; FIQ : read the AIC

InitReset

;- | Initialise the Memory Controller
;- | ---------------------------------
;- | Copy the Image of the Memory Controller
                ldr         r10, PtInitTableEBI     ; get the address of the chip select register image

;- | If pc > 0x100000
                movs        r0, pc, LSR #20
;- | | Mask the 12 highest bits of the address
                moveq       r10, r10, LSL #12
                moveq       r10, r10, LSR #12
;- | EndIf

;- | Load the address where to jump
                ldr         r12, PtInitRemap        ; get the real jump address ( after remap )

;- | Copy Chip Select Register Image to Memory Controller and command remap
                ldmia       r10!, {r0-r9,r11}       ; load the complete image and the EBI base
                stmia       r11!, {r0-r9}           ; store the complete image with the remap command

;- | Jump to ROM at its new address
                mov         pc, r12                 ; jump and break the pipeline

PtInitTableEBI
                DCD         InitTableEBI            ; Table for EBI initialization
PtInitRemap
                DCD         InitRemap               ; address where to jump after REMAP
PtInitVector
                DCD         __main                  ; Table for vector initialization

InitRemap
;- | Setup Exception Vectors
;- | -----------------------
;- | Copy the hard exception vectors
                mov         r8, #0                  ; @ of the hard vector
                ldr         r9, PtInitVector        ; @ where to read values
                ldmia       r9!, {r0-r7}            ; read the vectors
                stmia       r8!, {r0-r7}            ; store them

;- | Set up the SVC mode and stack pointer on the top of the internal RAM
                mov         r0, #ARM_MODE_SVC:OR:I_BIT:OR:F_BIT ; No interrupts
                msr         CPSR_c, r0
                ldr         r13, =RAM_LIMIT

;- | Initialize the Stacks
                bl          InitResetStacks

;- | Initialise memory required by C code
                ldr         r0, =|Image$$RO$$Limit| ; Get pointer to ROM data
                ldr         r1, =|Image$$RW$$Base|  ; and RAM copy
                ldr         r3, =|Image$$ZI$$Base|  ; Zero init base => top of initialised data
                cmp         r0, r1                  ; Check that they are different
                beq         NoRW
LoopRw          cmp         r1, r3                  ; Copy init data
                ldrcc       r2, [r0], #4
                strcc       r2, [r1], #4
                bcc         LoopRw
NoRW            ldr         r1, =|Image$$ZI$$Limit| ; Top of zero init segment
                mov         r2, #0
LoopZI          cmp         r3, r1                  ; Zero init
                strcc       r2, [r3], #4
                bcc         LoopZI

;- | Branch on C code Main function
                ldr         r0, =MainApplication
                mov         lr, pc
                bx          r0

;- | Loop for ever
InitEnd
                b           InitEnd
    ENDIF

    IF  :DEF:AT91_DEBUG_ICE
irqvec
                ldr         pc, [pc,#-0xF20]            ; IRQ : read the AIC
fiqvec
                ldr         pc, [pc,#-0xF20]            ; FIQ : read the AIC
    ENDIF

;------------------------------------------------------------------------------
;- Function             : InitResetStacks
;- Treatments           : AT91 boot code
;-                        Must be call in Supervisor mode
;- Input Parameters     : None
;- Output Parameters    :
;-      <AdFiq> = address of FIQ treatment which initialize the stack
;- Registers lost       : None
;- Called Functions     : None
;- Called Macros        : None
;------------------------------------------------------------------------------

            EXPORT      InitResetStacks

InitResetStacks
                ldr         r1, =AIC_BASE
    IF  :DEF:AT91_DEBUG_ANGEL
;- Disable all interrupt unless USART used by Angel
                mvn         r0, #(1:SHL:US0IRQ)
    ELSE
;- Disable all interrupt
                mvn         r0, #0
    ENDIF
                str         r0, [r1, #AIC_IDCR]

;- Perform 8 End Of Interrupt Command to make sure AIC will not lock out nIRQ
                mov         r0, #8
LoopAic