📄 dev_net_cs8900a.h
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/*
dev_net_cs8900a.h - skyeye Cirrus Logic CS8900A ethernet controllor simulation
Copyright (C) 2003 - 2005 Skyeye Develop Group
for help please send mail to <skyeye-developer@lists.gro.clinux.org>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* 06/04/2005 initial version
* walimis <wlm@student.dlut.edu.cn>
*/
#ifndef _DEV_NET_CS8900A_H_
#define _DEV_NET_CS8900A_H_
/*
* take from linux/drivers/net/cirrus.h
*
* Author: Abraham van der Merwe <abraham@2d3d.co.za>
*
* A Cirrus Logic CS8900A driver for Linux
* based on the cs89x0 driver written by Russell Nelson,
* Donald Becker, and others.
*
* This source code is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*/
/*
* Ports
*/
#define Rx_Frame_Port 0x00 /* Receive Data (Section 4.10.10) */
#define Tx_Frame_Port Rx_Frame_Port /* Transmit Data Port (Section 4.10.10) */
#define IO_TxCMD 0x04 /* Transmit Command see P75. (Section 4.10) */
#define IO_TxLength 0x06 /* Transmit Length see P75. (Section 4.10) */
#define IO_ISQ 0x08 /* Transmit Length see P75. (Section 4.10) */
#define PP_Address 0x0a /* PacketPage Pointer Port (Section 4.10.10) */
#define PP_Data 0x0c /* PacketPage Data Port (Section 4.10.10) */
/*
* Registers
*/
#define PP_ProductID 0x0000 /* Section 4.3.1 Product Identification Code */
#define PP_MemBase 0x002c /* Section 4.9.2 Memory Base Address Register */
#define PP_IntNum 0x0022 /* Section 3.2.3 Interrupt Number */
#define PP_EEPROMCommand 0x0040 /* Section 4.3.11 EEPROM Command */
#define PP_EEPROMData 0x0042 /* Section 4.3.12 EEPROM Data */
#define PP_RxCFG 0x0102 /* Section 4.4.6 Receiver Configuration */
#define PP_RxCTL 0x0104 /* Section 4.4.8 Receiver Control */
#define PP_TxCFG 0x0106 /* Section 4.4.9 Transmit Configuration */
#define PP_BufCFG 0x010a /* Section 4.4.12 Buffer Configuration */
#define PP_LineCTL 0x0112 /* Section 4.4.16 Line Control */
#define PP_SelfCTL 0x0114 /* Section 4.4.18 Self Control */
#define PP_BusCTL 0x0116 /* Section 4.4.20 Bus Control */
#define PP_TestCTL 0x0118 /* Section 4.4.22 Test Control */
#define PP_ISQ 0x0120 /* Section 4.4.5 Interrupt Status Queue */
#define PP_RxEvent 0x0124 /* Section 4.4.7 Receiver Event */
#define PP_RxEventalt 0x0124 /* Section 4.4.7 Receiver Event */
#define PP_TxEvent 0x0128 /* Section 4.4.10 Transmitter Event */
#define PP_BufEvent 0x012c /* Section 4.4.13 Buffer Event */
#define PP_RxMISS 0x0130 /* Section 4.4.14 Receiver Miss Counter */
#define PP_TxCOL 0x0132 /* Section 4.4.15 Transmit Collision Counter */
#define PP_LineST 0x0134 /* Section 4.4.17 Line Status */
#define PP_SelfST 0x0136 /* Section 4.4.19 Self Status */
#define PP_BusST 0x0138 /* Section 4.4.21 Bus Status */
#define PP_TxCMD 0x0144 /* Section 4.4.11 Transmit Command */
#define PP_TxLength 0x0146 /* Section 4.5.2 Transmit Length */
#define PP_IA 0x0158 /* Section 4.6.2 Individual Address (IEEE Address) */
#define PP_RxStatus 0x0400 /* Section 4.7.1 Receive Status */
#define PP_RxLength 0x0402 /* Section 4.7.1 Receive Length (in bytes) */
#define PP_RxFrame 0x0404 /* Section 4.7.2 Receive Frame Location */
#define PP_TxFrame 0x0a00 /* Section 4.7.2 Transmit Frame Location */
/*
* Values
*/
/* PP_IntNum */
#define INTRQ0 0x0000
#define INTRQ1 0x0001
#define INTRQ2 0x0002
#define INTRQ3 0x0003
/* PP_ProductID */
#define EISA_REG_CODE 0x630e
#define REVISION(x) (((x) & 0x1f00) >> 8)
#define VERSION(x) ((x) & ~0x1f00)
#define CS8900A 0x0000
#define REV_B 7
#define REV_C 8
#define REV_D 9
/* PP_RxCFG */
#define Skip_1 0x0040
#define StreamE 0x0080
#define RxOKiE 0x0100
#define RxDMAonly 0x0200
#define AutoRxDMAE 0x0400
#define BufferCRC 0x0800
#define CRCerroriE 0x1000
#define RuntiE 0x2000
#define ExtradataiE 0x4000
/* PP_RxCTL */
#define IAHashA 0x0040
#define PromiscuousA 0x0080
#define RxOKA 0x0100
#define MulticastA 0x0200
#define IndividualA 0x0400
#define BroadcastA 0x0800
#define CRCerrorA 0x1000
#define RuntA 0x2000
#define ExtradataA 0x4000
/* PP_TxCFG */
#define Loss_of_CRSiE 0x0040
#define SQErroriE 0x0080
#define TxOKiE 0x0100
#define Out_of_windowiE 0x0200
#define JabberiE 0x0400
#define AnycolliE 0x0800
#define T16colliE 0x8000
/* PP_BufCFG */
#define SWint_X 0x0040
#define RxDMAiE 0x0080
#define Rdy4TxiE 0x0100
#define TxUnderruniE 0x0200
#define RxMissiE 0x0400
#define Rx128iE 0x0800
#define TxColOvfiE 0x1000
#define MissOvfloiE 0x2000
#define RxDestiE 0x8000
/* PP_LineCTL */
#define SerRxON 0x0040
#define SerTxON 0x0080
#define AUIonly 0x0100
#define AutoAUI_10BT 0x0200
#define ModBackoffE 0x0800
#define PolarityDis 0x1000
#define L2_partDefDis 0x2000
#define LoRxSquelch 0x4000
/* PP_SelfCTL */
#define RESET 0x0040
#define SWSuspend 0x0100
#define HWSleepE 0x0200
#define HWStandbyE 0x0400
#define HC0E 0x1000
#define HC1E 0x2000
#define HCB0 0x4000
#define HCB1 0x8000
/* PP_BusCTL */
#define ResetRxDMA 0x0040
#define DMAextend 0x0100
#define UseSA 0x0200
#define MemoryE 0x0400
#define DMABurst 0x0800
#define IOCHRDYE 0x1000
#define RxDMAsize 0x2000
#define EnableRQ 0x8000
/* PP_TestCTL */
#define DisableLT 0x0080
#define ENDECloop 0x0200
#define AUIloop 0x0400
#define DisableBackoff 0x0800
#define FDX 0x4000
/* PP_ISQ */
#define RegNum(x) ((x) & 0x3f)
#define RegContent(x) ((x) & ~0x3d)
#define RxEvent 0x0004
#define TxEvent 0x0008
#define BufEvent 0x000c
#define RxMISS 0x0010
#define TxCOL 0x0012
/* PP_RxStatus */
#define IAHash 0x0040
#define Dribblebits 0x0080
#define RxOK 0x0100
#define Hashed 0x0200
#define IndividualAdr 0x0400
#define Broadcast 0x0800
#define CRCerror 0x1000
#define Runt 0x2000
#define Extradata 0x4000
#define HashTableIndex(x) ((x) >> 0xa)
/* PP_TxCMD */
#define After5 0
#define After381 1
#define After1021 2
#define AfterAll 3
#define TxStart(x) ((x) << 6)
#define Force 0x0100
#define Onecoll 0x0200
#define InhibitCRC 0x1000
#define TxPadDis 0x2000
/* PP_BusST */
#define TxBidErr 0x0080
#define Rdy4TxNOW 0x0100
/* PP_TxEvent */
#define Loss_of_CRS 0x0040
#define SQEerror 0x0080
#define TxOK 0x0100
#define Out_of_window 0x0200
#define Jabber 0x0400
#define T16coll 0x8000
#define TX_collisions(x) (((x) >> 0xb) & ~0x8000)
/* PP_BufEvent */
#define SWint 0x0040
#define RxDMAFrame 0x0080
#define Rdy4Tx 0x0100
#define TxUnderrun 0x0200
#define RxMiss 0x0400
#define Rx128 0x0800
#define RxDest 0x8000
/* PP_RxMISS */
#define MissCount(x) ((x) >> 6)
/* PP_TxCOL */
#define ColCount(x) ((x) >> 6)
/* PP_SelfST */
#define T3VActive 0x0040
#define INITD 0x0080
#define SIBUSY 0x0100
#define EEPROMpresent 0x0200
#define EEPROMOK 0x0400
#define ELpresent 0x0800
#define EEsize 0x1000
/* PP_EEPROMCommand */
#define EEWriteEnable 0x00F0
#define EEWriteDis 0x0000
#define EEWriteRegister 0x0100
#define EEReadRegister 0x0200
#define EEEraseRegister 0x0300
#define ELSEL 0x0400
/* walimis */
#define CtrlStNum(x) (((x & 0xfff) - 0x100)/2)
#define Rx_Frame_Count 2048
#define Tx_Frame_Count 1024
#define Rx_Max_Count 1514
/* */
#define INT_CS8900A 0
//the structure
typedef struct net_cs8900a_io
{
u16 pp_address;
u16 pp_data;
/* Bus Interface Registers */
u16 product_id[2];
u16 iobas_num;
u16 int_num;
u16 dma_channel_num;
u16 dma_start_frame;
u16 dma_frame_count;
u16 rxdma_byte_count;
u16 mem_base[2];
u16 boot_prom_base[2];
u16 boot_prom_mask[2];
u16 eeprom_cmd;
u16 eeprom_data;
u16 eeprom[64]; // 64 (16 bits word) in Prom.
int eeprom_writable;
/* Status and Control Registers */
u16 ctrl_st[32];
/*
u16 sc_isq;
u16 sc_rx_cfg;
u16 sc_rx_event;
u16 sc_rx_ctrl;
u16 sc_tx_cfg;
u16 sc_tx_event;
u16 sc_tx_cmd_status;
u16 sc_buf_cfg;
u16 sc_buf_event;
u16 sc_rx_miss_count;
u16 sc_tx_col_count;
u16 sc_line_ctrl;
u16 sc_line_status;
u16 sc_self_ctrl;
u16 sc_self_status;
u16 sc_bus_ctrl;
u16 sc_bus_status;
u16 sc_test_ctrl;
*/
/* Initiat Transmit Registers */
u16 tx_cmd;
u16 tx_length;
/* Address Filter Registers */
u8 hash_table[8];
u8 ieee_addr[6];
/* Frame Location Registers */
u16 *rx_status_p;
u16 *rx_length_p;
u16 *rx_frame;
u16 rx_head;
u16 rx_tail;
u16 *tx_frame;
u16 tx_head;
u16 tx_tail;
int need_update;
} net_cs8900a_io_t;
static u8 cs8900a_output (struct device_desc *dev, u8 * buf, u16 packet_len);
static void cs8900a_input (struct device_desc *dev);
#endif //_DEV_NET_CS8900A_H_
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