vector.c

56f8300E系列dsp的BOOTloader

/*******************************************************************************
*
* Motorola Inc.
* (c) Copyright 2002 Motorola, Inc.
* ALL RIGHTS RESERVED.
*
* $Element: /project/dsp568_sdk/sdk/src/dsp56838evm/nos/config/vector.c $ 
* $Author: saa $ 
* $Revision: /main/2 $ 
* $VOB: /project/dsp568_sdk $ 
* $OS: solaris $ 
*
* Description:      SDK interrupt vector 
*
* Notes:            The following Interrupt Vector MUST be at the beginning 
*                   of this vector.c file so that it is located at P:P:0x0000 
*                   by the linker.cmd file. 
*
******************************************************************************/


#include "arch.h"

/* SDK interrupt support */
#define ArchInstallISR( num, CallBack, prio )   extern void SDK_Interrupt##num(void)
#define ArchInstallFastISR( num, CallBack, prio )   extern void SDK_Interrupt##num(void)
#define ArchInstallCallBackISR(device,num, type, CallBack, prio )   extern void SDK_Interrupt##num(void)
#define ArchInstall2CallBackISR(device,num, type1, type2,  CallBack, prio ) extern void SDK_Interrupt##num(void)
#define ArchInstall4CallBackISR(device,num, type1, type2, type3, type4,  CallBack, prio ) extern void SDK_Interrupt##num(void)
#define ArchInstallSuperFastISR0( num, CallBack )   extern void SDK_Interrupt##num(void)
#define ArchInstallSuperFastISR1( num, CallBack )   extern void SDK_Interrupt##num(void)
#define ArchInstallGPIOISR( num, port, prio )	extern void SDK_Interrupt##num(void)
/* special fast callback support */

#define ArchInstallTimerISR( num, tmr, chnl, prio ) extern void SDK_Interrupt##num(void)
#define ArchInstallADCErrorCallBackISR(device, num, CallBack, prio ) extern void SDK_Interrupt##num(void)
//#define ArchSetTimer( tmr, chnl ) extern void SDK_stb(void)

#define ArchQuadCallBackOnCpmpare(tmr, chnl, CallBack ) extern void SDK_stb(void)   

#define ArchQuadCallBackOnOverflow(tmr, chnl, CallBack ) extern void SDK_stb(void)   

#define ArchQuadCallBackOnInputEdge(tmr, chnl, CallBack ) extern void SDK_stb(void)   

#define ArchInstallCallback(device, type, CallBack )  extern void SDK_stb(void)   

#define ArchParameter(...) extern void SDK_stb(void)

extern void configInterruptVector(void);

#pragma define_section mysection "isr_vectors.text" RX

#pragma section mysection begin


/*****************************************************************************/
asm void configInterruptVector(void)
{
 
/* include user and default configuration */
//#include "config.h"
#include "configdefines.h"

#if defined(DSP56838EVM)

                            /* {P:address, isr level(s), priority register: bit offset } */
    jmp archStart           /* {P:0x00,3}  RESET*/
    jmp SDK_Interrupt1      /* {P:0x02,3}  COP Reset */
    jsr SDK_illegal         /* {P:0x04,3}  Illegal Instruction */
    jsr SDK_Interrupt3      /* {P:0x06,3}  Software Interrupt 3 */
    jsr SDK_HWSOverflow     /* {P:0x08,3}  Hardware Stack Overflow */
    jsr SDK_misalign        /* {P:0x0A,3}  Misaligned Long Word Access */
    jsr SDK_Interrupt6      /* {P:0x0C,1-3,0:10}  EOnCE Step Counter */
    jsr SDK_Interrupt7      /* {P:0x0E,1-3,0:12}  EOnCE Breakpoint Unit 0 */
    jsr SDK_Interrupt8      /* {P:0x10,1-3}  Reserved */
    jsr SDK_Interrupt9      /* {P:0x12,1-3,1:0}  EOnCE Trace Buffer Interrupt Priority Level */
    jsr SDK_Interrupt10     /* {P:0x14,1-3,1:2}  EOnCE Transmit Register Empty  */
    jsr SDK_Interrupt11     /* {P:0x16,1-3,1:4}  EOnCE Receive Register Full */
    jsr SDK_Interrupt12     /* {P:0x18,0-3}  Reserved */
    jsr SDK_Interrupt13     /* {P:0x1A,0-3}  Reserved */
    jsr SDK_Interrupt14     /* {P:0x1C,2}  Software Interrupt 2 */
    jsr SDK_Interrupt15     /* {P:0x1E,1}  Software Interrupt 1 */
    jsr SDK_Interrupt16     /* {P:0x20,0}  Software Interrupt 0 */
    jsr SDK_Interrupt17     /* {P:0x22,0-2,2:0}  IRQA */
    jsr SDK_Interrupt18     /* {P:0x24,0-2,2:2}  IRQB */
    jsr SDK_Interrupt19     /* (P:0x26,0-2)  Reserved   */
    jsr SDK_PLL_loss        /* [P:0x28,0-2,2:6]  PLL Loss of Lock  */
    jsr SDK_Interrupt21     /* (P:0x2A,0-2]  Reserved   */
    jsr SDK_Interrupt22     /* [P:0x2C,0-2,2:10]  HFM Error Interrupt */
    jsr SDK_Interrupt23     /* [P:0x2E,0-2,2:12]  HFM Command complete */
    jsr SDK_Interrupt24     /* [P:0x30,0-2,2:14]  HFM Command Data & Address Buffers Empty */
    jsr SDK_Interrupt25     /* (P:0x32,0-2)  Reserved */
    jsr SDK_Interrupt26     /* [P:0x34,0-2,3:2]  MSCAN Transmitter Ready or FlexCAN bus-off */
    jsr SDK_Interrupt27     /* [P:0x36,0-2,3:4]  MSCAN Wake-up or FlexCAN wake-up */
    jsr SDK_Interrupt28     /* [P:0x38,0-2,3:6??]  MSCAN recv full int or FlexCAN msg buff int */
    jsr SDK_Interrupt29     /* [P:0x3A,0-2,3:8??]  ???? MSCAN Receiver Full Interrupt OR FlexCAN Message Buffer Interrupt*/
    jsr SDK_Interrupt30     /* [P:0x3C,0-2,3:10]  GPIO E */
    jsr SDK_Interrupt31     /* [P:0x3E,0-2,3:12]  GPIO D */
    jsr SDK_Interrupt32     /* [P:0x40,0-2,3:14]  GPIO C */
    jsr SDK_Interrupt33     /* [P:0x42,0-2,4:0]  GPIO B */
    jsr SDK_Interrupt34     /* [P:0x44,0-2,4:2]  GPIO A */
    jsr SDK_Interrupt35     /* (P:0x46,0-2)  Reserved */
    jsr SDK_Interrupt36     /* (P:0x48,0-2)  Reserved */
    jsr SDK_Interrupt37     /* [P:0x4a,0-2,4:8]  Low Voltage Detector */
    jsr SDK_Interrupt38     /* [P:0x4c,0-2,4:10]  SPI 1 Receiver Full */
    jsr SDK_Interrupt39     /* [P:0x4e,0-2,4:12]  SPI 1 Transmitter Empty */
    jsr SDK_Interrupt40     /* [P:0x50,0-2,4:14]  SPI 0 Receiver Full */
    jsr SDK_Interrupt41     /* [P:0x52,0-2,5:0]  SPI 0 Transmitter Empty */
    jsr SDK_Interrupt42     /* [P:0x54,0-2,5:2]  SCI 1 Transmitter Empty */
    jsr SDK_Interrupt43     /* [P:0x56,0-2,5:4]  SCI 1 Transmitter Idle */
    jsr SDK_Interrupt44     /* [P:0x58,0-2,5:6]  SCI 1 Receiver Idle */
    jsr SDK_Interrupt45     /* [P:0x5a,0-2,5:8]  SCI Receiver Error*/
    jsr SDK_Interrupt46     /* [P:0x5c,0-2,5:10] SCI Receiver Full */
    jsr SDK_Interrupt47     /* (P:0x5e,0-2)  Reserved (DEC1)   */
    jsr SDK_Interrupt48     /* (P:0x60,0-2)  Reserved (DEC1)   */
    jsr SDK_Interrupt49     /* [P:0x62,0-2,6:0]  Quadrature Decoder #0 Home Switch or Watchdo*/
    jsr SDK_Interrupt50     /* [P:0x64,0-2,6:2]  Quadrature Decoder #0 Index Pulse    */
    jsr SDK_Interrupt51     /* [P:0x66,0-2]  Reserved   */
    jsr SDK_Interrupt52     /* [P:0x68,0-2,6:6]  Timer D Channel 0 */
    jsr SDK_Interrupt53     /* [P:0x6a,0-2,6:8]  Timer D Channel 1 */
    jsr SDK_Interrupt54     /* [P:0x6c,0-2,6:10]  Timer D Channel 2 */
    jsr SDK_Interrupt55     /* [P:0x6e,0-2,6:12]  Timer D Channel 3 */
    jsr SDK_Interrupt56     /* [P:0x70,0-2,6:14]  Timer C Channel 0 */
    jsr SDK_Interrupt57     /* [P:0x72,0-2,7:0]  Timer C Channel 1 */
    jsr SDK_Interrupt58     /* [P:0x74,0-2,7:2]  Timer C Channel 2 */
    jsr SDK_Interrupt59     /* [P:0x76,0-2,7:4]  Timer C Channel 3 */
    jsr SDK_Interrupt60     /* [P:0x78,0-2,7:6]  Timer A Channel 0 */
    jsr SDK_Interrupt61     /* [P:0x7a,0-2,7:8]  Timer A Channel 1 */
    jsr SDK_Interrupt62     /* [P:0x7c,0-2,7:10]  Timer A Channel 2 */
    jsr SDK_Interrupt63     /* [P:0x7e,0-2,7:12]  Timer A Channel 3 */
    jsr SDK_Interrupt64     /* [P:0x80,0-2,7:14] SCI 0 Transmitter Empty */
    jsr SDK_Interrupt65     /* [P:0x82,0-2,8:0]  SCI 0 Transmitter Idle */
    jsr SDK_Interrupt66     /* [P:0x84,0-2,8:2]  SCI 0 Receiver Idle */
    jsr SDK_Interrupt67     /* [P:0x86,0-2,8:4]  SCI 0 Receiver Error */
    jsr SDK_Interrupt68     /* [P:0x88,0-2,8:6]  SCI 0 Receiver Full */
    jsr SDK_Interrupt69     /* [P:0x8A,0-2,8:8]   ADC B Conversion Complete */
    jsr SDK_Interrupt70     /* [P:0x8C,0-2,8:10]  ADC A Conversion Complete */
    jsr SDK_Interrupt71     /* [P:0x8E,0-2,8:12]  ADC B Zero Crossing or Limit Error */
    jsr SDK_Interrupt72     /* [P:0x90,0-2,8:14]  ADC A Zero Crossing or Limit Error */
    jsr SDK_Interrupt73     /* [P:0x92,0-2,9:0]  Reload PWM B */
    jsr SDK_Interrupt74     /* [P:0x94,0-2,9:2]  Reload PWM A */
    jsr SDK_Interrupt75     /* [P:0x96,0-2,9:4]  PWM B Fault */
    jsr SDK_Interrupt76     /* [P:0x98,0-2,9:6]  PWM A Fault */
    jsr SDK_Interrupt77     /* {P:0x9A,-1}  SW Interrupt LP */


#else /* defined(DSP56838EVM) */

                            /* {P:address, isr level(s), priority register: bit offset } */
    jmp archStart           /* {P:0x00,3}  RESET*/
    jmp SDK_Interrupt1      /* {P:0x02,3}  COP Reset */

    jsr SDK_illegal         /* {P:0x04,3}  Illegal Instruction */
    jsr SDK_Interrupt3      /* {P:0x06,3}  Software Interrupt 3 */
    jsr SDK_HWSOverflow     /* {P:0x08,3}  Hardware Stack Overflow */
    jsr SDK_misalign        /* {P:0x0A,3}  Misaligned Long Word Access */
    jsr SDK_Interrupt6      /* {P:0x0C,1-3,0:10}  EOnCE Step Counter */
    jsr SDK_Interrupt7      /* {P:0x0E,1-3,0:12}  EOnCE Breakpoint Unit 0 */
    jsr SDK_Interrupt8      /* {P:0x10,1-3}  Reserved */
    jsr SDK_Interrupt9      /* {P:0x12,1-3,1:0}  EOnCE Trace Buffer Interrupt Priority Level */
    jsr SDK_Interrupt10     /* {P:0x14,1-3,1:2}  EOnCE Transmit Register Empty  */
    jsr SDK_Interrupt11     /* {P:0x16,1-3,1:4}  EOnCE Receive Register Full */
    jsr SDK_Interrupt12     /* {P:0x18,0-3}  Reserved */
    jsr SDK_Interrupt13     /* {P:0x1A,0-3}  Reserved */
    jsr SDK_Interrupt14     /* {P:0x1C,2}  Software Interrupt 2 */
    jsr SDK_Interrupt15     /* {P:0x1E,1}  Software Interrupt 1 */
    jsr SDK_Interrupt16     /* {P:0x20,0}  Software Interrupt 0 */
    jsr SDK_Interrupt17     /* {P:0x22,0-2,2:0}  IRQA */
    jsr SDK_Interrupt18     /* {P:0x24,0-2,2:2}  IRQB */
    jsr SDK_Interrupt19     /* (P:0x26,0-2)  Reserved */
    jsr SDK_Interrupt20     /* (P:0x28,0-2,2:6]  Low Voltage Detector */