config.h

56f8300E系列dsp的BOOTloader

#define CUR_OFF (  ADCB_BUF_OFFSET + ADCB_BUF_MASK + 1  )
#endif /* ADCB_BUF */

#if ( PWMA_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(PWMA_BUF_OFF)
#define PWMA_BUF_OFF  CUR_OFF
enum __pwmAEnum_BUF_BASE {PWMA_BUF_MASK = (  (2 << BUF_BASE) - 1  ), PWMA_BUF_OFFSET = PWMA_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  PWMA_BUF_OFFSET + PWMA_BUF_MASK + 1  )
#endif /* PWMA_BUF */

#if ( PWMB_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(PWMB_BUF_OFF)
#define PWMB_BUF_OFF  CUR_OFF
enum __pwmBEnum_BUF_BASE {PWMB_BUF_MASK = (  (2 << BUF_BASE) - 1  ), PWMB_BUF_OFFSET = PWMB_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  PWMB_BUF_OFFSET + PWMB_BUF_MASK + 1  )
#endif /* PWMB_BUF */

/*****************************************************************************/
#undef BUF_BASE 
#define BUF_BASE 4
/*****************************************************************************/
#if ( SCI0_RXBUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SCI0_RXBUF_OFF)
#define SCI0_RXBUF_OFF  CUR_OFF
enum __sci0RxEnum_BUF_BASE {SCI0_RXBUF_MASK = (  (2 << BUF_BASE) - 1  ), SCI0_RXBUF_OFFSET = SCI0_RXBUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI0_RXBUF_OFFSET + SCI0_RXBUF_MASK + 1  )
#endif /* SCI0_RXBUF */

#if ( SCI0_TXBUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SCI0_TXBUF_OFF)
#define SCI0_TXBUF_OFF  CUR_OFF
enum __sci0TxEnum_BUF_BASE {SCI0_TXBUF_MASK = (  (2 << BUF_BASE) - 1  ), SCI0_TXBUF_OFFSET = CUR_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI0_TXBUF_OFFSET + SCI0_TXBUF_MASK + 1  )
#endif /* SCI0_TXBUF */


#if ( SCI1_RXBUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SCI1_RXBUF_OFF)
#define SCI1_RXBUF_OFF  CUR_OFF
enum __sci1RxEnum_BUF_BASE {SCI1_RXBUF_MASK = (  (2 << BUF_BASE) - 1  ), SCI1_RXBUF_OFFSET = SCI1_RXBUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI1_RXBUF_OFFSET + SCI1_RXBUF_MASK + 1  )
#endif /* SCI1_RXBUF */

#if ( SCI1_TXBUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SCI1_TXBUF_OFF)
#define SCI1_TXBUF_OFF  CUR_OFF
enum __sci1TxEnum_BUF_BASE {SCI1_TXBUF_MASK = (  (2 << BUF_BASE) - 1  ), SCI1_TXBUF_OFFSET = SCI1_TXBUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI1_TXBUF_OFFSET + SCI1_TXBUF_MASK  + 1  )
#endif /* SCI1_TXBUF */

#if ( SPI0_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SPI0_BUF_OFF)
#define SPI0_BUF_OFF  CUR_OFF
enum __spi0Enum_BUF_BASE {SPI0_BUF_MASK = (  (2 << BUF_BASE) - 1  ), SPI0_BUF_OFFSET = SPI0_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SPI0_BUF_OFFSET + SPI0_BUF_MASK + 1  )
#endif /* SPI0_BUF */

#if ( SPI1_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SPI1_BUF_OFF)
#define SPI1_BUF_OFF  CUR_OFF
enum __spi1Enum_BUF_BASE {SPI1_BUF_MASK = (  (2 << BUF_BASE) - 1  ), SPI1_BUF_OFFSET = SPI1_BUF_OFF};
#undef CURO_FF
#define CURO_FF (  SPI1_BUF_OFFSET + SPI1_BUF_MASK + 1  )
#endif /* SPI1_BUF */

#if ( ADCA_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(ADCA_BUF_OFF)
#define ADCA_BUF_OFF  CUR_OFF
enum __adcAEnum_BUF_BASE {ADCA_BUF_MASK = (  (2 << BUF_BASE) - 1  ), ADCA_BUF_OFFSET = ADCA_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  ADCA_BUF_OFFSET + ADCA_BUF_MASK + 1  )
#endif /* ADCA_BUF */

#if ( ADCB_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(ADCB_BUF_OFF)
#define ADCB_BUF_OFF  CUR_OFF
enum __adcBEnum_BUF_BASE {ADCB_BUF_MASK = (  (2 << BUF_BASE) - 1  ), ADCB_BUF_OFFSET = ADCB_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  ADCB_BUF_OFFSET + ADCB_BUF_MASK + 1  )
#endif /* ADCB_BUF */

#if ( PWMA_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(PWMA_BUF_OFF)
#define PWMA_BUF_OFF  CUR_OFF
enum __pwmAEnum_BUF_BASE {PWMA_BUF_MASK = (  (2 << BUF_BASE) - 1  ), PWMA_BUF_OFFSET = PWMA_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  PWMA_BUF_OFFSET + PWMA_BUF_MASK + 1  )
#endif /* PWMA_BUF */

#if ( PWMB_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(PWMB_BUF_OFF)
#define PWMB_BUF_OFF  CUR_OFF
enum __pwmBEnum_BUF_BASE {PWMB_BUF_MASK = (  (2 << BUF_BASE) - 1  ), PWMB_BUF_OFFSET = PWMB_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  PWMB_BUF_OFFSET + PWMB_BUF_MASK + 1  )
#endif /* PWMB_BUF */

/*****************************************************************************/
#undef BUF_BASE 
#define BUF_BASE 3
/*****************************************************************************/
#if ( SCI0_RXBUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SCI0_RXBUF_OFF)
#define SCI0_RXBUF_OFF  CUR_OFF
enum __sci0RxEnum_BUF_BASE {SCI0_RXBUF_MASK = (  (2 << BUF_BASE) - 1  ), SCI0_RXBUF_OFFSET = SCI0_RXBUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI0_RXBUF_OFFSET + SCI0_RXBUF_MASK + 1  )
#endif /* SCI0_RXBUF */

#if ( SCI0_TXBUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SCI0_TXBUF_OFF)
#define SCI0_TXBUF_OFF  CUR_OFF
enum __sci0TxEnum_BUF_BASE {SCI0_TXBUF_MASK = (  (2 << BUF_BASE) - 1  ), SCI0_TXBUF_OFFSET = CUR_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI0_TXBUF_OFFSET + SCI0_TXBUF_MASK + 1  )
#endif /* SCI0_TXBUF */


#if ( SCI1_RXBUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SCI1_RXBUF_OFF)
#define SCI1_RXBUF_OFF  CUR_OFF
enum __sci1RxEnum_BUF_BASE {SCI1_RXBUF_MASK = (  (2 << BUF_BASE) - 1  ), SCI1_RXBUF_OFFSET = SCI1_RXBUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI1_RXBUF_OFFSET + SCI1_RXBUF_MASK + 1  )
#endif /* SCI1_RXBUF */

#if ( SCI1_TXBUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SCI1_TXBUF_OFF)
#define SCI1_TXBUF_OFF  CUR_OFF
enum __sci1TxEnum_BUF_BASE {SCI1_TXBUF_MASK = (  (2 << BUF_BASE) - 1  ), SCI1_TXBUF_OFFSET = SCI1_TXBUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI1_TXBUF_OFFSET + SCI1_TXBUF_MASK  + 1  )
#endif /* SCI1_TXBUF */

#if ( SPI0_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SPI0_BUF_OFF)
#define SPI0_BUF_OFF  CUR_OFF
enum __spi0Enum_BUF_BASE {SPI0_BUF_MASK = (  (2 << BUF_BASE) - 1  ), SPI0_BUF_OFFSET = SPI0_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SPI0_BUF_OFFSET + SPI0_BUF_MASK + 1  )
#endif /* SPI0_BUF */

#if ( SPI1_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(SPI1_BUF_OFF)
#define SPI1_BUF_OFF  CUR_OFF
enum __spi1Enum_BUF_BASE {SPI1_BUF_MASK = (  (2 << BUF_BASE) - 1  ), SPI1_BUF_OFFSET = SPI1_BUF_OFF};
#undef CURO_FF
#define CURO_FF (  SPI1_BUF_OFFSET + SPI1_BUF_MASK + 1  )
#endif /* SPI1_BUF */

#if ( ADCA_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(ADCA_BUF_OFF)
#define ADCA_BUF_OFF  CUR_OFF
enum __adcAEnum_BUF_BASE {ADCA_BUF_MASK = (  (2 << BUF_BASE) - 1  ), ADCA_BUF_OFFSET = ADCA_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  ADCA_BUF_OFFSET + ADCA_BUF_MASK + 1  )
#endif /* ADCA_BUF */

#if ( ADCB_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(ADCB_BUF_OFF)
#define ADCB_BUF_OFF  CUR_OFF
enum __adcBEnum_BUF_BASE {ADCB_BUF_MASK = (  (2 << BUF_BASE) - 1  ), ADCB_BUF_OFFSET = ADCB_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  ADCB_BUF_OFFSET + ADCB_BUF_MASK + 1  )
#endif /* ADCB_BUF */

#if ( PWMA_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(PWMA_BUF_OFF)
#define PWMA_BUF_OFF  CUR_OFF
enum __pwmAEnum_BUF_BASE {PWMA_BUF_MASK = (  (2 << BUF_BASE) - 1  ), PWMA_BUF_OFFSET = PWMA_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  PWMA_BUF_OFFSET + PWMA_BUF_MASK + 1  )
#endif /* PWMA_BUF */

#if ( PWMB_BUF_SIZE > (2 <<(BUF_BASE-1)) ) && !defined(PWMB_BUF_OFF)
#define PWMB_BUF_OFF  CUR_OFF
enum __pwmBEnum_BUF_BASE {PWMB_BUF_MASK = (  (2 << BUF_BASE) - 1  ), PWMB_BUF_OFFSET = PWMB_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  PWMB_BUF_OFFSET + PWMB_BUF_MASK + 1  )
#endif /* PWMB_BUF */

/*****************************************************************************/
#undef BUF_BASE 
#define BUF_BASE 2 /* minimal value */
/*****************************************************************************/
#if ( SCI0_RXBUF_SIZE > 0 ) && !defined(SCI0_RXBUF_OFF)
#define SCI0_RXBUF_OFF  CUR_OFF
enum __sci0RxEnum_BUF_BASE {SCI0_RXBUF_MASK =  (  (2 << BUF_BASE) - 1  ), SCI0_RXBUF_OFFSET = SCI0_RXBUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI0_RXBUF_OFFSET + SCI0_RXBUF_MASK + 1  )
#endif /* SCI0_RXBUF */

#if ( SCI0_TXBUF_SIZE > 0 ) && !defined(SCI0_TXBUF_OFF)
#define SCI0_TXBUF_OFF  CUR_OFF
enum __sci0TxEnum_BUF_BASE {SCI0_TXBUF_MASK =  (  (2 << BUF_BASE) - 1  ), SCI0_TXBUF_OFFSET = CUR_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI0_TXBUF_OFFSET + SCI0_TXBUF_MASK + 1  )
#endif /* SCI0_TXBUF */

#if ( SCI1_RXBUF_SIZE > 0 ) && !defined(SCI1_RXBUF_OFF)
#define SCI1_RXBUF_OFF  CUR_OFF
enum __sci1RxEnum_BUF_BASE {SCI1_RXBUF_MASK =  (  (2 << BUF_BASE) - 1  ), SCI1_RXBUF_OFFSET = SCI1_RXBUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI1_RXBUF_OFFSET + SCI1_RXBUF_MASK + 1  )
#endif /* SCI1_RXBUF */

#if ( SCI1_TXBUF_SIZE > 0 ) && !defined(SCI1_TXBUF_OFF)
#define SCI1_TXBUF_OFF  CUR_OFF
enum __sci1TxEnum_BUF_BASE {SCI1_TXBUF_MASK =  (  (2 << BUF_BASE) - 1  ), SCI1_TXBUF_OFFSET = SCI1_TXBUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SCI1_TXBUF_OFFSET + SCI1_TXBUF_MASK  + 1  )
#endif /* SCI1_TXBUF */

#if ( SPI0_BUF_SIZE > 0 ) && !defined(SPI0_BUF_OFF)
#define SPI0_BUF_OFF  CUR_OFF
enum __spi0Enum_BUF_BASE {SPI0_BUF_MASK =  (  (2 << BUF_BASE) - 1  ), SPI0_BUF_OFFSET = SPI0_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  SPI0_BUF_OFFSET + SPI0_BUF_MASK + 1  )
#endif /* SPI0_BUF */

#if ( SPI1_BUF_SIZE > 0 ) && !defined(SPI1_BUF_OFF)
#define SPI1_BUF_OFF  CUR_OFF
enum __spi1Enum_BUF_BASE {SPI1_BUF_MASK =  (  (2 << BUF_BASE) - 1  ), SPI1_BUF_OFFSET = SPI1_BUF_OFF};
#undef CURO_FF
#define CURO_FF (  SPI1_BUF_OFFSET + SPI1_BUF_MASK + 1  )
#endif /* SPI1_BUF */

#if ( ADCA_BUF_SIZE > 0 ) && !defined(ADCA_BUF_OFF)
#define ADCA_BUF_OFF  CUR_OFF
enum __adcAEnum_BUF_BASE {ADCA_BUF_MASK =  (  (2 << BUF_BASE) - 1  ), ADCA_BUF_OFFSET = ADCA_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  ADCA_BUF_OFFSET + ADCA_BUF_MASK + 1  )
#endif /* ADCA_BUF */

#if ( ADCB_BUF_SIZE > 0 ) && !defined(ADCB_BUF_OFF)
#define ADCB_BUF_OFF  CUR_OFF
enum __adcBEnum_BUF_BASE {ADCB_BUF_MASK =  (  (2 << BUF_BASE) - 1  ), ADCB_BUF_OFFSET = ADCB_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  ADCB_BUF_OFFSET + ADCB_BUF_MASK + 1  )
#endif /* ADCB_BUF */

#if ( PWMA_BUF_SIZE > 0 ) && !defined(PWMA_BUF_OFF)
#define PWMA_BUF_OFF  CUR_OFF
enum __pwmAEnum_BUF_BASE {PWMA_BUF_MASK = (  (2 << BUF_BASE) - 1  ), PWMA_BUF_OFFSET = PWMA_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  PWMA_BUF_OFFSET + PWMA_BUF_MASK + 1  )
#endif /* PWMA_BUF */

#if ( PWMB_BUF_SIZE > 0 ) && !defined(PWMB_BUF_OFF)
#define PWMB_BUF_OFF  CUR_OFF
enum __pwmBEnum_BUF_BASE {PWMB_BUF_MASK = (  (2 << BUF_BASE) - 1  ), PWMB_BUF_OFFSET = PWMB_BUF_OFF};
#undef CUR_OFF
#define CUR_OFF (  PWMB_BUF_OFFSET + PWMB_BUF_MASK + 1  )
#endif /* PWMB_BUF */

/************************ CIRCULAR BUFFER SETTING **********************************/

#if defined( SCI0_RXBUF_OFF )
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE SCI0_RXBUF_MASK + 1
	#else
		enum {ENUM_SCI0_RXBUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_SCI0_RXBUF_M01 + SCI0_RXBUF_MASK + 1
	#endif
#endif

#if defined( SCI0_TXBUF_OFF ) 
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE SCI0_TXBUF_MASK + 1
	#else
		enum{ ENUM_SCI0_TXBUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_SCI0_TXBUF_M01 + SCI0_TXBUF_MASK + 1
	#endif
#endif

#if defined( SCI1_RXBUF_OFF ) 
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE SCI1_RXBUF_MASK + 1
	#else
		enum {ENUM_SCI1_RXBUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_SCI1_RXBUF_M01 + SCI1_RXBUF_MASK + 1
	#endif
#endif

#if defined( SCI1_TXBUF_OFF ) 
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE SCI1_TXBUF_MASK
	#else
		enum {ENUM_SCI1_TXBUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_SCI1_TXBUF_M01 + SCI1_TXBUF_MASK + 1
	#endif
#endif

#if defined( SPI0_BUF_OFF ) 
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE SPI0_BUF_MASK
	#else
		enum {ENUM_SPI0_BUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_SPI0_BUF_M01 + SPI0_BUF_MASK + 1
	#endif
#endif

#if defined( SPI1_BUF_OFF ) 
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE SPI1_BUF_MASK
	#else
		enum {ENUM_SPI1_BUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_SPI1_BUF_M01 + SPI1_BUF_MASK + 1
	#endif
#endif

#if defined( ADCA_BUF_OFF ) 
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE ADCA_BUF_MASK
	#else
		enum {ENUM_ADCA_BUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_ADCA_BUF_M01 + ADCA_BUF_MASK + 1
	#endif
#endif

#if defined( ADCB_BUF_OFF ) 
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE ADCB_BUF_MASK
	#else
		enum {ENUM_ADCB_BUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_ADCB_BUF_M01 + ADCB_BUF_MASK + 1
	#endif
#endif

#if defined( PWMA_BUF_OFF ) 
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE PWMA_BUF_MASK
	#else
		enum {ENUM_PWMA_BUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_PWMA_BUF_M01 + PWMA_BUF_MASK + 1
	#endif
#endif


#if defined( PWMB_BUF_OFF ) 
	#if !defined( CURRENT_CIRCULAR_BUFFER_SIZE )
		#define CURRENT_CIRCULAR_BUFFER_SIZE PWMB_BUF_MASK
	#else
		enum {ENUM_PWMB_BUF_M01 = CURRENT_CIRCULAR_BUFFER_SIZE };
		#undef CURRENT_CIRCULAR_BUFFER_SIZE
		#define CURRENT_CIRCULAR_BUFFER_SIZE ENUM_PWMB_BUF_M01 + PWMB_BUF_MASK + 1
	#endif
#endif

#if defined( CURRENT_CIRCULAR_BUFFER_SIZE ) && ( CURRENT_CIRCULAR_BUFFER_SIZE > 0x800 )
	#error "Summary size  of the circular buffer cannot be greater than 2 K"
#endif


#endif /* __CONFIG_H */