📄 const.c
字号:
{
(io_sInterface *)&gpiopinInterfaceVT,
0, /* Base */
0x10 /* Mask */
},
{
(io_sInterface *)&gpiopinInterfaceVT,
0, /* Base */
0x20 /* Mask */
},
{
(io_sInterface *)&gpiopinInterfaceVT,
0, /* Base */
0x40 /* Mask */
},
{
(io_sInterface *)&gpiopinInterfaceVT,
0, /* Base */
0x80 /* Mask */
}
};
#endif /* defined( INCLUDE_GPIO ) */
/*****************************************************************************/
#if defined( INCLUDE_SWITCH )
const struct io_sSwitchInterface switch_io_interface = {
NULL,
NULL,
switchClose,
switchIoctllSWITCH_GET_STATE
};
const struct switch_sConfig switchdrvDevice =
{
(io_sInterface*)&switch_io_interface, &ArchIO.PortD, 1<<5
};
#endif /* INCLUDE_SWITCH */
#if defined( INCLUDE_BUTTON )
const io_sInterface button_io_interface = {
NULL,
NULL,
buttonClose,
NULL
};
#if defined(BSP_DEVICE_NAME_BUTTON_A)
struct button_sButton ButtonADeviceContext =
{(io_sInterface*)&button_io_interface,{0,0} };
#endif
#if defined(BSP_DEVICE_NAME_BUTTON_B)
struct button_sButton ButtonBDeviceContext =
{(io_sInterface*)&button_io_interface,{0,0} };
#endif
#endif /* INCLUDE_BUTTON */
/*****************************************************************************/
#if defined( INCLUDE_FLASH )
#if defined( INCLUDE_IO)
const io_sFlashInterface flash_io_interface = {
flashRead, flashWrite, flashClose,
{
ioctlFLASH_RESET, ioctlFLASH_MODE_VERIFY, ioctlFLASH_CMD_SEEK
}
};
#endif /* INCLUDE_IO */
struct sflashDesc PmemFlash = {
#if defined( INCLUDE_IO)
&flash_io_interface,
#else /* INCLUDE_IO */
0,
#endif /* INCLUDE_IO */
ioctlFLASH_RAW_ERASE_PMEM,
ioctlFLASH_RAW_READ_PMEM,
ioctlFLASH_RAW_WRITE_PMEM,
PMEM_FLASH_SIZE * sizeof(int) / PAGE_SIZE_P_IN_BYTES, /* 128k words, dakar */
/* PAGE_SIZE_P_IN_BYTES */ PAGE_SIZE_P_LOG + 1
};
struct sflashDesc XmemFlash = {
#if defined( INCLUDE_IO)
&flash_io_interface,
#else /* INCLUDE_IO */
0,
#endif /* INCLUDE_IO */
ioctlFLASH_RAW_ERASE_XMEM,
ioctlFLASH_RAW_READ_XMEM,
ioctlFLASH_RAW_WRITE_XMEM,
XMEM_FLASH_SIZE * sizeof(int) / PAGE_SIZE_IN_BYTES, /* 8k dakar */
/* PAGE_SIZE_IN_BYTES */ PAGE_SIZE_LOG + 1
};
struct sflashDesc BootFlash = {
#if defined( INCLUDE_IO)
&flash_io_interface,
#else /* INCLUDE_IO */
0,
#endif /* INCLUDE_IO */
ioctlFLASH_RAW_ERASE_BOOT,
ioctlFLASH_RAW_READ_BOOT,
ioctlFLASH_RAW_WRITE_BOOT,
BOOT_FLASH_SIZE * sizeof(int) / PAGE_SIZE_IN_BYTES, /* 8k dakar */
/* PAGE_SIZE_IN_BYTES */ PAGE_SIZE_LOG + 1
};
/* empirical formula for Flash divider */
#if PLL_MUL >= 31
#define FLASH_DIVIDER 19 /* 193.75 */
#elif PLL_MUL >= 30
#define FLASH_DIVIDER 18 /* 197.37 */
#elif PLL_MUL >= 28
#define FLASH_DIVIDER 17 /* 194.44 */
#elif PLL_MUL >= 26
#define FLASH_DIVIDER 16 /* 191.18 */
#elif PLL_MUL >= 25
#define FLASH_DIVIDER 15 /* 195.31 */
#elif PLL_MUL >= 23
#define FLASH_DIVIDER 14 /* 191.67 */
#elif PLL_MUL >= 21
#define FLASH_DIVIDER 13 /* 187.5 */
#elif PLL_MUL >= 20
#define FLASH_DIVIDER 12 /* 192.31 */
#elif PLL_MUL >= 18
#define FLASH_DIVIDER 11 /* 187.5 */
#elif PLL_MUL >= 17
#define FLASH_DIVIDER 10 /* 193.18 */
#elif PLL_MUL >= 15
#define FLASH_DIVIDER 9 /* 187.5 */
#elif PLL_MUL >= 13
#define FLASH_DIVIDER 9 /* 180.56 */
#elif PLL_MUL >= 12
#define FLASH_DIVIDER 7 /* 187.5 */
#elif PLL_MUL >= 9
#define FLASH_DIVIDER 6 /* 160.71 */
#elif PLL_MUL >= 7
#define FLASH_DIVIDER 4 /* 175 */
#elif PLL_MUL >= 5
#define FLASH_DIVIDER 3 /* 156.25 */
#elif PLL_MUL >= 4
#define FLASH_DIVIDER 2 /* 166.67 */
#else
#error incorrect PLL for flash programming
#endif
/* configured prescaler value */
const unsigned int flash_divider = (0x40 | FLASH_DIVIDER );
#endif /* INCLUDE_FLASH */
/*****************************************************************************/
#if defined( INCLUDE_BLDC )
#include "pwm.h"
#include "bldcdrv.h"
/*****************************************************************************/
/** Commutation table for EMV Motor Kit and independed PWM mode **/
/*****************************************************************************/
const mc_tPWMSignalMask bldcCommutationTableInd[8] = { MC_PWM_ALL_SIGNALS,
(MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_2 | MC_PWM_SIGNAL_0),
(MC_PWM_SIGNAL_4 | MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_1 | MC_PWM_SIGNAL_0),
(MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_4 | MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_0),
(MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_4 | MC_PWM_SIGNAL_2 | MC_PWM_SIGNAL_1),
(MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_2 | MC_PWM_SIGNAL_1 | MC_PWM_SIGNAL_0),
(MC_PWM_SIGNAL_4 | MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_2 | MC_PWM_SIGNAL_1),
MC_PWM_ALL_SIGNALS
};
/*****************************************************************************/
/** Commutation table for EMV Motor Kit and complementary PWM mode **/
/*****************************************************************************/
const pwm_sChannelControl bldcCommutationTableComp[8] = {
{ MC_PWM_ALL_SIGNALS, 0 },
{ (MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_2), (PWM_SWAP_1 | PWM_SWAP_0) },
{ (MC_PWM_SIGNAL_1 | MC_PWM_SIGNAL_0), (PWM_SWAP_2 | PWM_SWAP_0) },
{ (MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_4), (PWM_SWAP_0) },
{ (MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_4), (PWM_SWAP_2 | PWM_SWAP_1) },
{ (MC_PWM_SIGNAL_1 | MC_PWM_SIGNAL_0), (PWM_SWAP_1) },
{ (MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_2), (PWM_SWAP_2) },
{ MC_PWM_ALL_SIGNALS, 0 },
};
/*****************************************************************************/
/** Commutation table for sensorless control **/
/** EMV,LV,HV Motor Kits and independed PWM mode **/
/*****************************************************************************/
const mc_tPWMSignalMask BldcZC_Cmt_StepTable[] = {
(MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_4 | MC_PWM_SIGNAL_2 | MC_PWM_SIGNAL_1),
(MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_2 | MC_PWM_SIGNAL_1 | MC_PWM_SIGNAL_0),
(MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_2 | MC_PWM_SIGNAL_0),
(MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_4 | MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_0),
(MC_PWM_SIGNAL_4 | MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_1 | MC_PWM_SIGNAL_0),
(MC_PWM_SIGNAL_4 | MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_2 | MC_PWM_SIGNAL_1)
};
/*****************************************************************************/
/** Commutation table for sensorless control **/
/** EMV,LV,HV Motor Kits and complementary PWM mode **/
/*****************************************************************************/
const pwm_sChannelControl BldcZC_Cmt_StepTableComp [MAX_STEP_CMT+1] = {
{ (MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_4), (PWM_SWAP_2 | PWM_SWAP_1) },
{ (MC_PWM_SIGNAL_1 | MC_PWM_SIGNAL_0), (PWM_SWAP_1) },
{ (MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_2), (PWM_SWAP_1 | PWM_SWAP_0) },
{ (MC_PWM_SIGNAL_5 | MC_PWM_SIGNAL_4), (PWM_SWAP_0) },
{ (MC_PWM_SIGNAL_1 | MC_PWM_SIGNAL_0), (PWM_SWAP_2 | PWM_SWAP_0) },
{ (MC_PWM_SIGNAL_3 | MC_PWM_SIGNAL_2), (PWM_SWAP_2) }
};
/**************************************************************************************/
/** Zero Crossing tables for sensorless Zero Crossing EMV,LV,HV Motor Kits PWM mode **/
/** for (level)Zero Crosing bldczc algorithms (used with HW comparator Zero Crossing)**/
/**************************************************************************************/
const UWord16 Mask_ZCInpTab[MAX_STEP_CMT+1] = { MASK_ZC_PHASE_C, MASK_ZC_PHASE_A, MASK_ZC_PHASE_B,\
MASK_ZC_PHASE_C, MASK_ZC_PHASE_A, MASK_ZC_PHASE_B };
const UWord16 Expect_ZCInp_Tab [ MAX_STEP_CMT+1 ] [2] = \
{ {ZCINP_PHASE_C_Lev1,ZCINP_PHASE_C_Lev0},{ZCINP_PHASE_A_Lev0,ZCINP_PHASE_A_Lev1},\
{ZCINP_PHASE_B_Lev1,ZCINP_PHASE_B_Lev0},{ZCINP_PHASE_C_Lev0,ZCINP_PHASE_C_Lev1},\
{ZCINP_PHASE_A_Lev1,ZCINP_PHASE_A_Lev0},{ZCINP_PHASE_B_Lev0,ZCINP_PHASE_B_Lev1} };
/*************************************************************************************/
/** Zero Crossing tables for sensorless Zero Crossing EMV,LV,HV Motor Kits PWM mode **/
/** for edge Zero Crosing bldczc algorithms (used with ADC Zero Crossing) **/
/*************************************************************************************/
const UWord16 SetADC_ZCInp_Tab [ MAX_STEP_CMT+1 ] [ 2 ] =
{ {ADCZC_PHASE_C_NEG_POS,ADCZC_PHASE_C_POS_NEG},{ADCZC_PHASE_A_POS_NEG,ADCZC_PHASE_A_NEG_POS},\
{ADCZC_PHASE_B_NEG_POS,ADCZC_PHASE_B_POS_NEG},{ADCZC_PHASE_C_POS_NEG,ADCZC_PHASE_C_NEG_POS},\
{ADCZC_PHASE_A_NEG_POS,ADCZC_PHASE_A_POS_NEG},{ADCZC_PHASE_B_POS_NEG,ADCZC_PHASE_B_NEG_POS} };
const Word16 ZC_Phase_Tab [] = { INDEX_ZC_PHASE_C, INDEX_ZC_PHASE_A, INDEX_ZC_PHASE_B, \
INDEX_ZC_PHASE_C, INDEX_ZC_PHASE_A, INDEX_ZC_PHASE_B };
const int Expect_ZCInpFlag_Tab [ MAX_STEP_CMT+1 ] [2] = \
{ {1,0},{0,1},\
{1,0},{0,1},\
{1,0},{0,1} };
#endif /* INCLUDE_BLDC */
/*****************************************************************************/
#if defined( INCLUDE_IO )
/* establish open array here */
#define IO_PACK( b1, b2, b3, b4, e1, e2 ) \
((unsigned long)b1 << 24) | \
((unsigned long)b2 << 16) | \
((unsigned long)b3 << 8) | \
((unsigned long)b4), { e1, e2}
typedef handle_t (*openFunc) (const char *pName, int OFlags, ...);
const struct io_sDevice DeviceTable[] = {
#if defined( INCLUDE_LED )
{ ledOpen, (int)BSP_DEVICE_NAME_LED_0, },
#if defined( INCLUDE_LED_PWM )
{ledPWMOpen, (int)BSP_DEVICE_NAME_LED_PWM, },
#endif
#endif
#if defined( INCLUDE_GPIO )
{gpioOpen , (int)BSP_DEVICE_NAME_GPIO_A },
{gpioOpen , (int)BSP_DEVICE_NAME_GPIO_B },
{gpioOpen , (int)BSP_DEVICE_NAME_GPIO_C },
{gpioOpen , (int)BSP_DEVICE_NAME_GPIO_D },
{gpioOpen , (int)BSP_DEVICE_NAME_GPIO_E },
#endif
#if defined( INCLUDE_DECODER )
{decoderOpen , (int)BSP_DEVICE_NAME_DECODER_0 },
#endif
#if defined( INCLUDE_SCI )
{(openFunc)sciPreOpen, (int)BSP_DEVICE_NAME_SCI_0, },
{(openFunc)sciPreOpen, (int)BSP_DEVICE_NAME_SCI_1, },
#endif
#if defined( INCLUDE_MSCAN )
{canOpen, (int)BSP_DEVICE_NAME_CAN_0 },
#endif
#if defined( INCLUDE_FLEXCAN )
{ flexcanPreOpen, (int)BSP_DEVICE_NAME_CAN_0 },
#endif /* defined( INCLUDE_FLEXCAN ) */
#if defined( INCLUDE_SPI )
{spiOpen, (int)BSP_DEVICE_NAME_SPI_0 },
{spiOpen, (int)BSP_DEVICE_NAME_SPI_1 },
#endif
#if defined( INCLUDE_ADC )
{adcOpen, (int)BSP_DEVICE_NAME_ADC_A },
{adcOpen, (int)BSP_DEVICE_NAME_ADC_B },
{adcPinsOpen, (int)BSP_DEVICE_NAME_0_ADC_PIN },
{adcPinOpen, (int)BSP_DEVICE_NAME_AN_A_0 },
{adcPinOpen, (int)BSP_DEVICE_NAME_AN_B_0 },
#endif
#if defined( INCLUDE_FILEIO )
// {, fileioOpen, },
#endif
#if defined( INCLUDE_COP )
{copOpen, (int)BSP_DEVICE_NAME_COP },
#endif
#if defined( INCLUDE_PWM )
{pwmOpen, (int)BSP_DEVICE_NAME_PWM_A },
{pwmOpen, (int)BSP_DEVICE_NAME_PWM_B },
{pwmChannelOpen, (int)BSP_DEVICE_NAME_PWM_Ax1_0 },
{pwmChannelOpen, (int)BSP_DEVICE_NAME_PWM_Bx1_0 },
#endif
#if defined( INCLUDE_DAC )
{dacOpen, (int)BSP_DEVICE_NAME_DAC_A },
{dacOpen, (int)BSP_DEVICE_NAME_DAC_B },
{dacOpen, (int)BSP_DEVICE_NAME_DAC_C },
{dacOpen, (int)BSP_DEVICE_NAME_DAC_D },
#endif
#if defined( INCLUDE_SWITCH )
{switchOpen, (int)BSP_DEVICE_NAME_SWITCH_0 },
#endif
#if defined( INCLUDE_BUTTON )
{buttonOpen, (int)BSP_DEVICE_NAME_BUTTON_A },
{buttonOpen, (int)BSP_DEVICE_NAME_BUTTON_B },
#endif
#if defined( INCLUDE_FLASH )
{flashPmemOpen, (int)BSP_DEVICE_NAME_FLASH_PMEM },
{flashXmemOpen, (int)BSP_DEVICE_NAME_FLASH_XMEM },
{flashBootOpen, (int)BSP_DEVICE_NAME_FLASH_BOOT },
#endif /* defined( INCLUDE_FLASH ) */
{ no_open, 0 } /* error handler */
};
const int DeviceTableLen = sizeof(DeviceTable) / sizeof(DeviceTable[0]) - 1;
#endif /* INCLUDE_IO */
/* Structure to save/restore peripheral registers power on reset state */
#if 0
arch_PeriphRegState peripheralReg[archoff_registers_num] = {
{archoff_FlexCAN + BSP_PERIPH_BASE, archoff_FlexCAN_length},
{archoff_PortA + BSP_PERIPH_BASE, archoff_PortA_length},
{archoff_Sci0 + BSP_PERIPH_BASE, archoff_Sci0_length},
{archoff_Sci1 + BSP_PERIPH_BASE, archoff_Sci1_length},
{archoff_TimerA0 + BSP_PERIPH_BASE, archoff_TimerA0_length},
{archoff_TimerB0 + BSP_PERIPH_BASE, archoff_TimerB0_length},
{archoff_TimerC0 + BSP_PERIPH_BASE, archoff_TimerC0_length},
{archoff_TimerD0 + BSP_PERIPH_BASE, archoff_TimerD0_length},
{archoff_Flash + BSP_PERIPH_BASE, archoff_Flash_length}
};
UWord16 RegState[archoff_FlexCAN_length + archoff_PortA_length + archoff_Sci0_length + \
archoff_Sci1_length + archoff_TimerA0_length + archoff_TimerB0_length + \
archoff_TimerC0_length + archoff_TimerD0_length + archoff_Flash_length] ;
#endif
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