📄 arch_off.h
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archoff_PortC_IntAssertReg = (int) ( &((arch_sIO*)0)->PortC.IntAssertReg ),
archoff_PortC_IntEnableReg = (int) ( &((arch_sIO*)0)->PortC.IntEnableReg ),
archoff_PortC_IntPolarityReg = (int) ( &((arch_sIO*)0)->PortC.IntPolarityReg ),
archoff_PortC_IntPendingReg = (int) ( &((arch_sIO*)0)->PortC.IntPendingReg ),
archoff_PortC_IntEdgeSensReg = (int) ( &((arch_sIO*)0)->PortC.IntEdgeSensReg ),
archoff_PortC_RawDataInputReg = (int) ( &((arch_sIO*)0)->PortC.RawDataInputReg ),
archoff_PortD = (int) ( &((arch_sIO*)0)->PortD),
archoff_PortD_PullUpReg = (int) ( &((arch_sIO*)0)->PortD.PullUpReg ),
archoff_PortD_DataReg = (int) ( &((arch_sIO*)0)->PortD.DataReg ),
archoff_PortD_DataDirectionReg = (int) ( &((arch_sIO*)0)->PortD.DataDirectionReg ),
archoff_PortD_PeripheralReg = (int) ( &((arch_sIO*)0)->PortD.PeripheralReg ),
archoff_PortD_IntAssertReg = (int) ( &((arch_sIO*)0)->PortD.IntAssertReg ),
archoff_PortD_IntEnableReg = (int) ( &((arch_sIO*)0)->PortD.IntEnableReg ),
archoff_PortD_IntPolarityReg = (int) ( &((arch_sIO*)0)->PortD.IntPolarityReg ),
archoff_PortD_IntPendingReg = (int) ( &((arch_sIO*)0)->PortD.IntPendingReg ),
archoff_PortD_IntEdgeSensReg = (int) ( &((arch_sIO*)0)->PortD.IntEdgeSensReg ),
archoff_PortD_RawDataInputReg = (int) ( &((arch_sIO*)0)->PortD.RawDataInputReg ),
archoff_PortE = (int) ( &((arch_sIO*)0)->PortE),
archoff_PortE_PullUpReg = (int) ( &((arch_sIO*)0)->PortE.PullUpReg ),
archoff_PortE_DataReg = (int) ( &((arch_sIO*)0)->PortE.DataReg ),
archoff_PortE_DataDirectionReg = (int) ( &((arch_sIO*)0)->PortE.DataDirectionReg ),
archoff_PortE_PeripheralReg = (int) ( &((arch_sIO*)0)->PortE.PeripheralReg ),
archoff_PortE_IntAssertReg = (int) ( &((arch_sIO*)0)->PortE.IntAssertReg ),
archoff_PortE_IntEnableReg = (int) ( &((arch_sIO*)0)->PortE.IntEnableReg ),
archoff_PortE_IntPolarityReg = (int) ( &((arch_sIO*)0)->PortE.IntPolarityReg ),
archoff_PortE_IntPendingReg = (int) ( &((arch_sIO*)0)->PortE.IntPendingReg ),
archoff_PortE_IntEdgeSensReg = (int) ( &((arch_sIO*)0)->PortE.IntEdgeSensReg ),
archoff_PortE_RawDataInputReg = (int) ( &((arch_sIO*)0)->PortE.RawDataInputReg ),
archoff_Sim = (int) ( &((arch_sIO*)0)->Sim),
archoff_Sim_ControlReg = (int) ( &((arch_sIO*)0)->Sim.ControlReg ),
archoff_Sim_StatusReg = (int) ( &((arch_sIO*)0)->Sim.StatusReg ),
archoff_Sim_SoftwareControlReg = (int) ( &((arch_sIO*)0)->Sim.SoftwareControlReg[0] ),
archoff_Sim_MostSignificantHalfJTAGIDReg = (int) ( &((arch_sIO*)0)->Sim.MostSignificantHalfJTAGIDReg ),
archoff_Sim_LeastSignificantHalfJTAGIDReg = (int) ( &((arch_sIO*)0)->Sim.LeastSignificantHalfJTAGIDReg ),
archoff_Sim_PullupDisableReg = (int) ( &((arch_sIO*)0)->Sim.PullupDisableReg ),
archoff_Sim_TestReg = (int) ( &((arch_sIO*)0)->Sim.TestReg ),
archoff_Sim_ClockSelectReg = (int) ( &((arch_sIO*)0)->Sim.ClockSelectReg ),
archoff_Lvi = (int) ( &((arch_sIO*)0)->Lvi),
archoff_Lvi_ControlReg = (int) ( &((arch_sIO*)0)->Lvi.ControlReg ),
archoff_Lvi_StatusReg = (int) ( &((arch_sIO*)0)->Lvi.StatusReg ),
archoff_Lvi_TestReg = (int) ( &((arch_sIO*)0)->Lvi.TestReg ),
archoff_Flash = (int) ( &((arch_sIO*)0)->Flash),
archoff_Flash_ClockDividerReg = (int) ( &((arch_sIO*)0)->Flash.ClockDividerReg ),
archoff_Flash_ModuleControlReg = (int) ( &((arch_sIO*)0)->Flash.ModuleControlReg ),
archoff_Flash_Reserved1 = (int) ( &((arch_sIO*)0)->Flash.Reserved1 ),
archoff_Flash_SecurityHiReg = (int) ( &((arch_sIO*)0)->Flash.SecurityHiReg ),
archoff_Flash_SecurityLoReg = (int) ( &((arch_sIO*)0)->Flash.SecurityLoReg ),
archoff_Flash_ProtectionReg = (int) ( &((arch_sIO*)0)->Flash.ProtectionReg ),
archoff_Flash_ProtectionBootReg = (int) ( &((arch_sIO*)0)->Flash.ProtectionBootReg ),
archoff_Flash_UserStatusReg = (int) ( &((arch_sIO*)0)->Flash.UserStatusReg ),
archoff_Flash_CommandReg = (int) ( &((arch_sIO*)0)->Flash.CommandReg ),
#if !defined(DSP56838EVM)
archoff_FlexCAN = (int) ( &((arch_sIO*)0)->CAN ),
archoff_FlexCAN_ConfigReg = (int)&((arch_sIO*)0)->CAN.ConfigReg,
archoff_FlexCAN_TestConfigReg = (int)&((arch_sIO*)0)->CAN.TestConfigReg,
archoff_FlexCAN_Control0Reg = (int)&((arch_sIO*)0)->CAN.Control0Reg,
archoff_FlexCAN_Control1Reg = (int)&((arch_sIO*)0)->CAN.Control1Reg,
archoff_FlexCAN_TimerReg = (int)&((arch_sIO*)0)->CAN.TimerReg,
archoff_FlexCAN_MaxMBReg = (int)&((arch_sIO*)0)->CAN.MaxMBReg,
archoff_FlexCAN_IntMask2Reg = (int)&((arch_sIO*)0)->CAN.IntMask2Reg,
archoff_FlexCAN_RxGlobalMaskHiReg = (int)&((arch_sIO*)0)->CAN.RxGlobalMaskHiReg,
archoff_FlexCAN_RxGlobalMaskLoReg = (int)&((arch_sIO*)0)->CAN.RxGlobalMaskLoReg,
archoff_FlexCAN_Rx14MaskHiReg = (int)&((arch_sIO*)0)->CAN.Rx14MaskHiReg,
archoff_FlexCAN_Rx14MaskLoReg = (int)&((arch_sIO*)0)->CAN.Rx14MaskLoReg,
archoff_FlexCAN_Rx15MaskHiReg = (int)&((arch_sIO*)0)->CAN.Rx15MaskHiReg,
archoff_FlexCAN_Rx15MaskLoReg = (int)&((arch_sIO*)0)->CAN.Rx15MaskLoReg,
archoff_FlexCAN_StatusReg = (int)&((arch_sIO*)0)->CAN.StatusReg,
archoff_FlexCAN_IntMask1Reg = (int)&((arch_sIO*)0)->CAN.IntMask1Reg,
archoff_FlexCAN_IntFlags1Reg = (int)&((arch_sIO*)0)->CAN.IntFlags1Reg,
archoff_FlexCAN_ErrorCounterReg = (int)&((arch_sIO*)0)->CAN.ErrorCounterReg,
archoff_FlexCAN_Test1Reg_0 = (int)&((arch_sIO*)0)->CAN.Test1Reg[0],
archoff_FlexCAN_IntFlags2Reg = (int)&((arch_sIO*)0)->CAN.IntFlags2Reg,
archoff_FlexCAN_Test2Reg_0 = (int)&((arch_sIO*)0)->CAN.Test2Reg[0],
archoff_FlexCAN_Buffer_0 = (int)&((arch_sIO*)0)->CAN.Buffer[0],
#endif /* !defined(DSP56838EVM) */
archoff_end
};
/******************** Separate device offset ******************************************/
enum arch_SPI_offsets{
arch_sSPI_offset_ControlReg = (int)&((arch_sSPI*)0)->ControlReg,
arch_sSPI_offset_DataSizeReg = (int)&((arch_sSPI*)0)->DataSizeReg,
arch_sSPI_offset_DataRxReg = (int)&((arch_sSPI*)0)->DataRxReg,
arch_sSPI_offset_DataTxReg = (int)&((arch_sSPI*)0)->DataTxReg
};
enum arch_SCI_offsets{
arch_sSCI_offset_ControlReg = (int)&((arch_sSCI*)0)->ControlReg,
arch_sSCI_offset_StatusReg = (int)&((arch_sSCI*)0)->StatusReg,
arch_sSCI_offset_DataReg = (int)&((arch_sSCI*)0)->DataReg
};
enum arch_PWM_offsets{
arch_sPWM_offset_ControlReg = (int) &((arch_sPWM*)0) -> ControlReg ,
arch_sPWM_offset_FaultControlReg = (int) &((arch_sPWM*)0) -> FaultControlReg ,
arch_sPWM_offset_FaultStatusReg = (int) &((arch_sPWM*)0) -> FaultStatusReg ,
arch_sPWM_offset_OutputControlReg = (int) &((arch_sPWM*)0) -> OutputControlReg ,
arch_sPWM_offset_CounterReg = (int) &((arch_sPWM*)0) -> CounterReg ,
arch_sPWM_offset_CounterModuloReg = (int) &((arch_sPWM*)0) -> CounterModuloReg ,
arch_sPWM_offset_ValueReg = (int) &((arch_sPWM*)0) -> ValueReg[0] ,
arch_sPWM_offset_DeadtimeReg = (int) &((arch_sPWM*)0) -> DeadtimeReg ,
arch_sPWM_offset_DisableMapping1Reg = (int) &((arch_sPWM*)0) -> DisableMapping1Reg ,
arch_sPWM_offset_DisableMapping2Reg = (int) &((arch_sPWM*)0) -> DisableMapping2Reg ,
arch_sPWM_offset_ConfigReg = (int) &((arch_sPWM*)0) -> ConfigReg ,
arch_sPWM_offset_ChannelControlReg = (int) &((arch_sPWM*)0) -> ChannelControlReg ,
arch_sPWM_offset_PortReg = (int) &((arch_sPWM*)0) -> PortReg
};
enum arch_ADC_offsets{
arch_sADC_offset_Control1Reg = (int)&((arch_sADC*)0)->Control1Reg,
arch_sADC_offset_Control2Reg = (int)&((arch_sADC*)0)->Control2Reg,
arch_sADC_offset_ZeroCrossControlReg= (int)&((arch_sADC*)0)->ZeroCrossControlReg,
arch_sADC_offset_ChannelList1Reg = (int)&((arch_sADC*)0)->ChannelList1Reg,
arch_sADC_offset_ChannelList2Reg = (int)&((arch_sADC*)0)->ChannelList2Reg,
arch_sADC_offset_DisableReg = (int)&((arch_sADC*)0)->DisableReg,
arch_sADC_offset_StatusReg = (int)&((arch_sADC*)0)->StatusReg,
arch_sADC_offset_LimitStatusReg = (int)&((arch_sADC*)0)->LimitStatusReg,
arch_sADC_offset_ZeroCrossStatusReg = (int)&((arch_sADC*)0)->ZeroCrossStatusReg,
arch_sADC_offset_Result0Reg = (int)&((arch_sADC*)0)->ResultReg[0],
arch_sADC_offset_Result1Reg = (int)&((arch_sADC*)0)->ResultReg[1],
arch_sADC_offset_Result2Reg = (int)&((arch_sADC*)0)->ResultReg[2],
arch_sADC_offset_Result3Reg = (int)&((arch_sADC*)0)->ResultReg[3],
arch_sADC_offset_Result4Reg = (int)&((arch_sADC*)0)->ResultReg[4],
arch_sADC_offset_Result5Reg = (int)&((arch_sADC*)0)->ResultReg[5],
arch_sADC_offset_Result6Reg = (int)&((arch_sADC*)0)->ResultReg[6],
arch_sADC_offset_Result7Reg = (int)&((arch_sADC*)0)->ResultReg[7],
arch_sADC_offset_LowLimit0Reg = (int)&((arch_sADC*)0)->LowLimitReg[0],
arch_sADC_offset_LowLimit1Reg = (int)&((arch_sADC*)0)->LowLimitReg[1],
arch_sADC_offset_LowLimit2Reg = (int)&((arch_sADC*)0)->LowLimitReg[2],
arch_sADC_offset_LowLimit3Reg = (int)&((arch_sADC*)0)->LowLimitReg[3],
arch_sADC_offset_LowLimit4Reg = (int)&((arch_sADC*)0)->LowLimitReg[4],
arch_sADC_offset_LowLimit5Reg = (int)&((arch_sADC*)0)->LowLimitReg[5],
arch_sADC_offset_LowLimit6Reg = (int)&((arch_sADC*)0)->LowLimitReg[6],
arch_sADC_offset_LowLimit7Reg = (int)&((arch_sADC*)0)->LowLimitReg[7],
arch_sADC_offset_HighLimit0Reg = (int)&((arch_sADC*)0)->HighLimitReg[0],
arch_sADC_offset_HighLimit1Reg = (int)&((arch_sADC*)0)->HighLimitReg[1],
arch_sADC_offset_HighLimit2Reg = (int)&((arch_sADC*)0)->HighLimitReg[2],
arch_sADC_offset_HighLimit3Reg = (int)&((arch_sADC*)0)->HighLimitReg[3],
arch_sADC_offset_HighLimit4Reg = (int)&((arch_sADC*)0)->HighLimitReg[4],
arch_sADC_offset_HighLimit5Reg = (int)&((arch_sADC*)0)->HighLimitReg[5],
arch_sADC_offset_HighLimit6Reg = (int)&((arch_sADC*)0)->HighLimitReg[6],
arch_sADC_offset_HighLimit7Reg = (int)&((arch_sADC*)0)->HighLimitReg[7],
arch_sADC_offset_Offset0Reg = (int)&((arch_sADC*)0)->OffsetReg[0],
arch_sADC_offset_Offset1Reg = (int)&((arch_sADC*)0)->OffsetReg[1],
arch_sADC_offset_Offset2Reg = (int)&((arch_sADC*)0)->OffsetReg[2],
arch_sADC_offset_Offset3Reg = (int)&((arch_sADC*)0)->OffsetReg[3],
arch_sADC_offset_Offset4Reg = (int)&((arch_sADC*)0)->OffsetReg[4],
arch_sADC_offset_Offset5Reg = (int)&((arch_sADC*)0)->OffsetReg[5],
arch_sADC_offset_Offset6Reg = (int)&((arch_sADC*)0)->OffsetReg[6],
arch_sADC_offset_Offset7Reg = (int)&((arch_sADC*)0)->OffsetReg[7],
arch_sADC_offset_PowerControl = (int)&((arch_sADC*)0)->PowerControl
};
enum arch_FlexCAN_offsets{
devoff_FlexCANBuffer_CtlStatusReg = (int)&((arch_sFlexCANBuffer*)0)->CtlStatusReg,
devoff_FlexCANBuffer_IdRegHi = (int)&((arch_sFlexCANBuffer*)0)->IdRegHi,
devoff_FlexCANBuffer_IdRegLo = (int)&((arch_sFlexCANBuffer*)0)->IdRegLo,
devoff_FlexCANBuffer_DataSegReg_0 = (int)&((arch_sFlexCANBuffer*)0)->DataSegReg[0],
devoff_FlexCAN_ConfigReg = (int)&((arch_sFlexCAN*)0)->ConfigReg,
devoff_FlexCAN_TestConfigReg = (int)&((arch_sFlexCAN*)0)->TestConfigReg,
devoff_FlexCAN_Control0Reg = (int)&((arch_sFlexCAN*)0)->Control0Reg,
devoff_FlexCAN_Control1Reg = (int)&((arch_sFlexCAN*)0)->Control1Reg,
devoff_FlexCAN_TimerReg = (int)&((arch_sFlexCAN*)0)->TimerReg,
devoff_FlexCAN_MaxMBReg = (int)&((arch_sFlexCAN*)0)->MaxMBReg,
devoff_FlexCAN_IntMask2Reg = (int)&((arch_sFlexCAN*)0)->IntMask2Reg,
devoff_FlexCAN_RxGlobalMaskHiReg = (int)&((arch_sFlexCAN*)0)->RxGlobalMaskHiReg,
devoff_FlexCAN_RxGlobalMaskLoReg = (int)&((arch_sFlexCAN*)0)->RxGlobalMaskLoReg,
devoff_FlexCAN_Rx14MaskHiReg = (int)&((arch_sFlexCAN*)0)->Rx14MaskHiReg,
devoff_FlexCAN_Rx14MaskLoReg = (int)&((arch_sFlexCAN*)0)->Rx14MaskLoReg,
devoff_FlexCAN_Rx15MaskHiReg = (int)&((arch_sFlexCAN*)0)->Rx15MaskHiReg,
devoff_FlexCAN_Rx15MaskLoReg = (int)&((arch_sFlexCAN*)0)->Rx15MaskLoReg,
devoff_FlexCAN_StatusReg = (int)&((arch_sFlexCAN*)0)->StatusReg,
devoff_FlexCAN_IntMask1Reg = (int)&((arch_sFlexCAN*)0)->IntMask1Reg,
devoff_FlexCAN_IntFlags1Reg = (int)&((arch_sFlexCAN*)0)->IntFlags1Reg,
devoff_FlexCAN_ErrorCounterReg = (int)&((arch_sFlexCAN*)0)->ErrorCounterReg,
devoff_FlexCAN_Test1Reg_0 = (int)&((arch_sFlexCAN*)0)->Test1Reg[0], /* MCntrl SCntrl*/
devoff_FlexCAN_IntFlags2Reg = (int)&((arch_sFlexCAN*)0)->IntFlags2Reg,
devoff_FlexCAN_Test2Reg_0 = (int)&((arch_sFlexCAN*)0)->Test2Reg[0],
devoff_FlexCAN_Buffer_0 = (int)&((arch_sFlexCAN*)0)->Buffer[0]
};
#endif /* ARCH_OFF_H */⌨️ 快捷键说明
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