📄 mem_test.asm
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;*********************************************************************
; File Name: mem_test.asm
; Target System: C24x Evaluation Board
;
; Description: This program checks the memory locations B0, B1,
; B2, and External Data of theF240 EVM Development Board.
;
; Flashes the LEDs according to the results.
; 1. Start flash - Even LEDs (2,4,6,8)
; then odd LEDs (1,3,5,7)
; 2. B0 flash
; 3. B1 flash
; 4. B2 flash
; 5. Data flash
;
; LEDS DS1-DS4 = Okay; DS5-DS8 = Not Okay
;
; Errors per block can be viewed in variables
; B0_ERRORS, B1_ERRORS, B2_ERRORS, DATA_ERRORS
; by using a watch window.
;
; Words in memory locations are set
; HIGH if bad; LOW if okay
;
; Revision: 1.00
;
;*********************************************************************
.include f240regs.h
;---------------------------------------------------------------------
; I/O Mapped EVM Register Declarations
;---------------------------------------------------------------------
DAC0 .set 0000h ;DAC Channel 0 Register
DAC1 .set 0001h ;DAC Channel 1 Register
DAC2 .set 0002h ;DAC Channel 2 Register
DAC3 .set 0003h ;DAC Channel 3 Register
DAC_UPDATE .set 0004h ;DAC Update Register
SWITCHES .set 0008h ;DIP Switch Register
LEDS .set 000Ch ;LEDs Register
temp .set 8000h
;---------------------------------------------------------------------
; Variable Declarations for on chip RAM Blocks
;---------------------------------------------------------------------
.bss GPR0,1 ;General Purpose Register
.bss GPR1,1 ;General Purpose Register
.bss LED_STATUS,1 ;LED Status Register
.bss RPT_NUM,1
.bss mSEC,1
.bss B0_ERRORS,1
.bss B1_ERRORS,1
.bss B2_ERRORS,1
.bss DATA_ERRORS,1
;---------------------------------------------------------------------
; Constant Declarations
;---------------------------------------------------------------------
B0_SADDR .set 00200h ;Block B0 start address
B0_EADDR .set 002FFh ;Block B0 end address
B0_LENGTH .set 0100h ;Length of Block B0
B1_SADDR .set 00300h ;Block B1 start address
B1_EADDR .set 003FFh ;Block B1 end address
B1_LENGTH .set 0100h ;Length of Block B1
B2_SADDR .set 00060h ;Block B2 start address
B2_EADDR .set 0007Fh ;Block B2 end address
B2_LENGTH .set 00020h ;Length of Block B2
DATA_SADDR .set 08000h ;External Data Start Address
DATA_EADDR .set 0FFFFh ;External Data End Address
DATA_LENGTH .set 08000h ;Length of Data
OCCUPIED .set 9 ;Number of B2 locations used with .bss
;---------------------------------------------------------------------
; Vector address declarations
;---------------------------------------------------------------------
.sect ".vectors"
RSVECT B START ; Reset Vector
INT1 B PHANTOM ; Interrupt Level 1
INT2 B PHANTOM ; Interrupt Level 2
INT3 B PHANTOM ; Interrupt Level 3
INT4 B PHANTOM ; Interrupt Level 4
INT5 B PHANTOM ; Interrupt Level 5
INT6 B PHANTOM ; Interrupt Level 6
RESERVED B PHANTOM ; Reserved
SW_INT8 B PHANTOM ; User S/W Interrupt
SW_INT9 B PHANTOM ; User S/W Interrupt
SW_INT10 B PHANTOM ; User S/W Interrupt
SW_INT11 B PHANTOM ; User S/W Interrupt
SW_INT12 B PHANTOM ; User S/W Interrupt
SW_INT13 B PHANTOM ; User S/W Interrupt
SW_INT14 B PHANTOM ; User S/W Interrupt
SW_INT15 B PHANTOM ; User S/W Interrupt
SW_INT16 B PHANTOM ; User S/W Interrupt
TRAP B PHANTOM ; Trap vector
NMINT B PHANTOM ; Non-maskable Interrupt
EMU_TRAP B PHANTOM ; Emulator Trap
SW_INT20 B PHANTOM ; User S/W Interrupt
SW_INT21 B PHANTOM ; User S/W Interrupt
SW_INT22 B PHANTOM ; User S/W Interrupt
SW_INT23 B PHANTOM ; User S/W Interrupt
;=====================================================================
; M A I N C O D E - starts here
;=====================================================================
.text
NOP
START: SETC INTM ;Disable interrupts
SPLK #0000h,IMR ;Mask all core interrupts
LACC IFR ;Read Interrupt flags
SACL IFR ;Clear all interrupt flags
CLRC SXM ;Clear Sign Extension Mode
CLRC OVM ;Reset Overflow Mode
CLRC CNF ;Config Block B0 to Data mem
LDP #00E0h ;DP for addresses 7000h-707Fh
SPLK #00BBh,CKCR1 ;CLKIN(OSC)=10MHz,CPUCLK=20MHz
SPLK #00C3h,CKCR0 ;CLKMD=PLL Enable,SYSCLK=CPUCLK/2
SPLK #40C0h,SYSCR ;CLKOUT=CPUCLK
SPLK #006Fh, WDCR ;Disable WD if VCCP=5V (JP5 in pos. 2-3)
KICK_DOG ;Reset Watchdog
SPLK #0h,GPR0 ;Set wait state generator for:
OUT GPR0,WSGR ;Program Space, 0 wait states
;Data Space, 0 wait states
;I/O Space, 0 wait states
SPLK #0h,LED_STATUS ;Clear the LED Status Register
OUT LED_STATUS,LEDS ;Turn off all the LEDS
SPLK #0h,B0_ERRORS ;Initialize the number of errors in B0
SPLK #0h,B1_ERRORS ;Initialize the number of errors in B1
SPLK #0h,B2_ERRORS ;Initialize the number of errors in B2
SPLK #0h,DATA_ERRORS ;Initialize the number of errors in DATA
LAR AR1,#B0_SADDR ;AR1 = Start Address of B0
LAR AR2,#B0_LENGTH-1 ;AR2 = Length of B0 - 1
LAR AR3,#B0_ERRORS ;AR3 = Number of errors in B0
LAR AR4,#GPR1 ;AR4 = General Purpose Register
CALL CHECK_RAM ;Check all the locations in block B0
LAR AR1,#B1_SADDR ;AR1 = Start Address of B1
LAR AR2,#B1_LENGTH-1 ;AR2 = Length of B1 - 1
LAR AR3,#B1_ERRORS ;AR3 = Number of errors in B1
CALL CHECK_RAM ;Check all the locations in block B1
LAR AR1,#B2_SADDR+OCCUPIED ;AR1 = Address in B2 after .bss variables
LAR AR2,#B2_LENGTH-1-OCCUPIED ;AR2 = Length of B2 - 1 - .bss variables
LAR AR3,#B2_ERRORS ;AR3 = Number of errors in B2
CALL CHECK_RAM ;Check all the unused locations in block B2
LAR AR1,#DATA_SADDR ;AR1 = Start address of External Data
LAR AR2,#DATA_LENGTH-1 ;Ar2 = Lenght of Exaternal Data - 1
LAR AR3,#DATA_ERRORS ;AR3 = Number of errors in External Data
CALL CHECK_RAM ;Check all the locations in External Data
LDP #0 ;DP = 0; Addresses 0000h to 007Fh
SPLK #5000,mSEC ;mSEC = 5000 -> 0.5 sec
CALL FLASHING ;Flash the LEDS according to the results
;=====================================================================
; Routine Name: FLASHING
; Originator: Allister Chang
;
; Description: Routine for the end of the program. Continually
; flashes the LEDS, identifing the areas of RAM that
; did not pass.
;
; Starts by flashing every other LED corresponding to AA
; then flashes the other LEDs corresponding to 55
; Next flash indicates B0
; if LEDs 1-4 lit = Okay; if LEDs 5-8 lit = Not Okay
; Next flash indicates B1, then B2, then external DATA
; Flash cycle then repeats
;
;=====================================================================
FLASHING SPLK #00AAh,LED_STATUS ;Store AAh into LED_STATUS
OUT LED_STATUS,LEDS ;Light LEDS, DS8,DS6,DS4,DS2
CALL mS_DELAY ;Delay
SPLK #0055h,LED_STATUS ;Store 55h into LED_STATUS
OUT LED_STATUS,LEDS ;Light LEDS, DS7,DS5,DS3,DS1
CALL mS_DELAY ;Delay
LACC B0_ERRORS ;ACC = Number of B0_ERRORS
CC OKAY,EQ ;If 0, light DS1-DS4
LACC B0_ERRORS ;Reload Number of B0_ERRORS
CC BAD,NEQ ; need to reload because if
; OKAY is already executed
; ACC will not equal 0.
;If not 0, light DS5-DS8
LACC B1_ERRORS ;ACC = Number of B1_ERRORS
CC OKAY,EQ ;If 0, light DS1-DS4
LACC B1_ERRORS
CC BAD,NEQ ;If not 0, light DS5-DS8
LACC B2_ERRORS ;ACC = Number of B2_ERRORS
CC OKAY,EQ ;If 0, light DS1-DS4
LACC B2_ERRORS
CC BAD,NEQ ;If not 0, light DS5-DS8
LACC DATA_ERRORS ;ACC = Number of DATA_ERRORS
CC OKAY,EQ ;If 0, light DS1-DS4
LACC DATA_ERRORS
CC BAD,NEQ ;If not 0, light DS5-DS8
B FLASHING ;Repeat Flash Cycle
;=====================================================================
; Routine Name: OKAY
; Originator: Allister Chang
;
; Description: Flashes the LEDs when the number of errors in a
; RAM block equals 0. LEDs lit equivalent to 0Fh
;
;=====================================================================
OKAY SPLK #000Fh,LED_STATUS ;Set lower bits of LED_STATUS high
OUT LED_STATUS,LEDS ;Light lower LEDS - DS1-DS4
CALL mS_DELAY ;Delay
SPLK #0000h,LED_STATUS ;Clear the LED_STATUS
OUT LED_STATUS,LEDS ;Turn off LEDs
CALL mS_DELAY ;Delay
RET ;Exit Routine
;=====================================================================
; Routine Name: BAD
; Originator: Allister Chang
;
; Description: Flashes the LEDs when the number of errors in a RAM
; block does not equal 0. LEDs lit equivalent to F0h
;
;=====================================================================
BAD SPLK #00F0h,LED_STATUS ;Set upper bits of LED_STATUS high
OUT LED_STATUS,LEDS ;Light upper LEDS - DS5-DS8
CALL mS_DELAY ;Delay
SPLK #0000h,LED_STATUS ;Clear the LED_STATUS
OUT LED_STATUS,LEDS ;Turn off LEDS
CALL mS_DELAY ;Delay
RET ;Exit Routine
;=====================================================================
; Routine Name: CHECK_RAM
; Originator: Allister Chang
;
; Description: Checks all of the words in a particular block of
; memory. Uses the "checkboard" method (5555/AAAA)
; to ensure no leakage between bits.
;
; Calling Convention:
;
; Variables on Entry on Exit
; --------------------------------------------------------------------
; ARP XX AR1
; ACC XX XX
; AR1 Start address of block End address of block
; AR2 Length of block - 1 FFFFh
; AR3 Addr. of Error Variable Address of Error Variable
; AR4 Addr. of GPR1 Addr. GPR1
; --------------------------------------------------------------------
;=====================================================================
CHECK_RAM MAR *,AR1 ;ARP = AR1
SPLK #5555h,*,AR4 ;Store 5555h into test location, ARP = AR4
SPLK #0000h,*,AR1 ;Clear the data bus, ARP = AR1
LACC * ;Load the value from test location
SUB #5555h ;Subtract 5555h from value
BCND MARK,NEQ ;Equals 0 -> location is okay
;else set all bits high
SPLK #0AAAAh,*,AR4 ;Store AAAAh into test location, ARP = AR4
SPLK #0000h,*,AR1 ;Clear the data bus, ARP = AR1
LACC * ;Load value from test location
SUB #0AAAAh ;Subtract AAAAh from value
BCND MARK,NEQ ;Equals 0 -> location is okay
;else set all bits high
SPLK #0000h,*+,AR2 ;Clear the bits from the test location if okay
RESUME BANZ CHECK_RAM,*-,AR1 ;Repeat check for the next test location
RET ;Exit routine
MARK SPLK #0FFFFh,*+,AR3 ;Set all bits high, ARP = AR3
LACC * ;Load ACC with number of Errors
ADD #1 ;Increment Error Counter
SACL *,0,AR2 ;Store new value of Error Counter, ARP = AR2
BANZ CHECK_RAM,*-,AR1 ;Repeat check for the next location
RET ;Exit routine
;=====================================================================
; Routine Name: mS_DELAY
; Originator: Scott Roller
;
; Description: Produces a multiple of 0.1mS delays using the RPT
; instruction. The Delay produced is based on the
; value loaded in mSEC (i.e. Delay = mSEC x 0.1mS).
; Indirect addressing is used to count the number
; of times the delay loop is repeated.
;
; Calling Convention:
;
; Variables on Entry on Exit
; --------------------------------------------------------------------
; DP XX 0x0000
; ARP XX AR1
; ACC XX XX
; mSEC value in 0.1 mS un-touched
; --------------------------------------------------------------------
;=====================================================================
mS_DELAY: LDP #0h ;DP-->0000h-007Fh
LACC #2000 ;Load RPT value to GPR0
SACL RPT_NUM
LAR AR1,mSEC ;Set AR0 to generate a
MAR *,AR1 ;(AR0*0.1)mSEC delay loop
mS_LOOP: LDP #0h ;DP-->0000h-007Fh
RPT RPT_NUM ;2000 cycles = 0.1mS
NOP ;1 cycle
BANZ mS_LOOP ;Repeat DELAY_LOOP
RET ;Return from DELAY SR
;=====================================================================
; I S R - PHANTOM
;
; Description: Dummy ISR, used to trap spurious interrupts.
;
; Modifies: Nothing
;
; Last Update: 16 June 95
;=====================================================================
PHANTOM KICK_DOG ;Resets WD counter
B PHANTOM
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