📄 kaihuan.asm.bak
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;******??????SVPWM??????????????????????????????????????************
;*********************************************************************
; FILE NAME: SVPWM.ASM
;*********************************************************************
.INCLUDE F240REGS.H
ST0 .SET 0
ST1 .SET 1
BLK2E .SET 7FH
WR0 .SET 300H
WR7 .SET 307H
WR8 .SET 308H
WR23 .SET 317H
;I/O MAPPED DAC CHANNEL
DAC0 .SET 0000H ;DAC0 CHANNEL REGISTER
DAC1 .SET 0001H ;DAC1
DAC2 .SET 0002H ;DAC2
DAC3 .SET 0003H ;DAC3
DACUPDT .SET 0004H ;DAC UPDATE REGISTER
;---------------------------------------------------------------------
; I/O MAPPED EVM REGISTER DECLARATIONS
;---------------------------------------------------------------------
LED1 .SET 8000H
LED2 .SET 8002H
SWITCH .SET 8004H
PB .SET 8006H
PA .SET 8008H
;--------------------------------
.DATA
UTAB:
.WORD 172,0;0
.WORD 166,44;15
.WORD 149,86;30
.WORD 122,122;45
.WORD 86,149;60
.WORD 44,166;75
.WORD 0,340;90
.WORD -44,166;105
.WORD -86,149;120
.WORD -122,122;135
.WORD -149,86;150
.WORD -166,44;165
.WORD -172,0;180
.WORD -166,-44;195
.WORD -149,-86;210
.WORD -122,-122;225
.WORD -86,-149;240
.WORD -44,-166;255
.WORD 0,-172;270
.WORD 44,-166;285
.WORD 86,-149;300
.WORD 122,-122;315
.WORD 149,-86;330
.WORD 166,-44;345
UK .SET 0 ;0------23
EDC .SET 43A8H;24D0H
DEGREE0 .SET 00H
DEGREE45 .SET 180H
DEGREE60 .SET 200H
DEGREE90 .SET 300H
DEGREE180 .SET 600H
DEGREE270 .SET 900H
DEGREE360 .SET 0C00H
SQRT2 .SET 05A82H
SQRT3 .SET 06ED9H
MK .SET 36621
;---------------------------------------------------------------------
; PAGE DATA POINT
;---------------------------------------------------------------------
DP_0 .SET 00H
PAGE_VAR .SET 04H
DP_2 .SET 06H
DP_PF0 .SET 0E0H
DP_PF1 .SET 0E1H
DP_EV .SET 0E8H
;---------------------------------------------------------------------
; VARIABLE DECLARATIONS FOR ON CHIP RAM BLOCKS B0
;---------------------------------------------------------------------
.BSS GPR0,1 ;GENERAL PURPOSE REGISTER.
.BSS GPR1,1
.BSS SWITCH_ST,1
.BSS FL, 1 ;ERROR FLAG
.BSS VALUEL,1
.BSS VALUEH,1
.BSS DIVIDE, 1
.BSS FGD,1
.BSS FGD1,1
.BSS FREL,1 ; AD9
.BSS TCON,1 ; TIME COUNTER
.BSS CNT,1
.BSS DELTA,1
.BSS CNTI,1
.BSS THITA,1
.BSS THITAR,1
.BSS GPIR,1
;---------------------------------------------------------RY
.BSS WPULSE,1
.BSS WTIME0,1
.BSS WTIME,1
.BSS MK1,1
.BSS WR_G,1
.BSS WR_R,1
.BSS WR_A,1
.BSS WR_R0,1
.BSS WR_R1,1
.BSS WR_R2,1
.BSS WR_R3,1
.BSS WR_R4,1
.BSS WR_R5,1
.BSS WR_R6,1
.BSS WR_R7,1
.BSS ONE,1
.BSS TEN,1
.BSS HUNDRED,1
.BSS THOUSAND,1
.BSS UDMAX,1
.BSS UQMAX,1
.BSS UDG,1
.BSS UQG,1
.BSS UDQTHITA,1
.BSS USG,1
.BSS USTHITA,1
.BSS ED,1
.BSS REAL,1
.BSS IMAG,1
.BSS P_VALUE,1
.BSS P_THITA,1
.BSS P_GPRP,1
.BSS BUFFER0,1
.BSS BUFFER1,1
.BSS BUFFER2,1
.BSS BUFFER3,1
.BSS SECTOR,1
.BSS MD,1
.BSS SINL,1
.BSS SINM,1
.BSS TL,1
.BSS TM,1
.BSS IA,1
.BSS IB,1
.BSS IA0,1
.BSS IB0,1
.BSS IA1,1
.BSS IB1,1
.BSS IA2,1
.BSS IB2,1
.BSS IA3,1
.BSS IB3,1
.BSS IA4,1
.BSS IB4,1
.BSS IA5,1
.BSS IB5,1
.BSS IA6,1
.BSS IB6,1
.BSS IA7,1
.BSS IB7,1
.BSS ISALF,1
.BSS ISBET,1
.BSS EDS,1
.BSS EDS0,1
.BSS EDS1,1
.BSS EDS2,1
.BSS EDS3,1
.BSS EDS4,1
.BSS EDS5,1
.BSS EDS6,1
.BSS EDS7,1
.BSS ADCNT,1
.BSS R_SQRT3,1
.BSS IC,1
.BSS PB_STATUS,1
.BSS ISD1,1 ;ROTATE CALCULATION
.BSS ISQ1,1
.BSS COS,1
.BSS SIN,1
.BSS SECTOR1,1 ;1-4 QUADRANT
.BSS THITA1,1 ;ANGLE IN 0~90 DEGREE
.BSS ISD2,1
.BSS ISQ2,1
.BSS OUT0,1
.BSS OUT1,1
.BSS OUT2,1
.BSS OUT3,1
.BSS ISD,1
.BSS ISQ,1
.BSS PA_STATUS,1
.BSS FLAG0,1; A/D E & GD,SPEED DIRECTION,TEST SPEED,STOP,RUN
;---------------------------------------------------------RY
; VECTOR ADDRESS DECLARATIONS
;---------------------------------------------------------------------
.SECT ".VECTORS"
RSVECT B FORMAT ; RESET VECTOR
INT1 B PHANTOM ; INTERRUPT LEVEL 1
INT2 B EVAINT ; INTERRUPT LEVEL 2
INT3 B EVBINT ; INTERRUPT LEVEL 3
INT4 B EVCINT ; INTERRUPT LEVEL 4
INT5 B PHANTOM ; INTERRUPT LEVEL 5
INT6 B ADCOMINT ; INTERRUPT LEVEL 6
RESERVED B PHANTOM ; RESERVED
SW_INT8 B PHANTOM ; USER S/W INTERRUPT
SW_INT9 B PHANTOM ; USER S/W INTERRUPT
SW_INT10 B PHANTOM ; USER S/W INTERRUPT
SW_INT11 B PHANTOM ; USER S/W INTERRUPT
SW_INT12 B PHANTOM ; USER S/W INTERRUPT
SW_INT13 B PHANTOM ; USER S/W INTERRUPT
SW_INT14 B PHANTOM ; USER S/W INTERRUPT
SW_INT15 B PHANTOM ; USER S/W INTERRUPT
SW_INT16 B PHANTOM ; USER S/W INTERRUPT
TRAP B PHANTOM ; TRAP VECTOR
NMINT B PHANTOM ; NON-MASKABLE INTERRUPT
EMU_TRAP B PHANTOM ; EMULATOR TRAP
SW_INT20 B PHANTOM ; USER S/W INTERRUPT
SW_INT21 B PHANTOM ; USER S/W INTERRUPT
SW_INT22 B PHANTOM ; USER S/W INTERRUPT
SW_INT23 B PHANTOM ; USER S/W INTERRUPT
;===============================================================
; M A I N C O D E - STARTS HERE
;===============================================================
.TEXT
FORMAT:
CLRC XF
SETC INTM ;DISABLE INTERRUPTS
SETC SXM ;SET SIGN EXTENSION MODE
CLRC OVM ;RESET OVERFLOW MODE
CLRC CNF ;CONFIG BLOCK B0 TO DATA MEM
LDP #DP_0 ;PAGE_00H
SPLK #0000H,IMR ;MASK ALL CORE INTERRUPTS
LACC IFR ;READ INTERRUPT FLAGS
SACL IFR ;CLEAR ALL INTERRUPT FLAGS
LDP #DP_PF0 ;0E0H DP FOR ADDRESSES 7000H-707FH
SPLK #00BBH,CKCR1 ;CLKIN(OSC)=10MHZ,CPUCLK=20MHZ
SPLK #00C3H,CKCR0 ;CLKMD=PLL ENABLE,SYSCLK=CPUCLK/2
SPLK #40C0H,SYSCR ;CLKOUT=CPUCLK
SPLK #006FH,WDCR ;DISABLE WD IF VCCP=5V (JP5 IN POS. 2-3)
KICK_DOG ;RESET WATCHDOG
LDP #PAGE_VAR
SPLK #0007H,GPR0 ;SET WAIT STATE GENERATOR FOR:PROGRAM SPACE, 0 WAIT STATES
LACC GPR0 ;DATA SPACE, 0 WAIT STATES,I/O SPACE, 1 WAIT STATES
OUT GPR0,WSGR
SPLK #0FFFFH,GPR0 ;CLEAR LED DISPLAY
OUT GPR0, LED2
OUT GPR0, LED1
LDP #DP_PF1 ;PAGE 0E1H
SPLK #0FFF2H, OCRA ;SET - PWM7/8/9-IOPB0/1/2/3 FFF3H
SPLK #0D0DH,PADATDIR ;SET J1--IOPB1=0, J2--IOPB3=0;0D0D
SPLK #00F0H, OCRB ;SET CAP3 AND QEPE,QEP2
SPLK #0000H,PCDATDIR ;SET READ IN
LDP #PAGE_VAR
SPLK #00H,GPR0
SPLK #00H,GPR1
SPLK #00H,FREL
SPLK #00H,FGD
SPLK #00H,FGD1
SPLK #00H,VALUEL
SPLK #00H,VALUEH
SPLK #00H,DIVIDE
SPLK #00H,SWITCH_ST
SPLK #00H, TCON
SPLK #00H, CNT
SPLK #00H, FL
SPLK #18H, FLAG0
SPLK #00H,CNTI
SPLK #00H,TL
SPLK #00H,TM
SPLK #00H,SINM
SPLK #00H,SINL
SPLK #SQRT3,R_SQRT3
LAR AR3,#00H
LAR AR2, #0H
LAR AR1, #0H
LAR AR0, #0H
LAR AR7,#BLK2E
LAR AR6,#WR_R0
MAR *,AR6
LACL #00H
RPT #7 ;CLEAR WR_R0~7
SACL *+
LAR AR6,#WR_R0
LAR AR3,#WR0
MAR *,AR3
LACL #00H
RPT #7 ;CLEAR WR_R0~7
SACL *+
LAR AR3,#WR0
LAR AR2,#WR8
MAR *,AR2
LACL #00H
RPT #15 ;CLEAR WR_R0~7
SACL *+
LAR AR2,#WR8
LAR AR4,#EDS0
MAR *,AR4
RPT #7 ;CLEAR ED 0~7
SACL *+
LAR AR4,#EDS0
LACC #100H
LAR AR5,#IA0
MAR *,AR5
RPT #15 ;CLEAR IAB 0~7
SACL *+
LAR AR5,#IA0
LDP #PAGE_VAR
LACC #6,1
ADD #UTAB
TBLR UDMAX
ADD #1
TBLR UQMAX
SPLK #EDC,ED
;***********************************************************************
; CHECK WHETHER SOME ERRORS INPUT
;***********************************************************************
ERR:
IN SWITCH_ST, SWITCH
LACC SWITCH_ST
AND #0FF00H
SACL SWITCH_ST
MAR *,AR1
LAR AR1, SWITCH_ST
LAR AR0, #0FF00H
CMPR 0
BCND POWER, TC ; NO ERROR
CALL ERROUT ;ERROR PROCESSING
CALL DISERR ;DISPLAY THE NUMBER OF ERROR
B ERR
;***************POWER*****************************
POWER:
IN SWITCH_ST, SWITCH
BIT SWITCH_ST,8 ;IF RUN?
BCND POWER,TC ;IF D5=0,RUN,FLAG0.0=1
LDP #DP_PF1
SPLK #0D09H,PADATDIR ;J1=1,J2=0 CONTACTOR OF THREE PHASE
LDP #PAGE_VAR
SPLK #00H,GPR0
SPLK #0FFH,GPR1
POWER1:
LACC GPR0
ADD #1
SACL GPR0
RPT GPR1
NOP ;DELAY=3.4MS
MAR *,AR1
LAR AR1,GPR0
LAR AR0,#06FFFH
CMPR 1
BCND POWER1,TC
LDP #DP_PF1
SPLK #0D01H,PADATDIR ;J1=J2=1
;************POWER END*********************************
LDP #DP_EV
SPLK #1EF0H,DBTCON ;5.2US
SPLK #0FFFH, ACTR
SPLK #0FFFFH,EVIFRA ;CLEAR INTERRUPT FLAG REGISTER A
SPLK #0FFFFH,EVIFRB ;CLEAR INTERRUPT FLAG REGISTER B
SPLK #0FFFFH,EVIFRC ;CLEAR INTERRUPT FLAG REGISTERC
SPLK #00H,EVIMRA ;CLEAR EVENT MANAGER MASK REGISTERA
SPLK #00H,EVIMRB ;CLEAR EVENT MANAGER MASK REGISTERB
SPLK #00H,EVIMRC ;CLEAR EVENT MANAGER MASK REGISTERC
;****************T1 INITIAL*****************
SPLK #2000,T1PR
SPLK #0, T1CNT
SPLK #02800H,T1CON
SPLK #02840H,T1CON
;****************T2 INITIAL*****************
SPLK #0, T2CNT
SPLK #25000,T2PR
SPLK #12500,T2CMPR
;****************T3 INITIAL*****************
SPLK #0, T3CNT
SPLK #0FFFFH,T3PR
;****************T2PR INT*****************
SPLK #0000H, GPTCON
SPLK #000H,EVIMRB ;/T2PR INT
;*********************************AD INITIAL****************************
CLRC INTM
SPLK #0100H,GPTCON
LDP #0E0H
SPLK #0007H,7070H ;TYPE A,XINT1,LOW PRIORITY
SPLK #0007H,7078H
LDP #DP_PF0 ;OPEN THE AD SAMPLE
LACC ADCFIFO1
LACC ADCFIFO1
LACC ADCFIFO2
LACC ADCFIFO2
SPLK #0004H,ADCTRL2 ;CURRENT SAMPLE SPRINGED BY T1PINT
SPLK #3A48H,ADCTRL1 ;IA USE AD3 ,IB USE AD10
LDP #DP_0
SPLK #0FFFFH, IFR
SPLK #20H,IMR
READKEY:
LDP #PAGE_VAR
;CALL DISFGD
;CALL DISFREL
LAR AR0,FGD
LAR AR1,FREL
MAR *,AR1
CMPR 0
BCND AA,NTC
CALL DISPWR
B CC
AA:
CALL DISFGD
CALL DISFREL
CC:
IN SWITCH_ST, SWITCH
BIT SWITCH_ST,8 ;IF RUN?
BCND READKEY1, TC ; N GO READKEY1
BIT FLAG0,14
BCND READKEY2,NTC
LACC FLAG0
AND #0FFFDH
SACL FLAG0
READKEY2:
BIT FLAG0,15
BCND READKEY1,TC
LACC FLAG0 ;IF D5=0,RUN,FLAG0.1=0
AND #0FFFDH
OR #01H
SACL FLAG0
;***********************CAPTURE INITIAL****************
LDP #DP_EV
SPLK #00FFH,CAPFIFO
SPLK #0F004H,CAPCON ;INIIATE CAPFIFO 0E004H
;***************FULL COMPARE********************
SPLK #00,CMPR1
SPLK #00,CMPR2
SPLK #1999H,ACTR ;0666H
SPLK #1307H,COMCON ;272FH
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