📄 mt352.h
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u8 ChanTable; /*channel Table*/
PSTUNERINFO psTunerInfo; /* tuner setup information */
PSTUNERTABLE psTunerTable; /* tuner frequency dependent control table */
u32 *pMilliSeconds; /* pointer to Real Time Clock (millisecond counter) */
PFRegisterRead pfRegisterRead; /* pointer to 2 wire bus routine */
PFRegisterWrite pfRegisterWrite;/* pointer to 2 wire bus routine */
PFEnable pfEnable; /* pointer to routine to control power switching (NULL ifnot used)*/
/*The following values should be set to zero at start up, and should not be accessed otherwise */
STnimChannel Channel; /* channel to tune to*/
STnimScanInfo ScanInfo; /* scan information*/
u8 ucBW; /* internal use only */
s8 cRStimer; /* timer for RSUBC*/
u16 RSUBC; /* RS UBC count for last second */
u32 Timer; /* millisecond timer*/
u16 State; /* state variable*/
u16 Command; /* command input to state machine */
u32 IRQcache; /* Cache for interrpts */
}STnimControl,*PSTNIMCTL;
/* Register map byte count
if>1 */
/* read only*/
#define MT352_OFDMSTAT 0x00
#define MT352_FECSTAT 0x01
#define MT352_FSMSTAT 0x02
#define MT352_IRQ 0x05 /*4*/
#define MT352_SNR 0x09
#define MT352_VIT_ERRCNT 0x0A /*3*/
#define MT352_RS_ERRCNT 0x0D /*3*/
#define MT352_RS_UBC 0x10 /*2*/
#define MT352_AGC_GAIN 0x12 /*4*/
#define MT352_DAGC_GAIN 0x16
#define MT352_FREQ_OFFSET 0x17 /*3*/
#define MT352_TIMING_OFFSET 0x1A /*2*/
#define MT352_CHAN_FREQ 0x1C /*2*/
#define MT352_TPS_RECEIVED 0x1E /*2*/
#define MT352_TPS_CURRENT 0x20 /*2*/
#define MT352_TPS_CELL_ID 0x22 /*2*/
#define MT352_TPS_MISC_DATA 0x24 /*3*/
/* read Write */
#define MT352_RESET 0x50
#define MT352_TPS_GIVEN 0x51 /*2*/
#define MT352_ACQ_CTL 0x53
#define MT352_TRL_NOM_RATE 0x54 /*2*/
#define MT352_INPUT_FREQ 0x56 /*2*/
#define MT352_TUNER_ADDR 0x58
#define MT352_CHAN_START 0x59 /*2*/
#define MT352_TUNER_CONT 0x5B /*2*/
#define MT352_TUNER_GO 0x5D
#define MT352_FSM_GO 0x5E
#define MT352_STATUS_ENABLE 0x5F /*2*/
#define MT352_INTERRUPT_ENABLE 0x61 /*4*/
#define MT352_ADCMAX 0x65
#define MT352_IMPSUP_TH 0x66
#define MT352_AGC_TARGET 0x67
#define MT352_AGC_CTL 0x68
#define MT352_AGC_IF_LOLIM 0x69
#define MT352_AGC_RF_HILIM 0x6A
#define MT352_AGC_IF_MAX 0x6B
#define MT352_AGC_IF_MIN 0x6C
#define MT352_AGC_RF_MAX 0x6D
#define MT352_AGC_RF_MIN 0x6E
#define MT352_AGC_KIF 0x6F
#define MT352_AGC_KRF 0x70
#define MT352_CAS_CTL 0x71
#define MT352_CCSFREQ 0x72
#define MT352_TIM_ACQ_CTL 0x73
#define MT352_TIM_TRA_CTL 0x74
#define MT352_CAPT_RANGE 0x75
#define MT352_CRL_GAIN 0x76
#define MT352_TRL_GAIN 0x77
#define MT352_CHC_DECAY 0x78
#define MT352_CHC_SNR_SEL 0x79 /*2*/
#define MT352_FSM_CTL 0x7B
#define MT352_RS_ERRPER 0x7C /*2*/
#define MT352_UNUSED_3 0x7E
#define MT352_CHIP_ID 0x7F
#define MT352_CHAN_STOP 0x80 /*2*/
#define MT352_CHAN_STEP 0x82 /*2*/
#define MT352_CHAN_OFFSET 0x84
#define MT352_FEC_LOCK_TIME 0x85
#define MT352_OFDM_LOCKTIME 0x86
#define MT352_ACQ_DEL 0x87
#define MT352_SCAN_CTL 0x88
#define MT352_CLOCK_CTL 0x89
#define MT352_CONFIG 0x8A
#define MT352_MCLK_RATIO 0x8B
#define MT352_GPP_CTL 0x8C
#define MT352_TEST_CTL 0x8D
#define MT352_ADC_CTL 0x8E /*1*/
#define MT352_CIT_ERRPER 0xB2
#define MT352_VIT_CTL 0xB5
/* register bits */
/*MT352_FECSTAT */
#define MT352_FECSTAT_BALOCK 0x02
#define MT352_FECSTAT_DSLOCK 0x04
#define MT352_FECSTAT_LOCKED 0x06 /* both for lock detection */
#define MT352_FECSTAT_VITLOCK 0x01
/* MT352_IRQ*/
#define MT352_IRQ_TPSCHANGED 0x80000000
#define MT352_IRQ_FRAMESYNCLOST 0x40000000
#define MT352_IRQ_FRAMESYNC 0x20000000
#define MT352_IRQ_OFDMLOCKED 0x10000000
#define MT352_IRQ_OFDMFOUND 0x08000000
#define MT352_IRQ_PPMCORFAIL 0x04000000
#define MT352_IRQ_SYRLOCKED 0x02000000
#define MT352_IRQ_AGCLOCKED 0x01000000
#define MT352_IRQ_RSBERPER 0x00800000 /* Consumed by TnimMain*/
#define MT352_IRQ_BALOCKLOST 0x00400000 /* Consumed by TnimMain*/
#define MT352_IRQ_BALOCK 0x00200000 /* Consumed by TnimMain*/
#define MT352_IRQ_VITLOCKLOST 0x00100000
#define MT352_IRQ_VITLOCK 0x00080000
#define MT352_IRQ_VITBERPER 0X00040000 /* Consumed by TnimMain*/
#define MT352_IRQ_DSLOCKLOST 0x00020000
#define MT352_IRQ_DSLOCK 0x00010000
#define MT352_IRQ_RSLOCKLOST 0x00008000
#define MT352_IRQ_RSLOSSREACQ 0x00004000
#define MT352_IRQ_FECLOSSREACQ 0x00002000
#define MT352_IRQ_AUTOTPSREACQ 0x00001000
#define MT352_IRQ_SPECINVTOGGLED 0x00000800
#define MT352_IRQ_MODECHANGED 0x00000400
#define MT352_IRQ_AGCNOLOCK 0x00000200
#define MT352_IRQ_AGCLOCKLOST 0x00000100
#define MT352_IRQ_TUNERREAD 0x00000020
#define MT352_IRQ_TUNERNOLOCK 0x00000010
#define MT352_IRQ_SCANFECNOLOCK 0x00000008 /* Consumed by TnimMain*/
#define MT352_IRQ_SCANRANGEEND 0x00000004 /* Consumed by TnimMain*/
#define MT352_IRQ_SCANFECLOCK 0x00000002 /* Consumed by TnimMain*/
#define MT352_IRQ_TUNERI2CFAIL 0x00000001
/* MT352_CONFIG_CTL */
#define MT352_CONF_MPEGDIS 0x40
#define MT352_CONF_ENABLE 0x20
#define MT352_CONF_BSO 0x10
#define MT352_CONF_TEIEN 0x08
#define MT352_CONF_BKERRINV 0x04
#define MT352_CONF_MDOSWAP 0x02
#define MT352_CONF_BG12 0x01
/* MT352_CLOCK_CTL*/
#define MT352_CLKCTL_NON208 0x08
#define MT352_CLKCTL_MCLKRATEN 0x80
#define MT352_CLKCTL_MCLKINEN 0x40
#define MT352_CLKCTL_MCLKINV 0x20
#define MT352_CLKCTL_ADC_ENABLE 0x10
#define MT352_CLKCTL_MODE1 0x00
#define MT352_CLKCTL_MODE2 0x01
#define MT352_CLKCTL_MODE3 0x08
#define MT352_CLKCTL_MODE4 0x09
#define MT352_CLKCTL_MODE5 0x0A
#define MT352_CLKCTL_MODE6 0x0B
#define MT352_CLKCTL_MODE7 0x0C
#define MT352_CLKCTL_MODE8 0x0D
#define MT352_CLKCTL_MODE9 0x0E
/*MT352_RESET*/
#define MT352_RESET_ALL 0x80
/*MT352_ADC_CTL*/
#define MT352_ADC_CTL_INIT 0x40
/*MT352_ACQ_CTL*/
#define MT352_ACQ_CTL_AUTO 0xF4 /* & with existing bits*/
#define MT352_ACQ_CTL_FORCEMODE 0x01
#define MT352_ACQ_CTL_SPECINV 0x04
/*MT352_FSM_CTL*/
#define MT352_FSM_CTL_AUTO 0x03 /* search guard/mode always*/
/*MT352_VIT_CTL*/
#define MT352_VIT_CTL_DEFAULT 0x78
#define MT352_VIT_CTL_ERRPER_EN 0x02
/* MT352_AGC_CTL */
#define MT352_AGC_RF_DIS 0x80
#define MT352_AGC_RF_REV 0x02
#define MT352_AGC_IF_REV 0x01
/*MT352_TUNER_GO*/
#define MT352_TUNER_RESEARCH 0x10
#define MT352_TUNER_CONTSEARCH 0x08
#define MT352_TUNER_SEARCH 0x04
#define MT352_TUNER_READ 0x02
#define MT352_TUNER_GOAQUIRE 0x01
/* MT352_TPS_GIVEN (valid for high byte only)*/
#define MT352_TPS_GIVENH_LP 0x80
/*MT352_SCAN_CTL*/
#define MT352_SCAN_CTL_DEFAULT 0x0A
#define MT352_SCAN_CTL_FINDWEAK 0x01
/*MT352_OFDM_LOCKTIME*/
#define MT352_OFDM_8K_WAIT 0x40 /*512 msec*/
#define MT352_OFDM_2K_WAIT 0x10 /*128 msec*/
/* other defines*/
#define TNIM_WAIT_LOCKUP 500 /* millseconds to wait for channel lock*/
#define TNIM_SCANWAIT_TPS 100 /* milliseconds to wait for valid TPS in sccan*/
/******************************************************************
* Function prototype used in this terrestrial nim software module
******************************************************************/
bool8 RegisterWrite2wb(u8 deviceId,u8 Register, u8 *buffer,u8 noOfBytes);
bool8 RegisterRead2wb(u8 deviceId,u8 Register,u8 *buffer,u8 noBytesToRead);
/****************2wire bus interception routines*******************************/
void TnimSetPower(PSTNIMCTL psTnim,ETnimPower ePower);
bool8 Tnim_CheckPointers(PSTNIMCTL psTnim);
bool8 TnimAcquireFrequency(PSTNIMCTL psTnim,u32 dwFreqkHz,u8 ucBW);
bool8 Tnim_ProgramTuner(PSTNIMCTL psTnim,u32 dwBWandFreqkHz);
bool8 Tnim_ProgramBW(PSTNIMCTL psTnim,u8 ucBW);
bool8 Tnim_WriteRegisterValue(PSTNIMCTL psTnim, u8 byReg,s8 cCount,u32 dwValue);
u16 Tnim_ADCClock_x3(PSTNIMCTL psTnim);
u8 TnimReadSNRx8(PSTNIMCTL psTnim);
bool8 Tnim_IsLocked(PSTNIMCTL psTnim);
bool8 TnimReadAGC(PSTNIMCTL psTnim,STnimAGC * psAGC);
bool8 Tnim_ReadRegisterValue(PSTNIMCTL psTnim, u8 byReg,s8 cCount,u32 * pdwValue);
bool8 Tnim_Initialise(PSTNIMCTL psTnim);
u8 Tnim_GetClockMode(PSTNIMCTL psTnim);
bool8 Tnim_SetITB(STnimControl* psTnim);
bool8 TnimReadPreViterbiBER(PSTNIMCTL psTnim, u32 *pdwBER);
bool8 TnimReadPostViterbiBER(PSTNIMCTL psTnim, u32 *pdwBER,u32 *pdwCount);
bool8 TnimSelectLPdata(PSTNIMCTL psTnim, bool8 bWantLP);
void TestPrintTPSdata(STnimAuxChannelInfo aux, bool8 bShowActive);
bool8 TnimReadChannel(PSTNIMCTL psTnim, PSCHANNEL psChannel,PSAUXINFO psAuxInfo);
bool8 Tnim_ReadOffsetkHz(PSTNIMCTL psTnim, s32 * lOffsetkHz);
bool8 Tnim_ReadInterrupts(PSTNIMCTL psTnim);
bool8 Tnim_NextScan(PSTNIMCTL psTnim);
bool8 Tnim_AcqInit(PSTNIMCTL psTnim);
bool8 Tnim_ScanInit(PSTNIMCTL psTnim);
u32 Tnim_GetBWfreqkHz(PSCHANNEL psChannel, u8 ucChanTable);
void TnimAbortScan(PSTNIMCTL psTnim);
bool8 TnimReadRSUBC(PSTNIMCTL psTnim, u16 *wRSUBC);
bool8 TnimAcquireChannel(PSTNIMCTL psTnim,STnimChannel *psChannel);
//void GetKBSynthBytes(u8* pBuffer);
bool8 TnimAcquireSynth(PSTNIMCTL psTnim,u8* ucBuffer,u8 ucBW);
bool8 Tnim_AdjustOffsetkHz(PSTNIMCTL psTnim,u32 dwFreqkHz,u8 ucBW);
//void Register_Read(void);
void Register_List(void);
void Show_List(void);
void Show_Status(void);
void Read_TnimBER(u32 *dwPreBER, char *szStr);
void show_TV_freq_table() ;
void scan_VHF_UHF_TV_ch(u8 bAreaCode) ;
u8 mt352_get_ss(void);
/******************************************
* global variables used by this module
*
******************************************/
extern STnimControl g_TheTnim;
extern u32 g_dwClock ;
#endif
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