📄 prmtvs_b.vhdl
字号:
-- FUNCTION NAME: StateTableLookUp -- -- PARAMETERS : StateTable - state table -- PresentDataIn - current inputs -- PreviousDataIn - previous inputs and states -- NumStates - number of state variables -- PresentOutputs - current state and current outputs -- -- DESCRIPTION : This function is used to find the output of the -- StateTable corresponding to a given set of inputs. -- -- ------------------------------------------------------------------------ FUNCTION StateTableLookUp ( CONSTANT StateTable : VitalStateTableType; CONSTANT PresentDataIn : std_logic_vector; CONSTANT PreviousDataIn : std_logic_vector; CONSTANT NumStates : NATURAL; CONSTANT PresentOutputs : std_logic_vector ) RETURN std_logic_vector IS CONSTANT InputSize : INTEGER := PresentDataIn'LENGTH; CONSTANT NumInputs : INTEGER := InputSize + NumStates - 1; CONSTANT TableEntries : INTEGER := StateTable'LENGTH(1); CONSTANT TableWidth : INTEGER := StateTable'LENGTH(2); CONSTANT OutSize : INTEGER := TableWidth - InputSize - NumStates; VARIABLE Inputs : std_logic_vector(0 TO NumInputs); VARIABLE PrevInputs : std_logic_vector(0 TO NumInputs) := (OTHERS => 'X'); VARIABLE ReturnValue : std_logic_vector(0 TO (OutSize-1)) := (OTHERS => 'X'); VARIABLE Temp : std_ulogic; VARIABLE Match : BOOLEAN; VARIABLE Err : BOOLEAN := FALSE; -- This needs to be done since the TableLookup arrays must be -- ascending starting with 0 VARIABLE TableAlias : VitalStateTableType(0 TO TableEntries - 1, 0 TO TableWidth - 1) := StateTable; BEGIN Inputs(0 TO InputSize-1) := PresentDataIn; Inputs(InputSize TO NumInputs) := PresentOutputs(0 TO NumStates - 1); PrevInputs(0 TO InputSize - 1) := PreviousDataIn(0 TO InputSize - 1); ColLoop: -- Compare each entry in the table FOR i IN TableAlias'RANGE(1) LOOP RowLoop: -- Check each element of the entry FOR j IN 0 TO InputSize + NumStates LOOP IF (j = InputSize + NumStates) THEN -- a match occurred FOR k IN 0 TO Minimum(OutSize, PresentOutputs'LENGTH)-1 LOOP StateOutputX01Z ( TableAlias(i, TableWidth - k - 1), PresentOutputs(PresentOutputs'LENGTH - k - 1), Temp, Err); ReturnValue(OutSize - k - 1) := Temp; IF (Err) THEN ReturnValue := (OTHERS => 'X'); RETURN ReturnValue; END IF; END LOOP; RETURN ReturnValue; END IF; StateMatch ( TableAlias(i,j), Inputs(j), PrevInputs(j), j >= InputSize, Err, Match); EXIT RowLoop WHEN NOT(Match); EXIT ColLoop WHEN Err; END LOOP RowLoop; END LOOP ColLoop; ReturnValue := (OTHERS => 'X'); RETURN ReturnValue; END; -------------------------------------------------------------------- -- to_ux01z ------------------------------------------------------------------- FUNCTION To_UX01Z ( s : std_ulogic ) RETURN UX01Z IS BEGIN RETURN cvt_to_ux01z (s); END; --------------------------------------------------------------------------- -- Function : GetEdge -- Purpose : Converts transitions on a given input signal into a -- enumeration value representing the transition or level -- of the signal. -- -- previous "value" current "value" := "edge" -- --------------------------------------------------------- -- '1' | 'H' '1' | 'H' '1' level, no edge -- '0' | 'L' '1' | 'H' '/' rising edge -- others '1' | 'H' 'R' rising from X -- -- '1' | 'H' '0' | 'L' '\' falling egde -- '0' | 'L' '0' | 'L' '0' level, no edge -- others '0' | 'L' 'F' falling from X -- -- 'X' | 'W' | '-' 'X' | 'W' | '-' 'X' unknown (X) level -- 'Z' 'Z' 'X' unknown (X) level -- 'U' 'U' 'U' 'U' level -- -- '1' | 'H' others 'f' falling to X -- '0' | 'L' others 'r' rising to X -- 'X' | 'W' | '-' 'U' | 'Z' 'x' unknown (X) edge -- 'Z' 'X' | 'W' | '-' | 'U' 'x' unknown (X) edge -- 'U' 'X' | 'W' | '-' | 'Z' 'x' unknown (X) edge -- --------------------------------------------------------------------------- FUNCTION GetEdge ( SIGNAL s : IN std_logic ) RETURN EdgeType IS BEGIN IF (s'EVENT) THEN RETURN LogicToEdge ( s'LAST_VALUE, s ); ELSE RETURN LogicToLevel ( s ); END IF; END; --------------------------------------------------------------------------- PROCEDURE GetEdge ( SIGNAL s : IN std_logic_vector; VARIABLE LastS : INOUT std_logic_vector; VARIABLE Edge : OUT EdgeArray ) IS ALIAS sAlias : std_logic_vector ( 1 TO s'LENGTH ) IS s; ALIAS LastSAlias : std_logic_vector ( 1 TO LastS'LENGTH ) IS LastS; ALIAS EdgeAlias : EdgeArray ( 1 TO Edge'LENGTH ) IS Edge; BEGIN IF s'LENGTH /= LastS'LENGTH OR s'LENGTH /= Edge'LENGTH THEN VitalError ( "GetEdge", ErrVctLng, "s, LastS, Edge" ); END IF; FOR n IN 1 TO s'LENGTH LOOP EdgeAlias(n) := LogicToEdge( LastSAlias(n), sAlias(n) ); LastSAlias(n) := sAlias(n); END LOOP; END; --------------------------------------------------------------------------- FUNCTION ToEdge ( Value : IN std_logic ) RETURN EdgeType IS BEGIN RETURN LogicToLevel( Value ); END; -- Note: This function will likely be replaced by S'DRIVING_VALUE in VHDL'92 ---------------------------------------------------------------------------- IMPURE FUNCTION CurValue ( CONSTANT GlitchData : IN GlitchDataType ) RETURN std_logic IS BEGIN IF NOW >= GlitchData.SchedTime THEN RETURN GlitchData.SchedValue; ELSIF NOW >= GlitchData.GlitchTime THEN RETURN 'X'; ELSE RETURN GlitchData.CurrentValue; END IF; END; --------------------------------------------------------------------------- IMPURE FUNCTION CurValue ( CONSTANT GlitchData : IN GlitchDataArrayType ) RETURN std_logic_vector IS VARIABLE Result : std_logic_vector(GlitchData'RANGE); BEGIN FOR n IN GlitchData'RANGE LOOP IF NOW >= GlitchData(n).SchedTime THEN Result(n) := GlitchData(n).SchedValue; ELSIF NOW >= GlitchData(n).GlitchTime THEN Result(n) := 'X'; ELSE Result(n) := GlitchData(n).CurrentValue; END IF; END LOOP; RETURN Result; END; --------------------------------------------------------------------------- -- function calculation utilities --------------------------------------------------------------------------- --------------------------------------------------------------------------- -- Function : VitalSame -- Returns : VitalSame compares the state (UX01) of two logic value. A -- value of 'X' is returned if the values are different. The -- common value is returned if the values are equal. -- Purpose : When the result of a logic model may be either of two -- separate input values (eg. when the select on a MUX is 'X'), -- VitalSame may be used to determine if the result needs to -- be 'X'. -- Arguments : See the declarations below... --------------------------------------------------------------------------- FUNCTION VitalSame ( CONSTANT a, b : IN std_ulogic ) RETURN std_ulogic IS BEGIN IF To_UX01(a) = To_UX01(b) THEN RETURN To_UX01(a); ELSE RETURN 'X'; END IF; END; --------------------------------------------------------------------------- -- delay selection utilities --------------------------------------------------------------------------- --------------------------------------------------------------------------- -- Procedure : BufPath, InvPath -- -- Purpose : BufPath and InvPath compute output change times, based on -- a change on an input port. The computed output change times -- returned in the composite parameter 'schd'. -- -- BufPath and InpPath are used together with the delay path -- selection functions (GetSchedDelay, VitalAND, VitalOR... ) -- The 'schd' value from each of the input ports of a model are -- combined by the delay selection functions (VitalAND, -- VitalOR, ...). The GetSchedDelay procedure converts the -- combined output changes times to the single delay (delta -- time) value for scheduling the output change (passed to -- VitalGlitchOnEvent). -- -- The values in 'schd' are: (absolute times) -- inp0 : time of output change due to input change to 0 -- inp1 : time of output change due to input change to 1 -- inpX : time of output change due to input change to X -- glch0 : time of output glitch due to input change to 0 -- glch1 : time of output glitch due to input change to 1 -- -- The output times are computed from the model INPUT value -- and not the final value. For this reason, 'BufPath' should -- be used to compute the output times for a non-inverting -- delay paths and 'InvPath' should be used to compute the -- ouput times for inverting delay paths. Delay paths which -- include both non-inverting and paths require usage of both -- 'BufPath' and 'InvPath'. (IE this is needed for the -- select->output path of a MUX -- See the VitalMUX model). -- -- -- Parameters : schd....... Computed output result times. (INOUT parameter -- modified only on input edges) -- Iedg....... Input port edge/level value. -- tpd....... Propagation delays from this input -- --------------------------------------------------------------------------- PROCEDURE BufPath ( VARIABLE Schd : INOUT SchedType; CONSTANT Iedg : IN EdgeType; CONSTANT tpd : IN VitalDelayType01 ) IS BEGIN CASE Iedg IS WHEN '0'|'1' => NULL; -- no edge: no timing update WHEN '/'|'R' => Schd.inp0 := TIME'HIGH; Schd.inp1 := NOW + tpd(tr01); Schd.Glch1 := Schd.inp1; Schd.InpX := Schd.inp1; WHEN '\'|'F' => Schd.inp1 := TIME'HIGH; Schd.inp0 := NOW + tpd(tr10); Schd.Glch0 := Schd.inp0; Schd.InpX := Schd.inp0; WHEN 'r' => Schd.inp1 := TIME'HIGH; Schd.inp0 := TIME'HIGH; Schd.InpX := NOW + tpd(tr01); WHEN 'f' => Schd.inp0 := TIME'HIGH; Schd.inp1 := TIME'HIGH; Schd.InpX := NOW + tpd(tr10); WHEN 'x' => Schd.inp1 := TIME'HIGH; Schd.inp0 := TIME'HIGH; -- update for X->X change Schd.InpX := NOW + Minimum(tpd(tr10),tpd(tr01)); WHEN OTHERS => NULL; -- no timing change END CASE; END; PROCEDURE BufPath ( VARIABLE Schd : INOUT SchedArray; CONSTANT Iedg : IN EdgeArray; CONSTANT tpd : IN VitalDelayArrayType01 ) IS BEGIN FOR n IN Schd'RANGE LOOP CASE Iedg(n) IS WHEN '0'|'1' => NULL; -- no edge: no timing update WHEN '/'|'R' => Schd(n).inp0 := TIME'HIGH; Schd(n).inp1 := NOW + tpd(n)(tr01); Schd(n).Glch1 := Schd(n).inp1; Schd(n).InpX := Schd(n).inp1; WHEN '\'|'F' => Schd(n).inp1 := TIME'HIGH; Schd(n).inp0 := NOW + tpd(n)(tr10); Schd(n).Glch0 := Schd(n).inp0; Schd(n).InpX := Schd(n).inp0;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -