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📄 prmtvs_p.vhdl

📁 vhdl集成电路设计软件.需要用gcc-4.0.2版本编译.
💻 VHDL
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-- ------------------------------------------------------------------------------- Title        : Standard VITAL_Primitives Package--              : $Revision: 598 $--              :-- Library      : This package shall be compiled into a library--              : symbolically named IEEE.--              :-- Developers   : IEEE DASC Timing Working Group (TWG), PAR 1076.4--              :-- Purpose      : This packages defines standard types, constants, functions--              : and procedures for use in developing ASIC models.--              : Specifically a set of logic primitives are defined.--              :-- Known Errors :--              :-- Note         : No declarations or definitions shall be included in,--              : or excluded from this package. The "package declaration"--              : defines the objects (types, subtypes, constants, functions,--              : procedures ... etc.) that can be used by a user.  The package--              : body shall be considered the formal definition of the--              : semantics of this package.  Tool developers may choose to--              : implement the package body in the most efficient manner--              : available to them.-- -------------------------------------------------------------------------------- ------------------------------------------------------------------------------ Acknowledgments:--   This code was originally developed under the "VHDL Initiative Toward ASIC--   Libraries" (VITAL), an industry sponsored initiative.  Technical--   Director: William Billowitch, VHDL Technology Group; U.S. Coordinator:--   Steve Schultz;  Steering Committee Members: Victor Berman, Cadence Design--   Systems; Oz Levia, Synopsys Inc.; Ray Ryan, Ryan & Ryan; Herman van Beek,--   Texas Instruments; Victor Martin, Hewlett-Packard Company.-- -------------------------------------------------------------------------------- ------------------------------------------------------------------------------ Modification History :-- ------------------------------------------------------------------------------ Version No:|Auth:| Mod.Date:| Changes Made:--   v95.0 A  |     | 06/02/95 | Initial ballot draft 1995-- ------------------------------------------------------------------------------   v95.3    | ddl | 09/24/96 | #236 - VitalTruthTable DataIn should be of--            |     |          |        of class SIGNAL  (PROPOSED)-- ----------------------------------------------------------------------------LIBRARY IEEE;USE     IEEE.Std_Logic_1164.ALL;USE     IEEE.VITAL_Timing.ALL;PACKAGE VITAL_Primitives IS    -- ------------------------------------------------------------------------    -- Type and Subtype Declarations    -- ------------------------------------------------------------------------    -- For Truth and State Tables    SUBTYPE VitalTruthSymbolType IS VitalTableSymbolType RANGE 'X' TO 'Z';    SUBTYPE VitalStateSymbolType IS VitalTableSymbolType RANGE '/' TO 'S';    TYPE VitalTruthTableType IS ARRAY ( NATURAL RANGE <>, NATURAL RANGE <> )         OF VitalTruthSymbolType;    TYPE VitalStateTableType IS ARRAY ( NATURAL RANGE <>, NATURAL RANGE <> )         OF VitalStateSymbolType;    -- ---------------------------------    -- Default values used by primitives    -- ---------------------------------    CONSTANT VitalDefDelay01  : VitalDelayType01;       -- Propagation delays    CONSTANT VitalDefDelay01Z : VitalDelayType01Z;    -- ------------------------------------------------------------------------    -- VITAL Primitives    --     --   The primitives packages contains a collections of common gates,     -- including AND, OR, XOR, NAND, NOR, XNOR, BUF, INV, MUX and DECODER     -- functions.  In addition, for sequential devices, a STATE TABLE construct    -- is provided.  For complex functions a modeler may wish to use either    -- a collection of connected VITAL primitives, or a TRUTH TABLE construct.    --    --   For each primitive a Function and Procedure is provided.  The primitive    -- functions are provided to support behavioral modeling styles.  The     -- primitive procedures are provided to support structural modeling styles.    --    --   The procedures wait internally for an event on an input signal, compute    -- the new result, perform glitch handling, schedule transaction on the    -- output signals, and wait for future input events.  All of the functional     -- (logic) input or output parameters of the primitive procedures are    -- signals.  All the other parameters are constants.    --    --   The procedure primitives are parameterized for separate path delays     -- from each input signal.  All path delays default to 0 ns.    --     --   The sequential primitive functions compute the defined function and     -- return a value of type std_ulogic or std_logic_vector.  All parameters    -- of the primitive functions are constants of mode IN.    --    --   The primitives are based on 1164 operators. The user may also elect to    --   express functions using the 1164 operators as well.  These styles are    --   all equally acceptable methods for device modeling.    --    -- ------------------------------------------------------------------------    --    -- Sequential     -- Primitive    -- Function Name:   N-input logic device function calls:    --                    VitalAND  VitalOR  VitalXOR     --                    VitalNAND VitalNOR VitalXNOR                 --    -- Description:     The function calls return the evaluated logic function    --                  corresponding to the function name.    --    -- Arguments:             --    --  IN                Type                  Description    --   Data              std_logic_vector      The input signals for the n-bit    --                                           wide logic functions.    --   ResultMap         VitalResultMapType    The output signal strength    --                                           result map to modify default    --                                           result mapping.      --                        --  INOUT    --   none    --    --  OUT    --   none    --    --  Returns                  --                      std_ulogic           The evaluated logic function of    --                                           the n-bit wide primitives.    --    -- -------------------------------------------------------------------------    FUNCTION VitalAND    (            CONSTANT      Data : IN std_logic_vector;            CONSTANT ResultMap : IN VitalResultMapType := VitalDefaultResultMap          ) RETURN std_ulogic;    FUNCTION VitalOR     (            CONSTANT      Data : IN std_logic_vector;            CONSTANT ResultMap : IN VitalResultMapType := VitalDefaultResultMap          ) RETURN std_ulogic;    FUNCTION VitalXOR    (            CONSTANT      Data : IN std_logic_vector;            CONSTANT ResultMap : IN VitalResultMapType := VitalDefaultResultMap          ) RETURN std_ulogic;    FUNCTION VitalNAND   (            CONSTANT      Data : IN std_logic_vector;            CONSTANT ResultMap : IN VitalResultMapType := VitalDefaultResultMap          ) RETURN std_ulogic;    FUNCTION VitalNOR    (            CONSTANT      Data : IN std_logic_vector;            CONSTANT ResultMap : IN VitalResultMapType := VitalDefaultResultMap          ) RETURN std_ulogic;    FUNCTION VitalXNOR   (            CONSTANT      Data : IN std_logic_vector;            CONSTANT ResultMap : IN VitalResultMapType := VitalDefaultResultMap          ) RETURN std_ulogic;    -- -------------------------------------------------------------------------    --    -- Concurrent    -- Primitive    -- Procedure Name:  N-input logic device concurrent procedure calls.    --                         VitalAND  VitalOR  VitalXOR     --                         VitalNAND VitalNOR VitalXNOR                 --    -- Description:     The procedure calls return the evaluated logic function    --                  corresponding to the function name as a parameter to the    --                  procedure.  Propagation delay form data to q is a    --                  a parameter to the procedure.  A vector of delay values    --                  for inputs to output are provided.  It is noted that    --                  limitations in SDF make the back annotation of the delay    --                  array difficult.    --    -- Arguments:             --    --  IN                  Type                  Description    --   Data               std_logic_vector       The input signals for the n-    --                                             bit wide logic functions.    --   tpd_data_q         VitalDelayArrayType01  The propagation delay from    --                                             the data inputs to the output    --                                             q.    --    --  INOUT    --   none     --    --  OUT    --   q                  std_ulogic             The output signal of the     --                                             evaluated logic function.    --    --  Returns      --   none                --    -- -------------------------------------------------------------------------    PROCEDURE VitalAND   (            SIGNAL            q : OUT std_ulogic;            SIGNAL         Data :  IN std_logic_vector;            CONSTANT tpd_data_q :  IN VitalDelayArrayType01;            CONSTANT  ResultMap :  IN VitalResultMapType                                      := VitalDefaultResultMap );    PROCEDURE VitalOR    (            SIGNAL            q : OUT std_ulogic;            SIGNAL         Data :  IN std_logic_vector;            CONSTANT tpd_data_q :  IN VitalDelayArrayType01;            CONSTANT  ResultMap :  IN VitalResultMapType                                      := VitalDefaultResultMap );    PROCEDURE VitalXOR   (            SIGNAL            q : OUT std_ulogic;            SIGNAL         Data :  IN std_logic_vector;            CONSTANT tpd_data_q :  IN VitalDelayArrayType01;            CONSTANT  ResultMap :  IN VitalResultMapType                                      := VitalDefaultResultMap );    PROCEDURE VitalNAND  (            SIGNAL            q : OUT std_ulogic;            SIGNAL         Data :  IN std_logic_vector;            CONSTANT tpd_data_q :  IN VitalDelayArrayType01;            CONSTANT  ResultMap :  IN VitalResultMapType                                      := VitalDefaultResultMap );    PROCEDURE VitalNOR   (            SIGNAL            q : OUT std_ulogic;            SIGNAL         Data :  IN std_logic_vector;            CONSTANT tpd_data_q :  IN VitalDelayArrayType01;            CONSTANT  ResultMap :  IN VitalResultMapType                                      := VitalDefaultResultMap );    PROCEDURE VitalXNOR  (            SIGNAL            q : OUT std_ulogic;            SIGNAL         Data :  IN std_logic_vector;            CONSTANT tpd_data_q :  IN VitalDelayArrayType01;            CONSTANT  ResultMap :  IN VitalResultMapType                                      := VitalDefaultResultMap );    -- -------------------------------------------------------------------------    --    -- Sequential     -- Primitive    -- Function Name:   2,3 and 4 input logic device function calls.    --     --                    VitalAND2    VitalOR2    VitalXOR2     --                    VitalAND3    VitalOR3    VitalXOR3                 --                    VitalAND4    VitalOR4    VitalXOR4    --     --                    VitalNAND2   VitalNOR2   VitalXNOR2                 --                    VitalNAND3   VitalNOR3   VitalXNOR3     --                    VitalNAND4   VitalNOR4   VitalXNOR4                 --    -- Description:     The function calls return the evaluated 2, 3 or 4 input    --                  logic function corresponding to the function name.    --    -- Arguments:             --    --  IN             Type               Description    --   a, b, c, d     std_ulogic         2 input devices have a and b as     --                                     inputs.  3 input devices have a, b    --                                     and c as inputs.  4 input devices     --                                     have a, b, c and d as inputs.    --   ResultMap      VitalResultMapType The output signal strength result map    --                                     to modify default result mapping.       --                        --  INOUT    --   none      --

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