📄 b3v1stemp.c
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pParam->BSIM3v1Sdvt2w = model->BSIM3v1Sdvt2w + model->BSIM3v1Sldvt2w * Inv_L + model->BSIM3v1Swdvt2w * Inv_W + model->BSIM3v1Spdvt2w * Inv_LW; pParam->BSIM3v1Sdrout = model->BSIM3v1Sdrout + model->BSIM3v1Sldrout * Inv_L + model->BSIM3v1Swdrout * Inv_W + model->BSIM3v1Spdrout * Inv_LW; pParam->BSIM3v1Sdsub = model->BSIM3v1Sdsub + model->BSIM3v1Sldsub * Inv_L + model->BSIM3v1Swdsub * Inv_W + model->BSIM3v1Spdsub * Inv_LW; pParam->BSIM3v1Svth0 = model->BSIM3v1Svth0 + model->BSIM3v1Slvth0 * Inv_L + model->BSIM3v1Swvth0 * Inv_W + model->BSIM3v1Spvth0 * Inv_LW; pParam->BSIM3v1Sua = model->BSIM3v1Sua + model->BSIM3v1Slua * Inv_L + model->BSIM3v1Swua * Inv_W + model->BSIM3v1Spua * Inv_LW; pParam->BSIM3v1Sua1 = model->BSIM3v1Sua1 + model->BSIM3v1Slua1 * Inv_L + model->BSIM3v1Swua1 * Inv_W + model->BSIM3v1Spua1 * Inv_LW; pParam->BSIM3v1Sub = model->BSIM3v1Sub + model->BSIM3v1Slub * Inv_L + model->BSIM3v1Swub * Inv_W + model->BSIM3v1Spub * Inv_LW; pParam->BSIM3v1Sub1 = model->BSIM3v1Sub1 + model->BSIM3v1Slub1 * Inv_L + model->BSIM3v1Swub1 * Inv_W + model->BSIM3v1Spub1 * Inv_LW; pParam->BSIM3v1Suc = model->BSIM3v1Suc + model->BSIM3v1Sluc * Inv_L + model->BSIM3v1Swuc * Inv_W + model->BSIM3v1Spuc * Inv_LW; pParam->BSIM3v1Suc1 = model->BSIM3v1Suc1 + model->BSIM3v1Sluc1 * Inv_L + model->BSIM3v1Swuc1 * Inv_W + model->BSIM3v1Spuc1 * Inv_LW; pParam->BSIM3v1Su0 = model->BSIM3v1Su0 + model->BSIM3v1Slu0 * Inv_L + model->BSIM3v1Swu0 * Inv_W + model->BSIM3v1Spu0 * Inv_LW; pParam->BSIM3v1Sute = model->BSIM3v1Sute + model->BSIM3v1Slute * Inv_L + model->BSIM3v1Swute * Inv_W + model->BSIM3v1Spute * Inv_LW; pParam->BSIM3v1Svoff = model->BSIM3v1Svoff + model->BSIM3v1Slvoff * Inv_L + model->BSIM3v1Swvoff * Inv_W + model->BSIM3v1Spvoff * Inv_LW; pParam->BSIM3v1Sdelta = model->BSIM3v1Sdelta + model->BSIM3v1Sldelta * Inv_L + model->BSIM3v1Swdelta * Inv_W + model->BSIM3v1Spdelta * Inv_LW; pParam->BSIM3v1Srdsw = model->BSIM3v1Srdsw + model->BSIM3v1Slrdsw * Inv_L + model->BSIM3v1Swrdsw * Inv_W + model->BSIM3v1Sprdsw * Inv_LW; pParam->BSIM3v1Sprwg = model->BSIM3v1Sprwg + model->BSIM3v1Slprwg * Inv_L + model->BSIM3v1Swprwg * Inv_W + model->BSIM3v1Spprwg * Inv_LW; pParam->BSIM3v1Sprwb = model->BSIM3v1Sprwb + model->BSIM3v1Slprwb * Inv_L + model->BSIM3v1Swprwb * Inv_W + model->BSIM3v1Spprwb * Inv_LW; pParam->BSIM3v1Sprt = model->BSIM3v1Sprt + model->BSIM3v1Slprt * Inv_L + model->BSIM3v1Swprt * Inv_W + model->BSIM3v1Spprt * Inv_LW; pParam->BSIM3v1Seta0 = model->BSIM3v1Seta0 + model->BSIM3v1Sleta0 * Inv_L + model->BSIM3v1Sweta0 * Inv_W + model->BSIM3v1Speta0 * Inv_LW; pParam->BSIM3v1Setab = model->BSIM3v1Setab + model->BSIM3v1Sletab * Inv_L + model->BSIM3v1Swetab * Inv_W + model->BSIM3v1Spetab * Inv_LW; pParam->BSIM3v1Spclm = model->BSIM3v1Spclm + model->BSIM3v1Slpclm * Inv_L + model->BSIM3v1Swpclm * Inv_W + model->BSIM3v1Sppclm * Inv_LW; pParam->BSIM3v1Spdibl1 = model->BSIM3v1Spdibl1 + model->BSIM3v1Slpdibl1 * Inv_L + model->BSIM3v1Swpdibl1 * Inv_W + model->BSIM3v1Sppdibl1 * Inv_LW; pParam->BSIM3v1Spdibl2 = model->BSIM3v1Spdibl2 + model->BSIM3v1Slpdibl2 * Inv_L + model->BSIM3v1Swpdibl2 * Inv_W + model->BSIM3v1Sppdibl2 * Inv_LW; pParam->BSIM3v1Spdiblb = model->BSIM3v1Spdiblb + model->BSIM3v1Slpdiblb * Inv_L + model->BSIM3v1Swpdiblb * Inv_W + model->BSIM3v1Sppdiblb * Inv_LW; pParam->BSIM3v1Spscbe1 = model->BSIM3v1Spscbe1 + model->BSIM3v1Slpscbe1 * Inv_L + model->BSIM3v1Swpscbe1 * Inv_W + model->BSIM3v1Sppscbe1 * Inv_LW; pParam->BSIM3v1Spscbe2 = model->BSIM3v1Spscbe2 + model->BSIM3v1Slpscbe2 * Inv_L + model->BSIM3v1Swpscbe2 * Inv_W + model->BSIM3v1Sppscbe2 * Inv_LW; pParam->BSIM3v1Spvag = model->BSIM3v1Spvag + model->BSIM3v1Slpvag * Inv_L + model->BSIM3v1Swpvag * Inv_W + model->BSIM3v1Sppvag * Inv_LW; pParam->BSIM3v1Swr = model->BSIM3v1Swr + model->BSIM3v1Slwr * Inv_L + model->BSIM3v1Swwr * Inv_W + model->BSIM3v1Spwr * Inv_LW; pParam->BSIM3v1Sdwg = model->BSIM3v1Sdwg + model->BSIM3v1Sldwg * Inv_L + model->BSIM3v1Swdwg * Inv_W + model->BSIM3v1Spdwg * Inv_LW; pParam->BSIM3v1Sdwb = model->BSIM3v1Sdwb + model->BSIM3v1Sldwb * Inv_L + model->BSIM3v1Swdwb * Inv_W + model->BSIM3v1Spdwb * Inv_LW; pParam->BSIM3v1Sb0 = model->BSIM3v1Sb0 + model->BSIM3v1Slb0 * Inv_L + model->BSIM3v1Swb0 * Inv_W + model->BSIM3v1Spb0 * Inv_LW; pParam->BSIM3v1Sb1 = model->BSIM3v1Sb1 + model->BSIM3v1Slb1 * Inv_L + model->BSIM3v1Swb1 * Inv_W + model->BSIM3v1Spb1 * Inv_LW; pParam->BSIM3v1Salpha0 = model->BSIM3v1Salpha0 + model->BSIM3v1Slalpha0 * Inv_L + model->BSIM3v1Swalpha0 * Inv_W + model->BSIM3v1Spalpha0 * Inv_LW; pParam->BSIM3v1Sbeta0 = model->BSIM3v1Sbeta0 + model->BSIM3v1Slbeta0 * Inv_L + model->BSIM3v1Swbeta0 * Inv_W + model->BSIM3v1Spbeta0 * Inv_LW; /* CV model */ pParam->BSIM3v1Selm = model->BSIM3v1Selm + model->BSIM3v1Slelm * Inv_L + model->BSIM3v1Swelm * Inv_W + model->BSIM3v1Spelm * Inv_LW; pParam->BSIM3v1Scgsl = model->BSIM3v1Scgsl + model->BSIM3v1Slcgsl * Inv_L + model->BSIM3v1Swcgsl * Inv_W + model->BSIM3v1Spcgsl * Inv_LW; pParam->BSIM3v1Scgdl = model->BSIM3v1Scgdl + model->BSIM3v1Slcgdl * Inv_L + model->BSIM3v1Swcgdl * Inv_W + model->BSIM3v1Spcgdl * Inv_LW; pParam->BSIM3v1Sckappa = model->BSIM3v1Sckappa + model->BSIM3v1Slckappa * Inv_L + model->BSIM3v1Swckappa * Inv_W + model->BSIM3v1Spckappa * Inv_LW; pParam->BSIM3v1Scf = model->BSIM3v1Scf + model->BSIM3v1Slcf * Inv_L + model->BSIM3v1Swcf * Inv_W + model->BSIM3v1Spcf * Inv_LW; pParam->BSIM3v1Sclc = model->BSIM3v1Sclc + model->BSIM3v1Slclc * Inv_L + model->BSIM3v1Swclc * Inv_W + model->BSIM3v1Spclc * Inv_LW; pParam->BSIM3v1Scle = model->BSIM3v1Scle + model->BSIM3v1Slcle * Inv_L + model->BSIM3v1Swcle * Inv_W + model->BSIM3v1Spcle * Inv_LW; pParam->BSIM3v1Svfbcv = model->BSIM3v1Svfbcv + model->BSIM3v1Slvfbcv * Inv_L + model->BSIM3v1Swvfbcv * Inv_W + model->BSIM3v1Spvfbcv * Inv_LW; pParam->BSIM3v1SabulkCVfactor = 1.0 + pow((pParam->BSIM3v1Sclc / pParam->BSIM3v1Sleff), pParam->BSIM3v1Scle); T0 = (TRatio - 1.0); pParam->BSIM3v1Sua = pParam->BSIM3v1Sua + pParam->BSIM3v1Sua1 * T0; pParam->BSIM3v1Sub = pParam->BSIM3v1Sub + pParam->BSIM3v1Sub1 * T0; pParam->BSIM3v1Suc = pParam->BSIM3v1Suc + pParam->BSIM3v1Suc1 * T0; if (pParam->BSIM3v1Su0 > 1.0) pParam->BSIM3v1Su0 = pParam->BSIM3v1Su0 / 1.0e4; pParam->BSIM3v1Su0temp = pParam->BSIM3v1Su0 * pow(TRatio, pParam->BSIM3v1Sute); pParam->BSIM3v1Svsattemp = pParam->BSIM3v1Svsat - pParam->BSIM3v1Sat * T0; pParam->BSIM3v1Srds0 = (pParam->BSIM3v1Srdsw + pParam->BSIM3v1Sprt * T0) / pow(pParam->BSIM3v1Sweff * 1E6, pParam->BSIM3v1Swr); if (BSIM3v1ScheckModel(model, here, ckt)) { IFuid namarray[2]; namarray[0] = model->BSIM3v1SmodName; namarray[1] = here->BSIM3v1Sname; (*(SPfrontEnd->IFerror)) (ERR_FATAL, "Fatal error(s) detected during BSIM3v1SV3 parameter checking for %s in model %s", namarray); return(E_BADPARM); } pParam->BSIM3v1Scgdo = (model->BSIM3v1Scgdo + pParam->BSIM3v1Scf) * pParam->BSIM3v1SweffCV; pParam->BSIM3v1Scgso = (model->BSIM3v1Scgso + pParam->BSIM3v1Scf) * pParam->BSIM3v1SweffCV; pParam->BSIM3v1Scgbo = model->BSIM3v1Scgbo * pParam->BSIM3v1SleffCV; if (!model->BSIM3v1SnpeakGiven && model->BSIM3v1Sgamma1Given) { T0 = pParam->BSIM3v1Sgamma1 * model->BSIM3v1Scox; pParam->BSIM3v1Snpeak = 3.021E22 * T0 * T0; } pParam->BSIM3v1Sphi = 2.0 * Vtm0 * log(pParam->BSIM3v1Snpeak / ni); pParam->BSIM3v1SsqrtPhi = sqrt(pParam->BSIM3v1Sphi); pParam->BSIM3v1Sphis3 = pParam->BSIM3v1SsqrtPhi * pParam->BSIM3v1Sphi; pParam->BSIM3v1SXdep0 = sqrt(2.0 * EPSSI / (Charge_q * pParam->BSIM3v1Snpeak * 1.0e6)) * pParam->BSIM3v1SsqrtPhi; pParam->BSIM3v1SsqrtXdep0 = sqrt(pParam->BSIM3v1SXdep0); pParam->BSIM3v1Slitl = sqrt(3.0 * pParam->BSIM3v1Sxj * model->BSIM3v1Stox); pParam->BSIM3v1Svbi = Vtm0 * log(1.0e20 * pParam->BSIM3v1Snpeak / (ni * ni)); pParam->BSIM3v1Scdep0 = sqrt(Charge_q * EPSSI * pParam->BSIM3v1Snpeak * 1.0e6 / 2.0 / pParam->BSIM3v1Sphi); if (model->BSIM3v1Sk1Given || model->BSIM3v1Sk2Given) { if (!model->BSIM3v1Sk1Given) { fprintf(stdout, "Warning: k1 should be specified with k2.\n"); pParam->BSIM3v1Sk1 = 0.53; } if (!model->BSIM3v1Sk2Given) { fprintf(stdout, "Warning: k2 should be specified with k1.\n"); pParam->BSIM3v1Sk2 = -0.0186; } if (model->BSIM3v1SnsubGiven) fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n"); if (model->BSIM3v1SxtGiven) fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n"); if (model->BSIM3v1SvbxGiven) fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n"); if (model->BSIM3v1SvbmGiven) fprintf(stdout, "Warning: vbm is ignored because k1 or k2 is given.\n"); if (model->BSIM3v1Sgamma1Given) fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n"); if (model->BSIM3v1Sgamma2Given) fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n"); } else { if (!model->BSIM3v1SvbxGiven) pParam->BSIM3v1Svbx = pParam->BSIM3v1Sphi - 7.7348e-4 * pParam->BSIM3v1Snpeak * pParam->BSIM3v1Sxt * pParam->BSIM3v1Sxt; if (pParam->BSIM3v1Svbx > 0.0) pParam->BSIM3v1Svbx = -pParam->BSIM3v1Svbx; if (pParam->BSIM3v1Svbm > 0.0) pParam->BSIM3v1Svbm = -pParam->BSIM3v1Svbm; if (!model->BSIM3v1Sgamma1Given) pParam->BSIM3v1Sgamma1 = 5.753e-12 * sqrt(pParam->BSIM3v1Snpeak) / model->BSIM3v1Scox; if (!model->BSIM3v1Sgamma2Given) pParam->BSIM3v1Sgamma2 = 5.753e-12 * sqrt(pParam->BSIM3v1Snsub) / model->BSIM3v1Scox; T0 = pParam->BSIM3v1Sgamma1 - pParam->BSIM3v1Sgamma2; T1 = sqrt(pParam->BSIM3v1Sphi - pParam->BSIM3v1Svbx) - pParam->BSIM3v1SsqrtPhi; T2 = sqrt(pParam->BSIM3v1Sphi * (pParam->BSIM3v1Sphi - pParam->BSIM3v1Svbm)) - pParam->BSIM3v1Sphi; pParam->BSIM3v1Sk2 = T0 * T1 / (2.0 * T2 + pParam->BSIM3v1Svbm); pParam->BSIM3v1Sk1 = pParam->BSIM3v1Sgamma2 - 2.0 * pParam->BSIM3v1Sk2 * sqrt(pParam->BSIM3v1Sphi - pParam->BSIM3v1Svbm); } if (pParam->BSIM3v1Sk2 < 0.0) { T0 = 0.5 * pParam->BSIM3v1Sk1 / pParam->BSIM3v1Sk2; pParam->BSIM3v1Svbsc = 0.9 * (pParam->BSIM3v1Sphi - T0 * T0); if (pParam->BSIM3v1Svbsc > -3.0) pParam->BSIM3v1Svbsc = -3.0; else if (pParam->BSIM3v1Svbsc < -30.0) pParam->BSIM3v1Svbsc = -30.0; } else { pParam->BSIM3v1Svbsc = -30.0; } if (pParam->BSIM3v1Svbsc > pParam->BSIM3v1Svbm) pParam->BSIM3v1Svbsc = pParam->BSIM3v1Svbm; if (model->BSIM3v1Svth0Given) { pParam->BSIM3v1Svfb = model->BSIM3v1Stype * pParam->BSIM3v1Svth0 - pParam->BSIM3v1Sphi - pParam->BSIM3v1Sk1 * pParam->BSIM3v1SsqrtPhi; } else { pParam->BSIM3v1Svfb = -1.0; pParam->BSIM3v1Svth0 = model->BSIM3v1Stype * (pParam->BSIM3v1Svfb + pParam->BSIM3v1Sphi + pParam->BSIM3v1Sk1 * pParam->BSIM3v1SsqrtPhi); } T1 = sqrt(EPSSI / EPSOX * model->BSIM3v1Stox * pParam->BSIM3v1SXdep0); T0 = exp(-0.5 * pParam->BSIM3v1Sdsub * pParam->BSIM3v1Sleff / T1); pParam->BSIM3v1Stheta0vb0 = (T0 + 2.0 * T0 * T0); T0 = exp(-0.5 * pParam->BSIM3v1Sdrout * pParam->BSIM3v1Sleff / T1); T2 = (T0 + 2.0 * T0 * T0); pParam->BSIM3v1SthetaRout = pParam->BSIM3v1Spdibl1 * T2 + pParam->BSIM3v1Spdibl2; } /* process source/drain series resistance */ here->BSIM3v1SdrainConductance = model->BSIM3v1SsheetResistance * here->BSIM3v1SdrainSquares; if (here->BSIM3v1SdrainConductance > 0.0) here->BSIM3v1SdrainConductance = 1.0 / here->BSIM3v1SdrainConductance; else here->BSIM3v1SdrainConductance = 0.0; here->BSIM3v1SsourceConductance = model->BSIM3v1SsheetResistance * here->BSIM3v1SsourceSquares; if (here->BSIM3v1SsourceConductance > 0.0) here->BSIM3v1SsourceConductance = 1.0 / here->BSIM3v1SsourceConductance; else here->BSIM3v1SsourceConductance = 0.0; here->BSIM3v1Scgso = pParam->BSIM3v1Scgso; here->BSIM3v1Scgdo = pParam->BSIM3v1Scgdo; } } return(OK);}
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