b3ld.c

来自「ngspice又一个电子CAD仿真软件代码.功能更全」· C语言 代码 · 共 1,722 行 · 第 1/5 页

	                  T3 = -(T2 + Two_Third_CoxWL * dVth_dVb);
	                  here->BSIM3cbsb = -(here->BSIM3cbgb + T3);
                          here->BSIM3cbdb = 0.0;
                          here->BSIM3qinv = -(qgate + qbulk);
	              }
		      else
		      {   /* linear region */
			  Alphaz = Vgst / Vdsat;
	                  T1 = 2.0 * Vdsat - Vds;
	                  T2 = Vds / (3.0 * T1);
	                  T3 = T2 * Vds;
	                  T9 = 0.25 * CoxWL;
	                  T4 = T9 * Alphaz;
	                  T7 = 2.0 * Vds - T1 - 3.0 * T3;
	                  T8 = T3 - T1 - 2.0 * Vds;
	                  qgate = CoxWL * (Vgs_eff - Vfb 
			        - pParam->BSIM3phi - 0.5 * (Vds - T3));
	                  T10 = T4 * T8;
	                  qdrn = T4 * T7;
	                  qbulk = -(qgate + qdrn + T10);
  
                          T5 = T3 / T1;
                          here->BSIM3cggb = CoxWL * (1.0 - T5 * dVdsat_dVg)
					  * dVgs_eff_dVg;
                          T11 = -CoxWL * T5 * dVdsat_dVb;
                          here->BSIM3cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5);
                          here->BSIM3cgsb = -(here->BSIM3cggb + T11
                                          + here->BSIM3cgdb);
                          T6 = 1.0 / Vdsat;
                          dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg);
                          dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb);
                          T7 = T9 * T7;
                          T8 = T9 * T8;
                          T9 = 2.0 * T4 * (1.0 - 3.0 * T5);
                          here->BSIM3cdgb = (T7 * dAlphaz_dVg - T9
					  * dVdsat_dVg) * dVgs_eff_dVg;
                          T12 = T7 * dAlphaz_dVb - T9 * dVdsat_dVb;
                          here->BSIM3cddb = T4 * (3.0 - 6.0 * T2 - 3.0 * T5);
                          here->BSIM3cdsb = -(here->BSIM3cdgb + T12
                                          + here->BSIM3cddb);

                          T9 = 2.0 * T4 * (1.0 + T5);
                          T10 = (T8 * dAlphaz_dVg - T9 * dVdsat_dVg)
			      * dVgs_eff_dVg;
                          T11 = T8 * dAlphaz_dVb - T9 * dVdsat_dVb;
                          T12 = T4 * (2.0 * T2 + T5 - 1.0); 
                          T0 = -(T10 + T11 + T12);

                          here->BSIM3cbgb = -(here->BSIM3cggb
					  + here->BSIM3cdgb + T10);
                          here->BSIM3cbdb = -(here->BSIM3cgdb 
					  + here->BSIM3cddb + T12);
                          here->BSIM3cbsb = -(here->BSIM3cgsb
					  + here->BSIM3cdsb + T0);
                          here->BSIM3qinv = -(qgate + qbulk);
                      }
                  }
		  else if (model->BSIM3xpart < 0.5)
		  {   /* 40/60 Charge partition model */
		      if (Vds >= Vdsat)
		      {   /* saturation region */
	                  T1 = Vdsat / 3.0;
	                  qgate = CoxWL * (Vgs_eff - Vfb
			        - pParam->BSIM3phi - T1);
	                  T2 = -Two_Third_CoxWL * Vgst;
	                  qbulk = -(qgate + T2);
	                  qdrn = 0.4 * T2;

	                  here->BSIM3cggb = One_Third_CoxWL * (3.0 
					  - dVdsat_dVg) * dVgs_eff_dVg;
	                  T2 = -One_Third_CoxWL * dVdsat_dVb;
	                  here->BSIM3cgsb = -(here->BSIM3cggb + T2);
        	          here->BSIM3cgdb = 0.0;
       
			  T3 = 0.4 * Two_Third_CoxWL;
                          here->BSIM3cdgb = -T3 * dVgs_eff_dVg;
                          here->BSIM3cddb = 0.0;
			  T4 = T3 * dVth_dVb;
                          here->BSIM3cdsb = -(T4 + here->BSIM3cdgb);

	                  here->BSIM3cbgb = -(here->BSIM3cggb 
					  - Two_Third_CoxWL * dVgs_eff_dVg);
	                  T3 = -(T2 + Two_Third_CoxWL * dVth_dVb);
	                  here->BSIM3cbsb = -(here->BSIM3cbgb + T3);
                          here->BSIM3cbdb = 0.0;
                          here->BSIM3qinv = -(qgate + qbulk);
	              }
		      else
		      {   /* linear region  */
			  Alphaz = Vgst / Vdsat;
			  T1 = 2.0 * Vdsat - Vds;
			  T2 = Vds / (3.0 * T1);
			  T3 = T2 * Vds;
			  T9 = 0.25 * CoxWL;
			  T4 = T9 * Alphaz;
			  qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3phi
				- 0.5 * (Vds - T3));

			  T5 = T3 / T1;
                          here->BSIM3cggb = CoxWL * (1.0 - T5 * dVdsat_dVg)
					  * dVgs_eff_dVg;
                          tmp = -CoxWL * T5 * dVdsat_dVb;
                          here->BSIM3cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5);
                          here->BSIM3cgsb = -(here->BSIM3cggb 
					  + here->BSIM3cgdb + tmp);

			  T6 = 1.0 / Vdsat;
                          dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg);
                          dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb);

			  T6 = 8.0 * Vdsat * Vdsat - 6.0 * Vdsat * Vds
			     + 1.2 * Vds * Vds;
			  T8 = T2 / T1;
			  T7 = Vds - T1 - T8 * T6;
			  qdrn = T4 * T7;
			  T7 *= T9;
			  tmp = T8 / T1;
			  tmp1 = T4 * (2.0 - 4.0 * tmp * T6
			       + T8 * (16.0 * Vdsat - 6.0 * Vds));

                          here->BSIM3cdgb = (T7 * dAlphaz_dVg - tmp1
					  * dVdsat_dVg) * dVgs_eff_dVg;
                          T10 = T7 * dAlphaz_dVb - tmp1 * dVdsat_dVb;
                          here->BSIM3cddb = T4 * (2.0 - (1.0 / (3.0 * T1
					  * T1) + 2.0 * tmp) * T6 + T8
					  * (6.0 * Vdsat - 2.4 * Vds));
                          here->BSIM3cdsb = -(here->BSIM3cdgb 
					  + T10 + here->BSIM3cddb);

			  T7 = 2.0 * (T1 + T3);
			  qbulk = -(qgate - T4 * T7);
			  T7 *= T9;
			  T0 = 4.0 * T4 * (1.0 - T5);
			  T12 = (-T7 * dAlphaz_dVg - here->BSIM3cdgb
			      - T0 * dVdsat_dVg) * dVgs_eff_dVg;
			  T11 = -T7 * dAlphaz_dVb - T10 - T0 * dVdsat_dVb;
			  T10 = -4.0 * T4 * (T2 - 0.5 + 0.5 * T5) 
			      - here->BSIM3cddb;
                          tmp = -(T10 + T11 + T12);

                          here->BSIM3cbgb = -(here->BSIM3cggb 
					  + here->BSIM3cdgb + T12);
                          here->BSIM3cbdb = -(here->BSIM3cgdb
					  + here->BSIM3cddb + T10); /* bug fix */
                          here->BSIM3cbsb = -(here->BSIM3cgsb
					  + here->BSIM3cdsb + tmp);
                          here->BSIM3qinv = -(qgate + qbulk);
                      }
                  }
		  else
		  {   /* 50/50 partitioning */
		      if (Vds >= Vdsat)
		      {   /* saturation region */
	                  T1 = Vdsat / 3.0;
	                  qgate = CoxWL * (Vgs_eff - Vfb
			        - pParam->BSIM3phi - T1);
	                  T2 = -Two_Third_CoxWL * Vgst;
	                  qbulk = -(qgate + T2);
	                  qdrn = 0.5 * T2;

	                  here->BSIM3cggb = One_Third_CoxWL * (3.0
					  - dVdsat_dVg) * dVgs_eff_dVg;
	                  T2 = -One_Third_CoxWL * dVdsat_dVb;
	                  here->BSIM3cgsb = -(here->BSIM3cggb + T2);
        	          here->BSIM3cgdb = 0.0;
       
                          here->BSIM3cdgb = -One_Third_CoxWL * dVgs_eff_dVg;
                          here->BSIM3cddb = 0.0;
			  T4 = One_Third_CoxWL * dVth_dVb;
                          here->BSIM3cdsb = -(T4 + here->BSIM3cdgb);

	                  here->BSIM3cbgb = -(here->BSIM3cggb 
					  - Two_Third_CoxWL * dVgs_eff_dVg);
	                  T3 = -(T2 + Two_Third_CoxWL * dVth_dVb);
	                  here->BSIM3cbsb = -(here->BSIM3cbgb + T3);
                          here->BSIM3cbdb = 0.0;
                          here->BSIM3qinv = -(qgate + qbulk);
	              }
		      else
		      {   /* linear region */
			  Alphaz = Vgst / Vdsat;
			  T1 = 2.0 * Vdsat - Vds;
			  T2 = Vds / (3.0 * T1);
			  T3 = T2 * Vds;
			  T9 = 0.25 * CoxWL;
			  T4 = T9 * Alphaz;
			  qgate = CoxWL * (Vgs_eff - Vfb - pParam->BSIM3phi
				- 0.5 * (Vds - T3));

			  T5 = T3 / T1;
                          here->BSIM3cggb = CoxWL * (1.0 - T5 * dVdsat_dVg)
					  * dVgs_eff_dVg;
                          tmp = -CoxWL * T5 * dVdsat_dVb;
                          here->BSIM3cgdb = CoxWL * (T2 - 0.5 + 0.5 * T5);
                          here->BSIM3cgsb = -(here->BSIM3cggb 
					  + here->BSIM3cgdb + tmp);

			  T6 = 1.0 / Vdsat;
                          dAlphaz_dVg = T6 * (1.0 - Alphaz * dVdsat_dVg);
                          dAlphaz_dVb = -T6 * (dVth_dVb + Alphaz * dVdsat_dVb);

			  T7 = T1 + T3;
			  qdrn = -T4 * T7;
			  qbulk = - (qgate + qdrn + qdrn);
			  T7 *= T9;
			  T0 = T4 * (2.0 * T5 - 2.0);

                          here->BSIM3cdgb = (T0 * dVdsat_dVg - T7
					  * dAlphaz_dVg) * dVgs_eff_dVg;
			  T12 = T0 * dVdsat_dVb - T7 * dAlphaz_dVb;
                          here->BSIM3cddb = T4 * (1.0 - 2.0 * T2 - T5);
                          here->BSIM3cdsb = -(here->BSIM3cdgb + T12
                                          + here->BSIM3cddb);

                          here->BSIM3cbgb = -(here->BSIM3cggb
					  + 2.0 * here->BSIM3cdgb);
                          here->BSIM3cbdb = -(here->BSIM3cgdb
					  + 2.0 * here->BSIM3cddb);
                          here->BSIM3cbsb = -(here->BSIM3cgsb
					  + 2.0 * here->BSIM3cdsb);
                          here->BSIM3qinv = -(qgate + qbulk);
                      }
	          }
	      }
          } 
	  else
	  {   if (Vbseff < 0.0)
	      {   VbseffCV = Vbseff;
                  dVbseffCV_dVb = 1.0;
              }
	      else
	      {   VbseffCV = pParam->BSIM3phi - Phis;
                  dVbseffCV_dVb = -dPhis_dVb;
              }

              CoxWL = model->BSIM3cox * pParam->BSIM3weffCV
		    * pParam->BSIM3leffCV;

              /* Seperate VgsteffCV with noff and voffcv */
              noff = n * pParam->BSIM3noff;
              dnoff_dVd = pParam->BSIM3noff * dn_dVd;
              dnoff_dVb = pParam->BSIM3noff * dn_dVb;
              T0 = Vtm * noff;
              voffcv = pParam->BSIM3voffcv;
              VgstNVt = (Vgst - voffcv) / T0;

              if (VgstNVt > EXP_THRESHOLD)
              {   Vgsteff = Vgst - voffcv;
                  dVgsteff_dVg = dVgs_eff_dVg;
                  dVgsteff_dVd = -dVth_dVd;
                  dVgsteff_dVb = -dVth_dVb;
              }
              else if (VgstNVt < -EXP_THRESHOLD)
              {   Vgsteff = T0 * log(1.0 + MIN_EXP);
                  dVgsteff_dVg = 0.0;
                  dVgsteff_dVd = Vgsteff / noff;
                  dVgsteff_dVb = dVgsteff_dVd * dnoff_dVb;
                  dVgsteff_dVd *= dnoff_dVd;
              }
              else
              {   ExpVgst = exp(VgstNVt);
                  Vgsteff = T0 * log(1.0 + ExpVgst);
                  dVgsteff_dVg = ExpVgst / (1.0 + ExpVgst);
                  dVgsteff_dVd = -dVgsteff_dVg * (dVth_dVd + (Vgst - voffcv)
                               / noff * dnoff_dVd) + Vgsteff / noff * dnoff_dVd;
                  dVgsteff_dVb = -dVgsteff_dVg * (dVth_dVb + (Vgst - voffcv)
                               / noff * dnoff_dVb) + Vgsteff / noff * dnoff_dVb;
                  dVgsteff_dVg *= dVgs_eff_dVg;
              } /* End of VgsteffCV */

	      if (model->BSIM3capMod == 1)
	      {   
		  /* Added revision dependent code */
		  switch (model->BSIM3intVersion) {
		    case BSIM3V324:
		    case BSIM3V323:
		    case BSIM3V322:
		      Vfb = pParam->BSIM3vfbzb;
		      break;
		    case BSIM3V32:
		      Vfb = pParam->BSIM3vfbzb;
		      dVfb_dVb = dVfb_dVd = 0.0;
		      break;
		    default:
		      Vfb = Vth - pParam->BSIM3phi - pParam->BSIM3k1ox * sqrtPhis;
		      dVfb_dVb = dVth_dVb - pParam->BSIM3k1ox * dsqrtPhis_dVb;
		      dVfb_dVd = dVth_dVd;
		  }

                  Arg1 = Vgs_eff - VbseffCV - Vfb - Vgsteff;

                  if (Arg1 <= 0.0)
	          {   qgate = CoxWL * Arg1;
                      Cgg = CoxWL * (dVgs_eff_dVg - dVgsteff_dVg);
		      /* Added revision dependent code */
		      switch (model->BSIM3intVersion) {
			case BSIM3V324:
			case BSIM3V323:
			case BSIM3V322:
			  Cgd = -CoxWL * dVgsteff_dVd;
			  Cgb = -CoxWL * (dVbseffCV_dVb + dVgsteff_dVb);
			  break;
			case BSIM3V32:
			default:
			  Cgd = -CoxWL * (dVfb_dVd + dVgsteff_dVd);
			  Cgb = -CoxWL * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb);
		      }
                  }
	          else
	          {   T0 = 0.5 * pParam->BSIM3k1ox;
		      T1 = sqrt(T0 * T0 + Arg1);
                      T2 = CoxWL * T0 / T1;
		      
                      qgate = CoxWL * pParam->BSIM3k1ox * (T1 - T0);

                      Cgg = T2 * (dVgs_eff_dVg - dVgsteff_dVg);
		      /* Added revision dependent code */
		      switch (model->BSIM3intVersion) {
			case BSIM3V324:
			case BSIM3V323:
			case BSIM3V322:
			  Cgd = -T2 * dVgsteff_dVd;
			  Cgb = -T2 * (dVbseffCV_dVb + dVgsteff_dVb);
			  break;
			case BSIM3V32:
			default:
			  Cgd = -T2 * (dVfb_dVd + dVgsteff_dVd);
			  Cgb = -T2 * (dVfb_dVb + dVbseffCV_dVb + dVgsteff_dVb);
		      }
                  }
	          qbulk = -qgate;
	          Cbg = -Cgg;
	          Cbd = -Cgd;
	          Cbb = -Cgb;

                  One_Third_CoxWL = CoxWL / 3.0;
                  Two_Third_CoxWL = 2.0 * One_Third_CoxWL;
                  AbulkCV = Abulk0 * pParam->BSIM3abulkCVfactor;
                  dAbulkCV_dVb = pParam->BSIM3abulkCVfactor * dAbulk0_dVb;
	          VdsatCV = Vgsteff / AbulkCV;
                  if (VdsatCV < Vds)
	          {   dVdsatCV_dVg = 1.0 / A