soi3acld.c

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            /* Code for multiple thermal time constants.  Start by moving all */
            /* rt and ct constants into arrays. */
            rtargs[0]=here->SOI3rt;
            rtargs[1]=here->SOI3rt1;
            rtargs[2]=here->SOI3rt2;
            rtargs[3]=here->SOI3rt3;
            rtargs[4]=here->SOI3rt4;

            ctargs[0]=here->SOI3ct;
            ctargs[1]=here->SOI3ct1;
            ctargs[2]=here->SOI3ct2;
            ctargs[3]=here->SOI3ct3;
            ctargs[4]=here->SOI3ct4;

            /* Set all admittance components to zero. */
            grt[0]=grt[1]=grt[2]=grt[3]=grt[4]=0.0;
            xct[0]=xct[1]=xct[2]=xct[3]=xct[4]=0.0;
            /* Now calculate conductances and susceptances from rt and ct. */
            /* Don't need to worry about divide by zero when calculating */
            /* grt components, as soi3setup() only creates a thermal node */
            /* if corresponding rt is greater than zero. */
            for(tnodeindex=0;tnodeindex<here->SOI3numThermalNodes;tnodeindex++)
            {
				   xct[tnodeindex] = ctargs[tnodeindex] * ckt->CKTomega;
               grt[tnodeindex] = 1/rtargs[tnodeindex];
            }
            /* End JimB */

            /*
             *    load matrix
             */

            m = here->SOI3m;

            *(here->SOI3GF_gfPtr + 1) += m * xcgfgf;
            *(here->SOI3GF_gbPtr + 1) += m * xcgfgb;
            *(here->SOI3GF_dpPtr + 1) += m * xcgfd;
            *(here->SOI3GF_spPtr + 1) += m * xcgfs;
            *(here->SOI3GF_bPtr + 1)  -= m * (xcgfgf + xcgfd + xcgfs + xcgfgb);

            *(here->SOI3GB_gfPtr + 1) += m * xcgbgf;
            *(here->SOI3GB_gbPtr + 1) += m * xcgbgb;
            *(here->SOI3GB_dpPtr + 1) += m * xcgbd;
            *(here->SOI3GB_spPtr + 1) += m * xcgbs;
            *(here->SOI3GB_bPtr + 1)  -= m * (xcgbgf + xcgbd + xcgbs + xcgbgb);

            *(here->SOI3B_gfPtr + 1) += m * xcbgf;
            *(here->SOI3B_gbPtr + 1) += m * xcbgb;
            *(here->SOI3B_dpPtr + 1) += m * (xcbd-xcBJTbdbd);
            *(here->SOI3B_spPtr + 1) += m * (xcbs-xcBJTbsbs);
            *(here->SOI3B_bPtr + 1)  += m * (-(xcbgf+xcbd+xcbs+xcbgb)
                                        +xcBJTbsbs+xcBJTbdbd);

            *(here->SOI3DP_gfPtr + 1) += m * xcdgf;
            *(here->SOI3DP_gbPtr + 1) += m * xcdgb;
            *(here->SOI3DP_dpPtr + 1) += m * (xcdd+xcBJTbdbd);
            *(here->SOI3DP_spPtr + 1) += m * xcds;
            *(here->SOI3DP_bPtr + 1)  -= m * (xcdgf + xcdd + xcds + xcdgb + xcBJTbdbd);

            *(here->SOI3SP_gfPtr + 1) += m * xcsgf;
            *(here->SOI3SP_gbPtr + 1) += m * xcsgb;
            *(here->SOI3SP_dpPtr + 1) += m * xcsd;
            *(here->SOI3SP_spPtr + 1) += m * (xcss+xcBJTbsbs);
            *(here->SOI3SP_bPtr + 1)  -= m * (xcsgf + xcsd + xcss + xcsgb + xcBJTbsbs);
        
/* if no thermal behaviour specified, then put in zero valued indpt. voltage source
   between TOUT and ground */
            if (here->SOI3rt==0)
            {
            	*(here->SOI3TOUT_ibrPtr + 1) += m * 1.0;
   		*(here->SOI3IBR_toutPtr + 1) += m * 1.0;
            	*(ckt->CKTirhs + (here->SOI3branch)) = 0;
            }
            else
            {
            	*(here->SOI3TOUT_toutPtr + 1) += m * xct[0];
            	if (here->SOI3numThermalNodes > 1)
              	{
               	*(here->SOI3TOUT_tout1Ptr + 1) += m * (-xct[0]);
               	*(here->SOI3TOUT1_toutPtr + 1) += m * (-xct[0]);
               	*(here->SOI3TOUT1_tout1Ptr + 1) += m * (xct[0]+xct[1]);
              	}
              	if (here->SOI3numThermalNodes > 2)
              	{
               	*(here->SOI3TOUT1_tout2Ptr + 1) += m * (-xct[1]);
               	*(here->SOI3TOUT2_tout1Ptr + 1) += m * (-xct[1]);
               	*(here->SOI3TOUT2_tout2Ptr + 1) += m * (xct[1]+xct[2]);
              	}
            	if (here->SOI3numThermalNodes > 3)
              	{
               	*(here->SOI3TOUT2_tout3Ptr + 1) += m * (-xct[2]);
               	*(here->SOI3TOUT3_tout2Ptr + 1) += m * (-xct[2]);
               	*(here->SOI3TOUT3_tout3Ptr + 1) += m * (xct[2]+xct[3]);
              	}
              	if (here->SOI3numThermalNodes > 4)
              	{
               	*(here->SOI3TOUT3_tout4Ptr + 1) += m * (-xct[3]);
               	*(here->SOI3TOUT4_tout3Ptr + 1) += m * (-xct[3]);
               	*(here->SOI3TOUT4_tout4Ptr + 1) += m * (xct[3]+xct[4]);
              	}
            	*(here->SOI3GF_toutPtr + 1) += m * xcgfdeltaT*model->SOI3type;
            	*(here->SOI3DP_toutPtr + 1) += m * (xcddeltaT - xcBJTbddeltaT)*model->SOI3type;
            	*(here->SOI3SP_toutPtr + 1) += m * (xcsdeltaT - xcBJTbsdeltaT)*model->SOI3type;
            	*(here->SOI3B_toutPtr + 1) += m * model->SOI3type *
                                            (xcbdeltaT + xcBJTbsdeltaT + xcBJTbddeltaT);
            	*(here->SOI3GB_toutPtr + 1) += m * xcgbdeltaT*model->SOI3type;
            }


            /* and now real part */
            *(here->SOI3D_dPtr)  += (m * here->SOI3drainConductance);
            *(here->SOI3D_dpPtr) += (m * (-here->SOI3drainConductance));
            *(here->SOI3DP_dPtr) += (m * (-here->SOI3drainConductance));
            
            *(here->SOI3S_sPtr)  += (m * here->SOI3sourceConductance);
            *(here->SOI3S_spPtr) += (m * (-here->SOI3sourceConductance));
            *(here->SOI3SP_sPtr) += (m * (-here->SOI3sourceConductance));

            *(here->SOI3DP_gfPtr) += ((m * (xnrm-xrev)*here->SOI3gmf +
                                      xnrm*here->SOI3gMmf));
            *(here->SOI3DP_gbPtr) += (m * ((xnrm-xrev)*here->SOI3gmb +
                                      xnrm*here->SOI3gMmb));
            *(here->SOI3DP_dpPtr) += m * (here->SOI3drainConductance+here->SOI3gds+
            			      here->SOI3gbd+xrev*(here->SOI3gmf+here->SOI3gmbs+
                                      here->SOI3gmb)+xnrm*here->SOI3gMd);
            *(here->SOI3DP_spPtr) += m * (-here->SOI3gds - here->SOI3gBJTdb_bs
                                      -xnrm*(here->SOI3gmf+here->SOI3gmb+here->SOI3gmbs +
                                      here->SOI3gMmf+here->SOI3gMmb+here->SOI3gMmbs+here->SOI3gMd));
            *(here->SOI3DP_bPtr) += m * (-here->SOI3gbd + here->SOI3gBJTdb_bs
                                     +(xnrm-xrev)*here->SOI3gmbs+
                                      xnrm*here->SOI3gMmbs);

            *(here->SOI3SP_gfPtr) += m * (-(xnrm-xrev)*here->SOI3gmf+
                                      xrev*here->SOI3gMmf);
            *(here->SOI3SP_gbPtr) += m * (-(xnrm-xrev)*here->SOI3gmb+
                                      xrev*here->SOI3gMmb);
            *(here->SOI3SP_dpPtr) += m * (-here->SOI3gds - here->SOI3gBJTsb_bd
                                      -xrev*(here->SOI3gmf+here->SOI3gmb+here->SOI3gmbs+
                                      here->SOI3gMmf+here->SOI3gMmb+here->SOI3gMmbs+here->SOI3gMd));
            *(here->SOI3SP_spPtr) += m * (here->SOI3sourceConductance+here->SOI3gds+
                    						  here->SOI3gbs+xnrm*(here->SOI3gmf+here->SOI3gmbs+
                    						  here->SOI3gmb)+xrev*here->SOI3gMd);
            *(here->SOI3SP_bPtr) += m * (-here->SOI3gbs + here->SOI3gBJTsb_bd
                                     -(xnrm-xrev)*here->SOI3gmbs+
                                      xrev*here->SOI3gMmbs);

            *(here->SOI3B_gfPtr) += m * (-here->SOI3gMmf);
            *(here->SOI3B_gbPtr) += m * (-here->SOI3gMmb);
            *(here->SOI3B_dpPtr) += m * (-(here->SOI3gbd) + here->SOI3gBJTsb_bd +
                                   xrev*(here->SOI3gMmf+here->SOI3gMmb+
                                         here->SOI3gMmbs+here->SOI3gMd) -
                                   xnrm*here->SOI3gMd);
            *(here->SOI3B_spPtr) += m * (-(here->SOI3gbs) + here->SOI3gBJTdb_bs +
                                   xnrm*(here->SOI3gMmf+here->SOI3gMmb+
                                         here->SOI3gMmbs+here->SOI3gMd) -
                                   xrev*here->SOI3gMd);
            *(here->SOI3B_bPtr) += m * (here->SOI3gbd+here->SOI3gbs -
                                   here->SOI3gMmbs
                                   - here->SOI3gBJTdb_bs - here->SOI3gBJTsb_bd);

/* if no thermal behaviour specified, then put in zero valued indpt. voltage source
   between TOUT and ground */
            if (here->SOI3rt==0)
            {
              *(here->SOI3TOUT_ibrPtr) += m * 1.0;
              *(here->SOI3IBR_toutPtr) += m * 1.0;
              *(ckt->CKTrhs + (here->SOI3branch)) = 0;
            }
            else
            {
            	*(here->SOI3TOUT_toutPtr) += m * (-(here->SOI3gPdT)+grt[0]);
            	if (here->SOI3numThermalNodes > 1)
              	{
                	*(here->SOI3TOUT_tout1Ptr) += m * (-grt[0]);
                	*(here->SOI3TOUT1_toutPtr) += m * (-grt[0]);
                	*(here->SOI3TOUT1_tout1Ptr) += m * (grt[0]+grt[1]);
              	}
              	if (here->SOI3numThermalNodes > 2)
              	{
                 	*(here->SOI3TOUT1_tout2Ptr) += m * (-grt[1]);
                	*(here->SOI3TOUT2_tout1Ptr) += m * (-grt[1]);
                	*(here->SOI3TOUT2_tout2Ptr) += m * (grt[1]+grt[2]);
              	}
      			if (here->SOI3numThermalNodes > 3)
              	{
                	*(here->SOI3TOUT2_tout3Ptr) += m * (-grt[2]);
                	*(here->SOI3TOUT3_tout2Ptr) += m * (-grt[2]);
                	*(here->SOI3TOUT3_tout3Ptr) += m * (grt[2]+grt[3]);
              	}
              	if (here->SOI3numThermalNodes > 4)
              	{
                 	*(here->SOI3TOUT3_tout4Ptr) += m * (-grt[3]);
                	*(here->SOI3TOUT4_tout3Ptr) += m * (-grt[3]);
                	*(here->SOI3TOUT4_tout4Ptr) += m * (grt[3]+grt[4]);
              	}

              *(here->SOI3TOUT_dpPtr) += m * (xnrm*(-(here->SOI3gPds*model->SOI3type))
                                        +xrev*(here->SOI3gPds+here->SOI3gPmf+
                                               here->SOI3gPmb+here->SOI3gPmbs)*
                                               model->SOI3type);
              *(here->SOI3TOUT_gfPtr) += m * (-(here->SOI3gPmf*model->SOI3type));
              *(here->SOI3TOUT_gbPtr) += m * (-(here->SOI3gPmb*model->SOI3type));
              *(here->SOI3TOUT_bPtr) += m * (-(here->SOI3gPmbs*model->SOI3type));
              *(here->SOI3TOUT_spPtr) += m * (xnrm*(here->SOI3gPds+here->SOI3gPmf+
                                          here->SOI3gPmb+here->SOI3gPmbs)*model->SOI3type
                                        +xrev*(-(here->SOI3gPds*model->SOI3type)));

              *(here->SOI3DP_toutPtr) += m * (xnrm-xrev)*here->SOI3gt*model->SOI3type;
              *(here->SOI3SP_toutPtr) += m * (xrev-xnrm)*here->SOI3gt*model->SOI3type;
/* need to mult by type in above as conductances will be used with exterior voltages
  which will be -ve for PMOS except for gPdT */
/* now for thermal influence on impact ionisation current and transient stuff */
              *(here->SOI3DP_toutPtr) += m * (xnrm*here->SOI3gMdeltaT -
                                          here->SOI3gbdT + here->SOI3gBJTdb_deltaT)*model->SOI3type;
              *(here->SOI3SP_toutPtr) += m * (xrev*here->SOI3gMdeltaT -
                                          here->SOI3gbsT + here->SOI3gBJTsb_deltaT)*model->SOI3type;
              *(here->SOI3B_toutPtr) -= m * (here->SOI3gMdeltaT - here->SOI3gbsT -
                                         here->SOI3gbdT + here->SOI3gBJTdb_deltaT +
                                         here->SOI3gBJTsb_deltaT)*model->SOI3type;
            }
        }
    }
    return(OK);
}