📄 soi3defs.h
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/**********STAG version 2.7Copyright 2000 owned by the United Kingdom Secretary of State for Defenceacting through the Defence Evaluation and Research Agency.Developed by : Jim Benson, Department of Electronics and Computer Science, University of Southampton, United Kingdom.With help from : Nele D'Halleweyn, Ketan Mistry, Bill Redman-White, and Craig Easson.Based on STAG version 2.1Developed by : Mike Lee,With help from : Bernard Tenbroek, Bill Redman-White, Mike Uren, Chris Edwards and John Bunyan.Acknowledgements : Rupert Howes and Pete Mole.**********//********** Modified by Paolo Nenzi 2002ngspice integration**********/#ifndef SOI3#define SOI3#include "ifsim.h"#include "cktdefs.h"#include "gendefs.h"#include "complex.h"#include "noisedef.h"/* declarations for SOI3 MOSFETs *//* information needed for each instance */typedef struct sSOI3instance { struct sSOI3model *sSOI3modPtr; /* backpointer to model */ struct sSOI3instance *SOI3nextInstance; /* pointer to next instance of *current model*/ IFuid SOI3name; /* pointer to character string naming this instance */ int SOI3owner; /* number of owner process */ int SOI3states; /* index into state table for this device */ int SOI3dNode; /* number of the drain node of the mosfet */ int SOI3gfNode; /* number of the front gate node of the mosfet */ int SOI3sNode; /* number of the source node of the mosfet */ int SOI3gbNode; /* number of the back gate node of the mosfet */ int SOI3bNode; /* number of the bulk node of the mosfet */ int SOI3toutNode; /* number of thermal output node (tout) */ int SOI3branch; /* branch number for zero voltage source if no thermal */ int SOI3dNodePrime; /* number of the internal drain node of the mosfet */ int SOI3sNodePrime; /* number of the internal source node of the mosfet */ int SOI3tout1Node; /* first internal thermal node */ int SOI3tout2Node; /* second internal thermal node */ int SOI3tout3Node; /* third internal thermal node */ int SOI3tout4Node; /* fourth internal thermal node */ double SOI3l; /* the length of the channel region */ double SOI3w; /* the width of the channel region */ double SOI3m; /* the parallel multiplier parameter */ double SOI3as; /* Area of source region */ double SOI3ad; /* Area of drain region */ double SOI3ab; /* Area of body region */ double SOI3drainSquares; /* the length of the drain in squares */ double SOI3sourceSquares; /* the length of the source in squares */ double SOI3sourceConductance; /*conductance of source(or 0):set in setup*/ double SOI3drainConductance; /*conductance of drain(or 0):set in setup*/ double SOI3temp; /* operating temperature of this instance */ double SOI3rt; /* Thermal resistance */ double SOI3ct; /* Thermal capacitance */ double SOI3rt1; /* 1st internal Thermal resistance */ double SOI3ct1; /* 1st internal Thermal capacitance */ double SOI3rt2; /* 2nd internal Thermal resistance */ double SOI3ct2; /* 2nd internal Thermal capacitance */ double SOI3rt3; /* 3rd internal Thermal resistance */ double SOI3ct3; /* 3rd internal Thermal capacitance */ double SOI3rt4; /* 4th internal Thermal resistance */ double SOI3ct4; /* 4th internal Thermal capacitance */ double SOI3tTransconductance; /* temperature corrected transconductance (KP param) */ double SOI3ueff; /* passed on to noise model */ double SOI3tSurfMob; /* temperature corrected surface mobility */ double SOI3tPhi; /* temperature corrected Phi */ double SOI3tVto; /* temperature corrected Vto */ double SOI3tVfbF; /* temperature corrected Vfb */ double SOI3tVfbB; /* temperature corrected Vfb (back gate) */ double SOI3tSatCur; /* temperature corrected jnct saturation Cur. */ double SOI3tSatCur1; /* temperature corrected jnct saturation Cur. */ double SOI3tSatCurDens; /* temperature corrected jnct saturation Cur. density */ double SOI3tSatCurDens1; /* temperature corrected jnct saturation Cur. density */ double SOI3tCbd; /* temperature corrected B-D Capacitance */ double SOI3tCbs; /* temperature corrected B-S Capacitance */ double SOI3tCjsw; /* temperature corrected Bulk side Capacitance */ double SOI3tBulkPot; /* temperature corrected Bulk potential */ double SOI3tDepCap; /* temperature adjusted transition point in */ /* the curve matching Fc * Vj */ double SOI3tVbi; /* temperature adjusted Vbi diode built-in voltage */ double SOI3icVBS; /* initial condition B-S voltage */ double SOI3icVDS; /* initial condition D-S voltage */ double SOI3icVGFS; /* initial condition GF-S voltage */ double SOI3icVGBS; /* initial condition GB-S voltage */ double SOI3von; double SOI3vdsat; double SOI3sourceVcrit; /* Vcrit for pos. vds */ double SOI3drainVcrit; /* Vcrit for pos. vds */ double SOI3id; /* DC drain current */ double SOI3ibs; /* bulk source current */ double SOI3ibd; /* bulk drain current */ double SOI3iMdb; /* drain bulk impact ionisation current */ double SOI3iMsb; /* source bulk impact ionisation cur. (rev mode) */ double SOI3iPt; /* heat 'current' in thermal circuit */ double SOI3gmbs; double SOI3gmf; double SOI3gmb; double SOI3gds; double SOI3gt; /* change of channel current wrt deltaT */ double SOI3gdsnotherm; /* gds0 at elevated temp - ac use only) */ double SOI3gMmbs; double SOI3gMmf; double SOI3gMmb; double SOI3gMd; double SOI3gMdeltaT; double SOI3iBJTdb; double SOI3gBJTdb_bs; double SOI3gBJTdb_deltaT; double SOI3iBJTsb; double SOI3gBJTsb_bd; double SOI3gBJTsb_deltaT; double SOI3gPmf; /* change of Pt wrt vgfs */ double SOI3gPmb; /* change of Pt wrt vgbs */ double SOI3gPmbs; /* change of Pt wrt vbs */ double SOI3gPds; /* change of Pt wrt vds */ double SOI3gPdT; /* change of Pt wrt deltaT */ double SOI3gbd; /* for body drain current */ double SOI3gbdT; /* for body drain current */ double SOI3gbs; /* for body source current */ double SOI3gbsT; /* for body source current */ double SOI3capbd; double SOI3capbs; double SOI3Cbd; double SOI3Cbs; double SOI3f2d; double SOI3f3d; double SOI3f4d; double SOI3f2s; double SOI3f3s; double SOI3f4s; double SOI3dDT_dVds; /* sm-sig gT term */ double SOI3dId_dDT; /* sm-sig source term *//*debug stuff*/ double SOI3debug1; double SOI3debug2; double SOI3debug3; double SOI3debug4; double SOI3debug5; double SOI3debug6;/* extra stuff for newer model - msll Jan96 *//* * naming convention: * x = vgs * y = vbs * z = vds * cdr = cdrain */ int SOI3mode; /* device mode : 1 = normal, -1 = inverse */ int SOI3backstate; /* indicates charge condition of back surface */ int SOI3numThermalNodes; /* Number of thermal nodes required */ unsigned SOI3off:1; /* non-zero to indicate device is off for dc analysis*/ unsigned SOI3tempGiven :1; /* instance temperature specified */ unsigned SOI3lGiven :1; unsigned SOI3wGiven :1; unsigned SOI3mGiven :1; unsigned SOI3asGiven:1; unsigned SOI3adGiven:1; unsigned SOI3abGiven:1; unsigned SOI3drainSquaresGiven :1; unsigned SOI3sourceSquaresGiven :1; unsigned SOI3dNodePrimeSet :1; unsigned SOI3sNodePrimeSet :1; unsigned SOI3icVBSGiven :1; unsigned SOI3icVDSGiven :1; unsigned SOI3icVGFSGiven:1; unsigned SOI3icVGBSGiven:1; unsigned SOI3rtGiven:1; unsigned SOI3ctGiven:1; unsigned SOI3rt1Given:1; unsigned SOI3ct1Given:1; unsigned SOI3rt2Given:1; unsigned SOI3ct2Given:1; unsigned SOI3rt3Given:1; unsigned SOI3ct3Given:1; unsigned SOI3rt4Given:1; unsigned SOI3ct4Given:1; unsigned SOI3vonGiven :1; unsigned SOI3vdsatGiven :1; unsigned SOI3modeGiven :1; double *SOI3D_dPtr; /* pointer to sparse matrix element at * (Drain node,drain node) */ double *SOI3D_dpPtr; /* pointer to sparse matrix element at * (drain node,drain prime node) */ double *SOI3DP_dPtr; /* pointer to sparse matrix element at * (drain prime node,drain node) */ double *SOI3S_sPtr; /* pointer to sparse matrix element at * (source node,source node) */ double *SOI3S_spPtr; /* pointer to sparse matrix element at * (source node,source prime node) */ double *SOI3SP_sPtr; /* pointer to sparse matrix element at * (source prime node,source node) */ double *SOI3GF_gfPtr; /* pointer to sparse matrix element at * (front gate node,front gate node) */ double *SOI3GF_gbPtr; /* pointer to sparse matrix element at * (front gate node,back gate node) */ double *SOI3GF_dpPtr; /* pointer to sparse matrix element at * (front gate node,drain prime node) */ double *SOI3GF_spPtr; /* pointer to sparse matrix element at * (front gate node,source prime node) */ double *SOI3GF_bPtr; /* pointer to sparse matrix element at * (front gate node,bulk node) */ double *SOI3GB_gfPtr; /* pointer to sparse matrix element at * (back gate node,front gate node) */ double *SOI3GB_gbPtr; /* pointer to sparse matrix element at * (back gate node,back gate node) */ double *SOI3GB_dpPtr; /* pointer to sparse matrix element at * (back gate node,drain prime node) */ double *SOI3GB_spPtr; /* pointer to sparse matrix element at * (back gate node,source prime node) */ double *SOI3GB_bPtr; /* pointer to sparse matrix element at * (back gate node,bulk node) */ double *SOI3DP_gfPtr; /* pointer to sparse matrix element at * (drain prime node,front gate node) */ double *SOI3DP_gbPtr; /* pointer to sparse matrix element at * (drain prime node,back gate node) */ double *SOI3DP_dpPtr; /* pointer to sparse matrix element at * (drain prime node,drain prime node) */ double *SOI3DP_spPtr; /* pointer to sparse matrix element at * (drain prime node,source prime node) */ double *SOI3DP_bPtr; /* pointer to sparse matrix element at * (drain prime node,bulk node) */ double *SOI3SP_gfPtr; /* pointer to sparse matrix element at * (source prime node,front gate node) */ double *SOI3SP_gbPtr; /* pointer to sparse matrix element at * (source prime node,back gate node) */ double *SOI3SP_dpPtr; /* pointer to sparse matrix element at * (source prime node,drain prime node) */ double *SOI3SP_spPtr; /* pointer to sparse matrix element at * (source prime node,source prime node) */ double *SOI3SP_bPtr; /* pointer to sparse matrix element at * (source prime node,bulk node) */ double *SOI3B_gfPtr; /* pointer to sparse matrix element at * (bulk node,front gate node) */ double *SOI3B_gbPtr; /* pointer to sparse matrix element at * (bulk node,back gate node) */ double *SOI3B_dpPtr; /* pointer to sparse matrix element at * (bulk node,drain prime node) */ double *SOI3B_spPtr; /* pointer to sparse matrix element at * (bulk node,source prime node) */ double *SOI3B_bPtr; /* pointer to sparse matrix element at * (bulk node,bulk node) *//** Now for Thermal Node **/ double *SOI3TOUT_toutPtr; double *SOI3TOUT_dpPtr;⌨️ 快捷键说明
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