b3v1temp.c

ngspice又一个电子CAD仿真软件代码.功能更全

/**********
 * Copyright 1990 Regents of the University of California. All rights reserved.
 * File: b3v1ld.c
 * Author: 1995 Min-Chie Jeng and Mansun Chan. 
 * Modified by Paolo Nenzi 2002
 **********/
 
/* 
 * Release Notes: 
 * BSIM3v3.1,   Released by yuhua  96/12/08
 */

/* Lmin, Lmax, Wmin, Wmax */

#include "ngspice.h"
#include "smpdefs.h"
#include "cktdefs.h"
#include "bsim3v1def.h"
#include "const.h"
#include "sperror.h"
#include "suffix.h"

#define Kb 1.3806226e-23
#define KboQ 8.617087e-5  /* Kb / q  where q = 1.60219e-19 */
#define EPSOX 3.453133e-11
#define EPSSI 1.03594e-10
#define PI 3.141592654
#define MAX_EXP 5.834617425e14
#define MIN_EXP 1.713908431e-15
#define EXP_THRESHOLD 34.0
#define Charge_q 1.60219e-19


/* ARGSUSED */
int
BSIM3v1temp(GENmodel *inModel, CKTcircuit *ckt)
{
BSIM3v1model *model = (BSIM3v1model*) inModel;
BSIM3v1instance *here;
struct bsim3v1SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam = NULL;
double tmp1, tmp2, Eg, Eg0, ni, T0, T1, T2, T3, Ldrn, Wdrn;
double Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom;
int Size_Not_Found;

    /*  loop through all the BSIM3v1 device models */
    for (; model != NULL; model = model->BSIM3v1nextModel)
    {    Temp = ckt->CKTtemp;
         if (model->BSIM3v1bulkJctPotential < 0.1)  
	     model->BSIM3v1bulkJctPotential = 0.1;
         if (model->BSIM3v1sidewallJctPotential < 0.1)
             model->BSIM3v1sidewallJctPotential = 0.1;
         if (model->BSIM3v1GatesidewallJctPotential < 0.1)
             model->BSIM3v1GatesidewallJctPotential = 0.1;
         model->pSizeDependParamKnot = NULL;
	 pLastKnot = NULL;

	 Tnom = model->BSIM3v1tnom;
	 TRatio = Temp / Tnom;

	 model->BSIM3v1vcrit = CONSTvt0 * log(CONSTvt0 / (CONSTroot2 * 1.0e-14));
         model->BSIM3v1factor1 = sqrt(EPSSI / EPSOX * model->BSIM3v1tox);

         Vtm0 = KboQ * Tnom;
         Eg0 = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0);
         ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15) 
            * exp(21.5565981 - Eg0 / (2.0 * Vtm0));

         model->BSIM3v1vtm = KboQ * Temp;
         Eg = 1.16 - 7.02e-4 * Temp * Temp / (Temp + 1108.0);
	 if (Temp != Tnom)
	 {   T0 = Eg0 / Vtm0 - Eg / model->BSIM3v1vtm + model->BSIM3v1jctTempExponent
		* log(Temp / Tnom);
	     T1 = exp(T0 / model->BSIM3v1jctEmissionCoeff);
	     model->BSIM3v1jctTempSatCurDensity = model->BSIM3v1jctSatCurDensity
					      * T1;
	     model->BSIM3v1jctSidewallTempSatCurDensity
			 = model->BSIM3v1jctSidewallSatCurDensity * T1;
	 }
	 else
	 {   model->BSIM3v1jctTempSatCurDensity = model->BSIM3v1jctSatCurDensity;
	     model->BSIM3v1jctSidewallTempSatCurDensity
			= model->BSIM3v1jctSidewallSatCurDensity;
	 }

	 if (model->BSIM3v1jctTempSatCurDensity < 0.0)
	     model->BSIM3v1jctTempSatCurDensity = 0.0;
	 if (model->BSIM3v1jctSidewallTempSatCurDensity < 0.0)
	     model->BSIM3v1jctSidewallTempSatCurDensity = 0.0;

         /* loop through all the instances of the model */
	 /* MCJ: Length and Width not initialized */
         for (here = model->BSIM3v1instances; here != NULL;
              here = here->BSIM3v1nextInstance) 
	 {    
	 
              if (here->BSIM3v1owner != ARCHme)
                      continue;

	      pSizeDependParamKnot = model->pSizeDependParamKnot;
	      Size_Not_Found = 1;
	      while ((pSizeDependParamKnot != NULL) && Size_Not_Found)
	      {   if ((here->BSIM3v1l == pSizeDependParamKnot->Length)
		      && (here->BSIM3v1w == pSizeDependParamKnot->Width))
                  {   Size_Not_Found = 0;
		      here->pParam = pSizeDependParamKnot;
		  }
		  else
		  {   pLastKnot = pSizeDependParamKnot;
		      pSizeDependParamKnot = pSizeDependParamKnot->pNext;
		  }
              }

	      if (Size_Not_Found)
	      {   pParam = (struct bsim3v1SizeDependParam *)tmalloc(
	                    sizeof(struct bsim3v1SizeDependParam));
                  if (pLastKnot == NULL)
		      model->pSizeDependParamKnot = pParam;
                  else
		      pLastKnot->pNext = pParam;
                  pParam->pNext = NULL;
                  here->pParam = pParam;

		  Ldrn = here->BSIM3v1l;
		  Wdrn = here->BSIM3v1w;
                  pParam->Length = Ldrn;
                  pParam->Width = Wdrn;
		  
                  T0 = pow(Ldrn, model->BSIM3v1Lln);
                  T1 = pow(Wdrn, model->BSIM3v1Lwn);
                  tmp1 = model->BSIM3v1Ll / T0 + model->BSIM3v1Lw / T1
                       + model->BSIM3v1Lwl / (T0 * T1);
                  pParam->BSIM3v1dl = model->BSIM3v1Lint + tmp1;
                  pParam->BSIM3v1dlc = model->BSIM3v1dlc + tmp1;

                  T2 = pow(Ldrn, model->BSIM3v1Wln);
                  T3 = pow(Wdrn, model->BSIM3v1Wwn);
                  tmp2 = model->BSIM3v1Wl / T2 + model->BSIM3v1Ww / T3
                       + model->BSIM3v1Wwl / (T2 * T3);
                  pParam->BSIM3v1dw = model->BSIM3v1Wint + tmp2;
                  pParam->BSIM3v1dwc = model->BSIM3v1dwc + tmp2;

                  pParam->BSIM3v1leff = here->BSIM3v1l - 2.0 * pParam->BSIM3v1dl;
                  if (pParam->BSIM3v1leff <= 0.0)
	          {   IFuid namarray[2];
                      namarray[0] = model->BSIM3v1modName;
                      namarray[1] = here->BSIM3v1name;
                      (*(SPfrontEnd->IFerror))(ERR_FATAL,
                      "BSIM3v1: mosfet %s, model %s: Effective channel length <= 0",
                       namarray);
                      return(E_BADPARM);
                  }

                  pParam->BSIM3v1weff = here->BSIM3v1w - 2.0 * pParam->BSIM3v1dw;
                  if (pParam->BSIM3v1weff <= 0.0)
	          {   IFuid namarray[2];
                      namarray[0] = model->BSIM3v1modName;
                      namarray[1] = here->BSIM3v1name;
                      (*(SPfrontEnd->IFerror))(ERR_FATAL,
                      "BSIM3v1: mosfet %s, model %s: Effective channel width <= 0",
                       namarray);
                      return(E_BADPARM);
                  }

                  pParam->BSIM3v1leffCV = here->BSIM3v1l - 2.0 * pParam->BSIM3v1dlc;
                  if (pParam->BSIM3v1leffCV <= 0.0)
	          {   IFuid namarray[2];
                      namarray[0] = model->BSIM3v1modName;
                      namarray[1] = here->BSIM3v1name;
                      (*(SPfrontEnd->IFerror))(ERR_FATAL,
                      "BSIM3v1: mosfet %s, model %s: Effective channel length for C-V <= 0",
                       namarray);
                      return(E_BADPARM);
                  }

                  pParam->BSIM3v1weffCV = here->BSIM3v1w - 2.0 * pParam->BSIM3v1dwc;
                  if (pParam->BSIM3v1weffCV <= 0.0)
	          {   IFuid namarray[2];
                      namarray[0] = model->BSIM3v1modName;
                      namarray[1] = here->BSIM3v1name;
                      (*(SPfrontEnd->IFerror))(ERR_FATAL,
                      "BSIM3v1: mosfet %s, model %s: Effective channel width for C-V <= 0",
                       namarray);
                      return(E_BADPARM);
                  }


		  if (model->BSIM3v1binUnit == 1)
		  {   Inv_L = 1.0e-6 / pParam->BSIM3v1leff;
		      Inv_W = 1.0e-6 / pParam->BSIM3v1weff;
		      Inv_LW = 1.0e-12 / (pParam->BSIM3v1leff
			     * pParam->BSIM3v1weff);
		  }
		  else
		  {   Inv_L = 1.0 / pParam->BSIM3v1leff;
		      Inv_W = 1.0 / pParam->BSIM3v1weff;
		      Inv_LW = 1.0 / (pParam->BSIM3v1leff
			     * pParam->BSIM3v1weff);
		  }
		  pParam->BSIM3v1cdsc = model->BSIM3v1cdsc
				    + model->BSIM3v1lcdsc * Inv_L
				    + model->BSIM3v1wcdsc * Inv_W
				    + model->BSIM3v1pcdsc * Inv_LW;
		  pParam->BSIM3v1cdscb = model->BSIM3v1cdscb
				     + model->BSIM3v1lcdscb * Inv_L
				     + model->BSIM3v1wcdscb * Inv_W
				     + model->BSIM3v1pcdscb * Inv_LW; 
				     
    		  pParam->BSIM3v1cdscd = model->BSIM3v1cdscd
				     + model->BSIM3v1lcdscd * Inv_L
				     + model->BSIM3v1wcdscd * Inv_W
				     + model->BSIM3v1pcdscd * Inv_LW; 
				     
		  pParam->BSIM3v1cit = model->BSIM3v1cit
				   + model->BSIM3v1lcit * Inv_L
				   + model->BSIM3v1wcit * Inv_W
				   + model->BSIM3v1pcit * Inv_LW;
		  pParam->BSIM3v1nfactor = model->BSIM3v1nfactor
				       + model->BSIM3v1lnfactor * Inv_L
				       + model->BSIM3v1wnfactor * Inv_W
				       + model->BSIM3v1pnfactor * Inv_LW;
		  pParam->BSIM3v1xj = model->BSIM3v1xj
				  + model->BSIM3v1lxj * Inv_L
				  + model->BSIM3v1wxj * Inv_W
				  + model->BSIM3v1pxj * Inv_LW;
		  pParam->BSIM3v1vsat = model->BSIM3v1vsat
				    + model->BSIM3v1lvsat * Inv_L
				    + model->BSIM3v1wvsat * Inv_W
				    + model->BSIM3v1pvsat * Inv_LW;
		  pParam->BSIM3v1at = model->BSIM3v1at
				  + model->BSIM3v1lat * Inv_L
				  + model->BSIM3v1wat * Inv_W
				  + model->BSIM3v1pat * Inv_LW;
		  pParam->BSIM3v1a0 = model->BSIM3v1a0
				  + model->BSIM3v1la0 * Inv_L
				  + model->BSIM3v1wa0 * Inv_W
				  + model->BSIM3v1pa0 * Inv_LW; 
				  
		  pParam->BSIM3v1ags = model->BSIM3v1ags
				  + model->BSIM3v1lags * Inv_L
				  + model->BSIM3v1wags * Inv_W
				  + model->BSIM3v1pags * Inv_LW;
				  
		  pParam->BSIM3v1a1 = model->BSIM3v1a1
				  + model->BSIM3v1la1 * Inv_L
				  + model->BSIM3v1wa1 * Inv_W
				  + model->BSIM3v1pa1 * Inv_LW;
		  pParam->BSIM3v1a2 = model->BSIM3v1a2
				  + model->BSIM3v1la2 * Inv_L
				  + model->BSIM3v1wa2 * Inv_W
				  + model->BSIM3v1pa2 * Inv_LW;
		  pParam->BSIM3v1keta = model->BSIM3v1keta
				    + model->BSIM3v1lketa * Inv_L
				    + model->BSIM3v1wketa * Inv_W
				    + model->BSIM3v1pketa * Inv_LW;
		  pParam->BSIM3v1nsub = model->BSIM3v1nsub
				    + model->BSIM3v1lnsub * Inv_L
				    + model->BSIM3v1wnsub * Inv_W
				    + model->BSIM3v1pnsub * Inv_LW;
		  pParam->BSIM3v1npeak = model->BSIM3v1npeak
				     + model->BSIM3v1lnpeak * Inv_L
				     + model->BSIM3v1wnpeak * Inv_W
				     + model->BSIM3v1pnpeak * Inv_LW;
		  pParam->BSIM3v1ngate = model->BSIM3v1ngate
				     + model->BSIM3v1lngate * Inv_L
				     + model->BSIM3v1wngate * Inv_W
				     + model->BSIM3v1pngate * Inv_LW;
		  pParam->BSIM3v1gamma1 = model->BSIM3v1gamma1
				      + model->BSIM3v1lgamma1 * Inv_L
				      + model->BSIM3v1wgamma1 * Inv_W
				      + model->BSIM3v1pgamma1 * Inv_LW;
		  pParam->BSIM3v1gamma2 = model->BSIM3v1gamma2
				      + model->BSIM3v1lgamma2 * Inv_L
				      + model->BSIM3v1wgamma2 * Inv_W
				      + model->BSIM3v1pgamma2 * Inv_LW;
		  pParam->BSIM3v1vbx = model->BSIM3v1vbx
				   + model->BSIM3v1lvbx * Inv_L
				   + model->BSIM3v1wvbx * Inv_W
				   + model->BSIM3v1pvbx * Inv_LW;
		  pParam->BSIM3v1vbm = model->BSIM3v1vbm
				   + model->BSIM3v1lvbm * Inv_L
				   + model->BSIM3v1wvbm * Inv_W
				   + model->BSIM3v1pvbm * Inv_LW;
		  pParam->BSIM3v1xt = model->BSIM3v1xt
				   + model->BSIM3v1lxt * Inv_L
				   + model->BSIM3v1wxt * Inv_W
				   + model->BSIM3v1pxt * Inv_LW;
		  pParam->BSIM3v1k1 = model->BSIM3v1k1
				  + model->BSIM3v1lk1 * Inv_L
				  + model->BSIM3v1wk1 * Inv_W
				  + model->BSIM3v1pk1 * Inv_LW;
		  pParam->BSIM3v1kt1 = model->BSIM3v1kt1
				   + model->BSIM3v1lkt1 * Inv_L
				   + model->BSIM3v1wkt1 * Inv_W
				   + model->BSIM3v1pkt1 * Inv_LW;
		  pParam->BSIM3v1kt1l = model->BSIM3v1kt1l
				    + model->BSIM3v1lkt1l * Inv_L
				    + model->BSIM3v1wkt1l * Inv_W
				    + model->BSIM3v1pkt1l * Inv_LW;
		  pParam->BSIM3v1k2 = model->BSIM3v1k2
				  + model->BSIM3v1lk2 * Inv_L
				  + model->BSIM3v1wk2 * Inv_W
				  + model->BSIM3v1pk2 * Inv_LW;
		  pParam->BSIM3v1kt2 = model->BSIM3v1kt2
				   + model->BSIM3v1lkt2 * Inv_L
				   + model->BSIM3v1wkt2 * Inv_W
				   + model->BSIM3v1pkt2 * Inv_LW;
		  pParam->BSIM3v1k3 = model->BSIM3v1k3
				  + model->BSIM3v1lk3 * Inv_L
				  + model->BSIM3v1wk3 * Inv_W
				  + model->BSIM3v1pk3 * Inv_LW;
		  pParam->BSIM3v1k3b = model->BSIM3v1k3b
				   + model->BSIM3v1lk3b * Inv_L
				   + model->BSIM3v1wk3b * Inv_W
				   + model->BSIM3v1pk3b * Inv_LW;
		  pParam->BSIM3v1w0 = model->BSIM3v1w0
				  + model->BSIM3v1lw0 * Inv_L
				  + model->BSIM3v1ww0 * Inv_W
				  + model->BSIM3v1pw0 * Inv_LW;
		  pParam->BSIM3v1nlx = model->BSIM3v1nlx
				   + model->BSIM3v1lnlx * Inv_L
				   + model->BSIM3v1wnlx * Inv_W
				   + model->BSIM3v1pnlx * Inv_LW;
		  pParam->BSIM3v1dvt0 = model->BSIM3v1dvt0
				    + model->BSIM3v1ldvt0 * Inv_L
				    + model->BSIM3v1wdvt0 * Inv_W
				    + model->BSIM3v1pdvt0 * Inv_LW;
		  pParam->BSIM3v1dvt1 = model->BSIM3v1dvt1
				    + model->BSIM3v1ldvt1 * Inv_L
				    + model->BSIM3v1wdvt1 * Inv_W
				    + model->BSIM3v1pdvt1 * Inv_LW;
		  pParam->BSIM3v1dvt2 = model->BSIM3v1dvt2
				    + model->BSIM3v1ldvt2 * Inv_L
				    + model->BSIM3v1wdvt2 * Inv_W
				    + model->BSIM3v1pdvt2 * Inv_LW;
		  pParam->BSIM3v1dvt0w = model->BSIM3v1dvt0w
				    + model->BSIM3v1ldvt0w * Inv_L
				    + model->BSIM3v1wdvt0w * Inv_W
				    + model->BSIM3v1pdvt0w * Inv_LW;
		  pParam->BSIM3v1dvt1w = model->BSIM3v1dvt1w