uart.cpp

浙江大学的悟空嵌入式系统模拟器

/*
*  Copyright (c) 2005 Zhejiang University, P.R.China
*
*  This program is free software; you can redistribute it and/or modify
*  it under the terms of the GNU General Public License as published by
*  the Free Software Foundation; either version 2 of the License, or
*  (at your option) any later version.
*
*  This program is distributed in the hope that it will be useful,
*  but WITHOUT ANY WARRANTY; without even the implied warranty of
*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
*  GNU General Public License for more details.
*
*  You should have received a copy of the GNU General Public License
*  along with this program; if not, write to the Free Software
*  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/ 

//=============================================================================
/**
*  \file   UART.cpp
*
*  $Id: UART.cpp,v 1.2 2005/06/21 02:56:17 qilj Exp $
*
*  \author  zhao jun <[e-mail]>
*/
//=============================================================================

#include "./UART.h"
#include "Core/System.h"
#include "Core/Memory.h"
#include "Core/Processor.h"
#include "Core/Log.h"

#include<io.h>

namespace DEVICE {

	void UART::on_mapped_memory_read(Core::u32 start, size_t size,        \
		Core::Bytecode_Type & buffer)
	{
		//if(start>=0xFFFD0000 && start<=0xFFFD3FFF) //UART0
		Core::u32 data = 0;
		switch ( (start & 0xfff) >> 2 ) 
		{
		case 0xd: // RCR (receive buffer size)
			data = rcr; //Uart::rcr;
			break;
		case 0xf: // TCR (send buffer size) if 0 stop send
			data = 0;
			break;
			/*  if rcr =0 and csr's lowest bit = 0;CSR＝0B1000000010；
			if rcr = 0, csr's third bit and zero bit are 1, indicating receiving input-char,
			it is that csr = 0B1000001011.
			The ninth and secend bit are 1, indicating uart can send(TXRDY),
			they are always 1.
			*/
		case 0x5: // CSR
			data = (1<<9) | (1<<1) | (rcr ? ((1 << 3) | (1 << 0)) : 0);
			break;
		case 0x0: // CR
		case 0x1: // MR
		case 0x2: // IER (Interrupt Enable Register)
		case 0x3: // IDR
		case 0x4: // IMR
		case 0x6: // RHR
		case 0x7: // THR (Tramitter Holding Register)
		case 0x8: // BRGR
		case 0x9: // RTOR
		case 0xa: // TTGR
		case 0xb: // RES1
		case 0xc: // RPR
		case 0xe: // TPR
			break;
		}
		Core::Wukong_Get_System().convert_to_bytecode(data, buffer);
	}

	void UART::on_mapped_memory_write(Core::u32 start, size_t size,               \
		Core::Bytecode_Type & buffer)
	{
		static Core::u32 tx_buf = 0;
		Core::u32 data = 0;
		Core::Wukong_Get_System().convert_from_bytecode(buffer, data);
		//std::vector<Core::u8> buffer;
		switch ( (start & 0xfff) >> 2 ) 
		{
		case 0x0: // CR
		case 0x3: // IDR
		case 0x9: // RTOR
		case 0x2: // IER
			break;
		case 0x1: // MR
		case 0x4: // IMR
		case 0x5: // CSR
		case 0x6: // RHR
			break;

		case 0x7: // THR
			{
				char c = (char)data;

				WUKONG_STDOUT<<c;
				WUKONG_STDOUT.flush();

			}
			break;

		case 0x8: // BRGR
		case 0xa: // TTGR
		case 0xb: // RES1
			break;

		case 0xd: // RCR
			rcr = data;
			break;

		case 0xc: // RPR
			rpr = data; //address
			break;
		case 0xe: // TPR
			tx_buf = data;   //this is not effect
			break;
		case 0xf: // TCR
			for (; tx_buf && data > 0; data--)
			{
				//when run os, this code is not effacted
				//	Memory_Space<u32, u8> & mem = dynamic_cast<Memory_Space<u32, u8> &>(get_host_machine()->query_memory<u32, u8>(tx_buf));
				//	mem.access(Memory_Space_Base::MEMORY_READ,tx_buf, 1, buffer);
				//	char c = buffer[0];
				// printf("%c", c);
				Core::MMU<Core::u32> & mmu = ((Core::CPU_32Bit *)Core::Wukong_Get_System().get_cpu())->get_mmu();
				mmu.access(Core::Memory_32Bit::MEMORY_READ, tx_buf, 1, buffer);
				char c = buffer[0];

				WUKONG_STDOUT<<c;
				WUKONG_STDOUT.flush();

				tx_buf++;
			}
			tx_buf = 0;
			break;
		default:
			//write memory
			Core::MMU<Core::u32> & mmu = ((Core::CPU_32Bit *)Core::Wukong_Get_System().get_cpu())->get_mmu();
			mmu.access(Core::Memory_32Bit::MEMORY_WRITE, start, 4, buffer);
			break;
		}
	}

} //namespace