board_ep7312.h

浙江大学的悟空嵌入式系统模拟器

/*
*  Copyright (c) 2005 Zhejiang University, P.R.China
*
*  This program is free software; you can redistribute it and/or modify
*  it under the terms of the GNU General Public License as published by
*  the Free Software Foundation; either version 2 of the License, or
*  (at your option) any later version.
*
*  This program is distributed in the hope that it will be useful,
*  but WITHOUT ANY WARRANTY; without even the implied warranty of
*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
*  GNU General Public License for more details.
*
*  You should have received a copy of the GNU General Public License
*  along with this program; if not, write to the Free Software
*  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/ 

//=============================================================================
/**
*  \file    Arch/ARM/Board_EP7312.h
*
*  $Id: Board_EP7312.h,v 1.5 2005/06/21 02:51:46 qilj Exp $
*
*  \author  Lingjie Qi <[e-mail]> 
                    zhao jun <[e-mail]>
*/
//=============================================================================

#include "Core/Board.h"

#ifdef WIN32
#include <conio.h>
#endif

class Core::Device;

#define EP7312_IO_BASEADDRESS 0x0
#define VBUFSIZ	0x00001fff  // Video buffer size (bits/128-1) 
#define LINELEN	0x0007e000  //Line length (pix/16-1) 
#define LINELEN_SHIFT	13
#define GSEN	0x40000000  // Grayscale enable (0: monochrome) 
#define	GSMD 	0x80000000  // Grayscale mode (0: 2 bit, 1: 4 bit) 



namespace ARM {

	class CPU_720T;

	class Board_EP7312 : public Core::Board<Core::u32>
	{
	public:

		//! extern signals, for example fiq, irq, etc.
		typedef enum{
			FIQ_sig = 0,
			IRQ_sig = 1,
			UXINT_sig = 2,
			Signal_End
		}Extern_Signal;

		//! System Register
		typedef enum{
			SYSCON1 , SYSCON2, SYSCON3,
			SYSFLG1 , SYSFLG2,
			STFCLR, UNIQID,
			RANDID0, RANDID1, RANDID2, RANDID3, 
			SYS_REG_END
		} SYS_Reg;

		//! LCD Register
		typedef enum{
			LCDCON , PALLSW, PALMSW,
			FBADDR , LCD_REG_END
		} LCD_Reg;

		//! Interrupt Register
		typedef enum{
			INTSR1,  INTSR2,  INTSR3,
			INTMR1,  INTMR2, INTMR3,
			BLEOI, MCEOI, TEOI,
			TC1EOI, TC2EOI, RTCEOI, UMSEOI,
			COEOI, KBDEOI, SRXEOF,
			INT_REG_END
		}INT_Reg;

		//! Interruption type
		typedef enum{
			CLOCK_INT = 0,
			Inter_Undefined
		}Inter_Type;

		//! it answers for all address of io
		virtual Core::Memory_Result io_dispatch(Core::Memory_Access_Type type, Core::u32 start,   \
			size_t size, Core::Bytecode_Type & buffer);

		//! Invoked in every CPU cycle
		virtual void io_do_cycle(void);

		//! Prepare the ROM when startup
		virtual bool prepare_rom(void);

		//! return the current highest interruption 
		virtual Core::Interrupt_Type get_highest_interrupt(void);//{return 0;}

		//! call the interruption-function refer to parameter-"type"
		virtual void on_interrupt(Core::Interrupt_Type type);

		//! process IRQ or FIQ exception
		void poll_extern_exception();

		//! This method will be called when module is created
		virtual void on_create(void);

		//! This method will be called when module is destroyed
		virtual void on_destroy(void);

		//! This method will be called when module is created
		virtual void on_reset(void);

		//! load os kernel into memory, the address is already included in the kernel file
		//bool load_kernel(std::string name);

		//! load os filesystem into memory
		bool load_fs(std::string name, Core::u32 addr);

		//! set value to the which signal 
		void set_signal(Extern_Signal which, bool val);

		//! test the which signal, return ture or false
		bool test_signal(Extern_Signal which);

		//! get interrupt register
		Core::u32 & get_int_reg(INT_Reg whick);

		//! clear the interrupt register's value into 0
		void clear(INT_Reg whick);

		//! get system register
		Core::u32 & get_int_reg(SYS_Reg whick);

		//! load all device into board
		//void load_device();
		//! io read, the unit is word
		Core::Memory_Result io_read_word(Core::u32 start, size_t size, Core::Bytecode_Type & buffer);

		//! io write, the unit is word
		Core::Memory_Result io_write_word(Core::u32 start, size_t size, Core::Bytecode_Type & buffer);

		//! clear clock into zero
		void clear_clock();

		//! descend clock 1 per instruction cycle
		void descend_clock();
	
		//! reset clock
		void reset_clock();

		//! test clock if zero
		bool test_clock();

		//! get clock
		Core::u32  get_clock();

		//! descend io_prescale 1 per io cycle
		void descend_io_prescale();

		//! reset io_prescale
		void reset_io_prescale();

		//! test io_prescale if zero
		bool test_io_prescale();

		//! set external interrupt signal
		void set_external_interrupt();

		//! update lcd
		void update_lcd();

#ifdef LINUX
		//! check there is keyborad pressed
		Core::s32 kb_input();
		#define is_kb_input() kb_input()
#endif 

#ifdef WIN32
		Core::s32 kb_read(Core::s32 fd,char *buffer, Core::s32 count);
		bool is_kb_input()
		{
			return Core::Wukong_Get_System().get_key_event_count() != 0;
		} 
#endif

	private:
		bool signal_[Signal_End];
		Core::u32 int_reg_[INT_REG_END];
		Core::u32 sys_reg_[SYS_REG_END];
		Core::u32 lcd_reg_[LCD_REG_END];
		Core::u32 clock;
		Core::u32 tcd[2],tcd_reload[2];
		Core::u32 tc_prescale;
		Core::u32 io_prescale_;
		//boad's devices
		Core::Device<Core::u32> * uart_;
		CPU_720T *cpu_;
		Core::MMU<Core::u32> *mmu_;
		bool is_kb_input_;
		Core::Device<Core::u32>   *lcd_;
	};

#include "Board_EP7312_i.h"
} //namespace