board_pxa_lubbock.h

浙江大学的悟空嵌入式系统模拟器

/*
*  Copyright (c) 2005 Zhejiang University, P.R.China
*
*  This program is free software; you can redistribute it and/or modify
*  it under the terms of the GNU General Public License as published by
*  the Free Software Foundation; either version 2 of the License, or
*  (at your option) any later version.
*
*  This program is distributed in the hope that it will be useful,
*  but WITHOUT ANY WARRANTY; without even the implied warranty of
*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
*  GNU General Public License for more details.
*
*  You should have received a copy of the GNU General Public License
*  along with this program; if not, write to the Free Software
*  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/ 

//=============================================================================
/**
*  \file    Arch/ARM/Board_PXA_Lubbock.h
*
*  $Id: Board_PXA_Lubbock.h,v 1.2 2005/06/16 11:26:03 qilj Exp $
*
*  \author  Lingjie Qi <[e-mail]> 
*/
//=============================================================================

#include "Core/Board.h"


#ifdef WIN32
#include <conio.h>
#endif

class Core::Device;


#define PXA_Lubbock_IO_BASEADDRESS 0x0
#define F_CORE (100 * 1024 * 1024) //core frequence
#define F_RTC 32768					//RTC
#define F_OS	3686400				//OS timer
#define RT_SCALE (F_CORE / F_RTC)
#define OS_SCALE (F_CORE / F_OS / 10)
#define FF_SCALE	200		//FF UART



namespace ARM {

	class CPU_XScale;

	class Board_PXA_Lubbock : public Core::Board<Core::u32>
	{
	public:

		//! extern signals, for example fiq, irq, etc.
		typedef enum{
			FIQ_sig = 0,
			IRQ_sig = 1,
			Signal_End
		}Extern_Signal;

		//! RTC Register
		typedef enum{
			RCNR, RTAR,
			RTSR, RTTR,
			RTC_REG_END
		} RTC_Reg;

		//! OS Timer Register
		typedef enum{
			OSMR0, OSMR1, OSMR2, OSMR3, 
			OSCR,  OSSR,  OWER, OIER, 
			OSTimer_REG_END
		} OSTimer_Reg;

		//! Interrupt Controller  Register
		typedef enum{
			ICIP , ICMR , ICLR ,
			ICFP, ICPR, ICCR,
			IC_REG_END
		} IC_Reg;

		//! Bluetooth UART Register
		typedef enum{
			BTRBR, BTTHR, BTIER, BTIIR,
			BTFCR,BTLCR,BTMCR,BTLSR,
			BTMSR,BTSPR,BTISR,BTDLL, BTDLH,
			BTUART_Reg_END
		}BTUART_Reg;

		//! Standard UART Register
		typedef enum{
			STRBR, STTHR, STIER, STIIR, 
			STFCR, STLCR, STMCR, STLSR, 
			STMSR, STSPR, STISR, STDLL, STDLH,
			STUART_Reg_END
		}STUART_Reg;

		//! Clocks Manager Register
		typedef enum{
			CCCR, CKEN, OSCC,
			CM_REG_END
		}cm_reg_;

		//! Interruption type
		typedef enum{
			RT_CLOCK_INT = 0,
			OS_CLOCK_INT = 1,
			UXINT_INT = 2,
			Inter_Undefined
		}Inter_Type;

		typedef enum{
			RTC_ALARM_IRQ = (1 << 31),
			RTC_HZ_IRQ = (1 << 30),
			OS_IRQ_SHF =  26,
			FFUART_IRQ = (1 << 22)
		};

		//! it answers for all address of io
		virtual Core::Memory_Result io_dispatch(Core::Memory_Access_Type type, Core::u32 start,   \
			size_t size, Core::Bytecode_Type & buffer);

		//! Invoked in every CPU cycle
		virtual void io_do_cycle(void);

		//! Prepare the ROM when startup
		virtual bool prepare_rom(void);

		//! return the current highest interruption 
		virtual Core::Interrupt_Type get_highest_interrupt(void);//{return 0;}

		//! call the interruption-function refer to parameter-"type"
		virtual void on_interrupt(Core::Interrupt_Type type);

		//! process IRQ or FIQ exception
		void poll_extern_exception();

		//! This method will be called when module is created
		virtual void on_create(void);

		//! This method will be called when module is destroyed
		virtual void on_destroy(void);

		//! This method will be called when module is created
		virtual void on_reset(void);

		//! load os kernel into memory, the address is already included in the kernel file
		//bool load_kernel(std::string name);

		//! load os filesystem into memory
		bool load_fs(std::string name, Core::u32 addr);

		//! set value to the which signal 
		void set_signal(Extern_Signal which, bool val);

		//! test the which signal, return ture or false
		bool test_signal(Extern_Signal which);

		//! load all device into board
		//void load_device();

		//! io read, the unit is word
		Core::Memory_Result io_read_word(Core::u32 start, size_t size, Core::Bytecode_Type & buffer);

		//! io write, the unit is word
		Core::Memory_Result io_write_word(Core::u32 start, size_t size, Core::Bytecode_Type & buffer);

		//! clear clock into zero
		void clear_clock();

		//! descend rt_clock 1 per instruction cycle
		void descend_rt_clock();

		//! descend os_clock 1 per instruction cycle
		void descend_os_clock();

		//! reset clock
		void reset_rt_clock();

		void reset_os_clock();

		//! test clock if zero
		bool test_clock();

		//! get clock
		Core::u32  get_clock();

		//! descend io_prescale 1 per io cycle
		void descend_io_prescale();

		//! reset io_prescale
		void reset_io_prescale();

		//! test io_prescale if zero
		bool test_io_prescale();

		//! set external interrupt signal
		void set_external_interrupt();

		//! update lcd
		void update_lcd();

		//! get ICPR
		Core::u32 & get_ICPR();

		//! get ICIR
		Core::u32 & get_ICIP();

#ifdef LINUX
		//! check there is keyborad pressed
		Core::s32 kb_input();
#define is_kb_input() kb_input()
#endif 

#ifdef WIN32
		Core::s32 kb_read(Core::s32 fd,char *buffer, Core::s32 count);
		bool is_kb_input()
		{
			return Core::Wukong_Get_System().get_key_event_count() != 0;
		} 
#endif

	private:
		bool signal_[Signal_End];
		Core::u32 rtc_reg_[RTC_REG_END];
		Core::u32 ostimer_reg_[OSTimer_REG_END];
		Core::u32 ic_reg_[IC_REG_END];
		Core::u32 cm_reg_[CM_REG_END];
		Core::u32 rt_scale;
		Core::u32 rt_count;
		Core::u32 os_scale;
		Core::u32 io_prescale_;
		//boad's devices
		Core::Device<Core::u32> * uart_;
		CPU_XScale *cpu_;
		Core::MMU<Core::u32> *mmu_;
		bool is_kb_input_;
	};

#include "Board_PXA_Lubbock_i.h"
} //namespace