data_process_instruction.h

浙江大学的悟空嵌入式系统模拟器

/*
*  Copyright (c) 2005 Zhejiang University, P.R.China
*
*  This program is free software; you can redistribute it and/or modify
*  it under the terms of the GNU General Public License as published by
*  the Free Software Foundation; either version 2 of the License, or
*  (at your option) any later version.
*
*  This program is distributed in the hope that it will be useful,
*  but WITHOUT ANY WARRANTY; without even the implied warranty of
*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
*  GNU General Public License for more details.
*
*  You should have received a copy of the GNU General Public License
*  along with this program; if not, write to the Free Software
*  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/ 

//=============================================================================
/**
*  \file    ARM/Data_Process__Instruction.h
*
*  $Id: Data_Process_Instruction.h,v 1.4 2005/06/16 05:49:36 chenj Exp $
*
*  \author  Jie Chen <[e-mail]> 
*/
//=============================================================================
#ifndef ARM__DATA_PROCESS_INSTRUCTION_H_INCLUDED
#define ARM__DATA_PROCESS_INSTRUCTION_H_INCLUDED

#include "Instruction.h"

namespace ARM { 

	//!the class simulates the data process instructions
	class Data_Process_Instruction: public ARM::Instruction
	{
	protected:
		virtual void execute(Core::Instruction_Unit  binary);

		//!execution of MOV
		void MOV(Core::Instruction_Unit & binary);  

		//!execution of MVN
		void MVN(Core::Instruction_Unit & binary);

		//!execution of CMP
		void CMP(Core::Instruction_Unit & binary);

		//!execution of CMN
		void CMN(Core::Instruction_Unit & binary);

		//!execution of TST
		void TST(Core::Instruction_Unit & binary);

		//!execution of TEQ
		void TEQ(Core::Instruction_Unit & binary);

		//!execution of ADD
		void ADD(Core::Instruction_Unit & binary);

		//!execution of SUB
		void SUB(Core::Instruction_Unit & binary);

		//!execution of RSB
		void RSB(Core::Instruction_Unit & binary);

		//!execution of ADC
		void ADC(Core::Instruction_Unit & binary);

		//!execution of SBC
		void SBC(Core::Instruction_Unit & binary);

		//!execution of RSC
		void RSC(Core::Instruction_Unit & binary);

		//!execution of AND
		void AND(Core::Instruction_Unit & binary);

		//!execution of BIC
		void BIC(Core::Instruction_Unit & binary); 

		//!execution of EOR
		void EOR(Core::Instruction_Unit & binary);

		//!execution of ORR
		void ORR(Core::Instruction_Unit & binary);

		//!execution of SWP
		void SWP(Core::Instruction_Unit & binary);

		//!execution of SWPB
		void SWPB(Core::Instruction_Unit & binary);

		//!execution of MUL
		void MUL(Core::Instruction_Unit & binary);

		//!execution of MLA
		void MLA(Core::Instruction_Unit & binary);

		//!execution of SMULL
		void SMULL(Core::Instruction_Unit & binary);

		//!execution of SMLAL
		void SMLAL(Core::Instruction_Unit & binary);

		//!execution of UMULL
		void UMULL(Core::Instruction_Unit & binary);

		//!execution of UMLAL
		void UMLAL(Core::Instruction_Unit & binary);

		//!execution of CLZ
		void CLZ(Core::Instruction_Unit & binary);

		//!execution of SMULxy
		void SMULxy(Core::Instruction_Unit & binary);

		//! Multiplication instructions use sign-extend
		s64 signed_immed_64( u32 & val);

		DECLARE_SINGLETON(Data_Process_Instruction)
	};
}



#endif