examples.vhd

来自「The GRLIB IP Library is an integrated se」· VHDL 代码 · 共 18 行

library ieee;
use ieee.std_logic_1164.all;
library amba;
use amba.types.all;

package examples is
  component ahb_example
    generic (
      ahbndx  :     integer := 0;
      memaddr :     integer := 0;
      memmask :     integer := 16#fff#);
    port (
      rst     : in  std_ulogic;
      clk     : in  std_ulogic;
      ahbsi   : in  ahb_slv_in_type;
      ahbso   : out ahb_slv_out_type);
  end component;
end;