📄 conv_coder_onethird.asm
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/*******************************************************************************
Copyright(c) 2000 - 2002 Analog Devices. All Rights Reserved.
Developed by Joint Development Software Application Team, IPDC, Bangalore, India
for Blackfin DSPs ( Micro Signal Architecture 1.0 specification).
By using this module you agree to the terms of the Analog Devices License
Agreement for DSP Software.
********************************************************************************
Module name : conv_coder_onethird.asm
Label name : __conv_coder_onethird
Version : 1.3
Change History :
Version Date Author Comments
1.3 11/18/2002 Swarnalatha Tested with VDSP++ 3.0
compiler 6.2.2 on
ADSP-21535 Rev.0.2
1.2 11/13/2002 Swarnalatha Tested with VDSP++ 3.0
on ADSP-21535 Rev. 0.2
1.1 01/22/2002 Swarnalatha Modified to match
silicon cycle count
1.0 02/14/2001 Swarnalatha Original
Description : This function performs convolution coding. The function
produces the coded output for a given input message data.
The result is stored in the output buffer. The parameters
passed should be in the order Cmn,d,m,o,a.
Cmn = Start address of the coefficients of the generator
polynomials
d = the message data which has to be encoded
m = length of the encoder (Number of stages in the shift
register)
o = Start address of the output of the encoder
a = number of bits in the message data.
Assumptions : Number of bits in the message data should be a multiple of 16
bits.
Implementation : The coded bits for each message bit are generated by
c1 = D1 EXOR D2 EXOR D3..........
Where D1,D2 and D3 are the states of the shift register.
The combination of D1,D2....is determined by the coefficients
of the generator polynomial. Similarly c2,c3 are generated
using given coefficients of the other generator polynomials.
So for each message bit 3 coded bits are generated.
Prototype :
void _conv_coder_onethird(
fract16 *, //Pointer to generator polynomials 'cmn[]'
fract16 * , //Start address of the message data 'd'
int , // Length Of the encoder 'm'
char *, //Pointer To The output 'o'
int //Number of bits in the message data 'a'
);
Registers used : A0, A1, R0-R3, I0, I1, B0, L0, L1, P0-P2, LC0, LC1.
Performance :
Code size : 136 Bytes
If number of message bits = a
Kernel cycle count : ((16*9)+5)a/16
Total Cycle Count : 168 cycles (for a = 16)
Total Cycle Count : 317 cycles (for a = 32)
*******************************************************************************/
.section L1_code;
.global __conv_coder_onethird;
.align 8;
__conv_coder_onethird:
L1 = 0;
I1 = R1; //Start address of the message data
I0 = R0; //Start address of the coefficients of the generator
//polynomials
A1 = A0 = 0 || R3 = [SP+16];
//Number of bits in the message data
P1 = 16;
L0 = 6;
R3 = R3 >> 4 || R1.L = W[I1++];
//Number of bits in the message data/16 in R3
//Message data which has to be encoded in R1
P2 = R3;
//Length of the circular buffer
R2 += -1;
R3 = R2;
B0 = I0;
R1.H = 0;
R1 = LSHIFT R1 BY R3.L || I0 += 4;
R2 = A0 || P0 = [SP+12];
//Address of output
LSETUP(CONV_START,CONV_END)LC1 = P2;
//Initialize a loop for number of 16 bit message
//frames
CONV_START:
R1 = R1 | R2;
A0 = R1;
LSETUP(CODESTART,CODEEND)LC0 = P1;
//Initialize a loop for 16 message bits
CODESTART:
R1 = R1.H*R2.H ||R2.L = W[I0--];
//Fetch the coefficients of the 3rd generator
//polynomial in R2
R2.L = CC = BXOR(A0,R2);
//R2 contains the first coded bit
R0 = R2 << 1 || R1.L = W[I0--];
//Fetch the coefficients of the 2nd generator
//polynomial in R1
R1.L = CC = BXOR(A0,R1);
//R1 contains the second coded bit
R0 = R0 | R1;
R0 = R0 << 1 || R1.L = W[I0] || I0 += 4;
//Fetch the coefficients of the 1st generator
//polynomial in R1
R1.L = CC = BXOR (A0,R1);
//R1 contains the third coded bit
R0 = R0|R1;
CODEEND:
A0 = A0 >> 1 || B[P0++] = R0;
//Store the output in the output buffer
R2 = A0 || R1.L = W[I1++];
//Load the message data
CONV_END:
R1 = LSHIFT R1 BY R3.L ;
RTS;
NOP; //to avoid one stall if LINK or UNLINK happens to be
//the next instruction after RTS in the memory.
__conv_coder_onethird.end:
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