pstxnet.dat

fpga-sdram开发板-sch,本原理图是xilinx公司s3系列开发板的sdram

 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN5':;
NODE_NAME	U13 23
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN4':;
NODE_NAME	U13 22
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN3':;
NODE_NAME	U13 21
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN2':;
NODE_NAME	C442 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C445 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] NON-POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C404 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] NON-POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U12 20
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN1':;
NODE_NAME	U12 24
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN5':;
NODE_NAME	U12 23
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN4':;
NODE_NAME	U12 21
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN2':;
NODE_NAME	U12 22
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN3':;
NODE_NAME	C402 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C405 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] NON-POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C403 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U12 27
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'ENA':;
NODE_NAME	C443 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R46 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4787031@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	U11 14
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN1':;
NODE_NAME	C421 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4859813@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U14 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'EN':;
NODE_NAME	C413 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] NON-POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C412 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] NON-POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U14 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN':;
NODE_NAME	SW4 5
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4786929@V2P_QDR.SW_SLIDE_DPDT_0.NORMAL(CHIPS)':
 '5':;
NODE_NAME	U11 15
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN2':;
NODE_NAME	U11 16
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VIN3':;
NODE_NAME	U11 19
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'SYNC':;
NODE_NAME	SW4 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4786929@V2P_QDR.SW_SLIDE_DPDT_0.NORMAL(CHIPS)':
 'COMMON':;
NODE_NAME	R35 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I2930279@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	P5 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I2931684@V2P_QDR.HEADER 16_0.NORMAL(CHIPS)':
 '2':;
NET_NAME
'CB6'
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CB6':
 C_SIGNAL='@spartan3_ddr1.schematic1(sch_1):cb6';
NODE_NAME	R690 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):MT4VDDT1664H@SPARTAN3_DDR1.SODIMM_RIGHT(SCH_1):I2875913@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	J4 80
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):MT4VDDT1664H@SPARTAN3_DDR1.SODIMM_RIGHT(SCH_1):[e-mail]_200_ECC.NORMAL(CHIPS)':
 'CB6/DNU8':;
NET_NAME
'DIMM_DQ63'
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):DIMM_DQ63':
 C_SIGNAL='@spartan3_ddr1.schematic1(sch_1):dimm_dq63';
NODE_NAME	R463 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):MT4VDDT1664H@SPARTAN3_DDR1.SODIMM_RIGHT(SCH_1):I2772023@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R563 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):MT4VDDT1664H@SPARTAN3_DDR1.SODIMM_RIGHT(SCH_1):I2824387@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	J4 190
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):MT4VDDT1664H@SPARTAN3_DDR1.SODIMM_RIGHT(SCH_1):[e-mail]_200_ECC.NORMAL(CHIPS)':
 'DQ63':;
NODE_NAME	U6 AA23
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):3S1500FG676@SPARTAN3_DDR1.SPARTAN3(SCH_1):[e-mail]3_3S1500FG676D.NORMAL(CHIPS)':
 'IO_L07P_3':;
NET_NAME
'SYSACE_MPD2'
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):SYSACE_MPD2':
 C_SIGNAL='@spartan3_ddr1.schematic1(sch_1):sysace_mpd2';
NODE_NAME	U10 63
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717352@V2P_QDR.SYSTEM_ACE_CTLR_0.NORMAL(CHIPS)':
 'MPD02':;
NODE_NAME	U6 Y11
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):3S1500FG676@SPARTAN3_DDR1.SPARTAN3(SCH_1):[e-mail]3_3S1500FG676F.NORMAL(CHIPS)':
 'IO_L24N_5':;
NET_NAME
'+3.3V'
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):+3.3V':
 C_SIGNAL='@spartan3_ddr1.schematic1(sch_1):\+3.3v\';
NODE_NAME	R17 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2718898@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U10 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717352@V2P_QDR.SYSTEM_ACE_CTLR_0.NORMAL(CHIPS)':
 'P9':;
NODE_NAME	U10 128
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717352@V2P_QDR.SYSTEM_ACE_CTLR_0.NORMAL(CHIPS)':
 'P16':;
NODE_NAME	C8 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I4860391@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C9 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717780@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C7 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I4859841@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U10 17
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717352@V2P_QDR.SYSTEM_ACE_CTLR_0.NORMAL(CHIPS)':
 'P10':;
NODE_NAME	U10 37
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717352@V2P_QDR.SYSTEM_ACE_CTLR_0.NORMAL(CHIPS)':
 'P11':;
NODE_NAME	U10 55
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717352@V2P_QDR.SYSTEM_ACE_CTLR_0.NORMAL(CHIPS)':
 'P12':;
NODE_NAME	U10 73
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717352@V2P_QDR.SYSTEM_ACE_CTLR_0.NORMAL(CHIPS)':
 'P13':;
NODE_NAME	U10 92
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717352@V2P_QDR.SYSTEM_ACE_CTLR_0.NORMAL(CHIPS)':
 'P14':;
NODE_NAME	U10 109
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717352@V2P_QDR.SYSTEM_ACE_CTLR_0.NORMAL(CHIPS)':
 'P15':;
NODE_NAME	R14 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717480@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	Y2 4
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2718392@V2P_QDR.SG-8002CA_0.NORMAL(CHIPS)':
 'VDD':;
NODE_NAME	R9 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717504@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	J3 13
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2719910@V2P_QDR.COMPACT_FLASH_0.NORMAL(CHIPS)':
 'VCC1':;
NODE_NAME	J3 38
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2719910@V2P_QDR.COMPACT_FLASH_0.NORMAL(CHIPS)':
 'VCC2':;
NODE_NAME	R27 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2719558@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	R28 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2719534@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	R31 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2717728@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	P39 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CONFIG_EEPROM@SPARTAN3_DDR1.CONFIG_EEPROM(SCH_1):I2763359@V2P_QDR.HEADER 1X2_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	R72 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):CLOCKS@SPARTAN3_DDR1.CLOCKS(SCH_1):I2777182@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C207 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4582071@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C204 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4582027@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C203 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4581981@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C200 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4580719@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C199 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3808007@V2P_QDR.CAPACITOR POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C228 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3808925@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C221 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3808781@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C222 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3808805@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C223 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3808829@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C225 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3808853@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C226 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3808877@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C227 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3808901@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R55 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4790765@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	R725 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4884022@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	R53 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4806015@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	U14 4
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail](CHIPS)':
 'VOUT':;
NODE_NAME	C422 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):[e-mail] NON-POL.NORMAL(CHIPS)':
 '1':;
NODE_NAME	P13 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4892469@V2P_QDR.HEADER 1_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U7 20
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I2930453@V2P_QDR.MC74LCX541DT_0.NORMAL(CHIPS)':
 'VCC3.3':;
NODE_NAME	U8 20
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I2930625@V2P_QDR.MC74LCX541DT_0.NORMAL(CHIPS)':
 'VCC3.3':;
NODE_NAME	DD1 3
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I8429981@ML36X_2VP20.SEVENSEGTELECA_0.NORMAL(CHIPS)':
 'CC1':;
NODE_NAME	DD1 8
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I8429981@ML36X_2VP20.SEVENSEGTELECA_0.NORMAL(CHIPS)':
 'CC2':;
NODE_NAME	R62 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I8432136@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R64 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I8432326@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R66 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I8432370@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R67 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I8432394@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R68 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I8432438@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R69 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I8432462@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R70 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):LCD@SPARTAN3_DDR1.LCD(SCH_1):I8432506@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R87 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):3S1500FG676@SPARTAN3_DDR1.SPARTAN3(SCH_1):I4436618@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;
NODE_NAME	R89 2
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):3S1500FG676@SPARTAN3_DDR1.SPARTAN3(SCH_1):I4436570@V2P_QDR.RESISTOR_0.NORMAL(CHIPS)':
 '2':;