pstxprt.dat

fpga-sdram开发板-sch,本原理图是xilinx公司s3系列开发板的sdram

 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4576590@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4576590@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C279 'CAPACITOR NON-POL_0_DISCRETE__4':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4632484@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4632484@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C286 'CAPACITOR NON-POL_0_DISCRETE__5':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4620132@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4620132@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C291 'CAPACITOR NON-POL_0_DISCRETE__3':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4545193@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4545193@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C292 'CAPACITOR NON-POL_0_DISCRETE__4':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4632534@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4632534@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C294 'CAPACITOR NON-POL_0_DISCRETE__3':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4545325@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4545325@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C296 'CAPACITOR NON-POL_0_DISCRETE__7':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4792383@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4792383@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C297 'CAPACITOR POL_0_DISCRETE_C7343_':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4792593@V2P_QDR.CAPACITOR POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4792593@v2p_qdr.\capacitor pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C298 'CAPACITOR NON-POL_0_DISCRETE__4':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4792415@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4792415@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C299 'CAPACITOR NON-POL_0_DISCRETE__4':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4632508@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4632508@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C3 'CAPACITOR NON-POL_0_DISCRETE__3':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4547571@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4547571@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C30 'CAPACITOR NON-POL_0_DISCRETE__5':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4620084@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4620084@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C300 'CAPACITOR NON-POL_0_DISCRETE__4':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4638385@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4638385@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C301 'CAPACITOR NON-POL_0_DISCRETE__5':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4620156@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4620156@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C302 'CAPACITOR POL_0_DISCRETE_C7343_':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4536917@V2P_QDR.CAPACITOR POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4536917@v2p_qdr.\capacitor pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C305 'CAPACITOR NON-POL_0_DISCRETE__3':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4545237@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4545237@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C306 'CAPACITOR NON-POL_0_DISCRETE_C0':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4153727@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4153727@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C307 'CAPACITOR NON-POL_0_DISCRETE_C0':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4162090@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4162090@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C308 'CAPACITOR NON-POL_0_DISCRETE__2':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3833598@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i3833598@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C309 'CAPACITOR NON-POL_0_DISCRETE_C0':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4631562@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4631562@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C31 'CAPACITOR NON-POL_0_DISCRETE__3':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4547643@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4547643@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C310 'CAPACITOR NON-POL_0_DISCRETE__4':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4634841@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4634841@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C311 'CAPACITOR NON-POL_0_DISCRETE_C0':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4631490@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4631490@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C312 'CAPACITOR NON-POL_0_DISCRETE__2':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I3833526@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i3833526@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C313 'CAPACITOR POL_0_DISCRETE_C7343_':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4536693@V2P_QDR.CAPACITOR POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4536693@v2p_qdr.\capacitor pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C314 'CAPACITOR NON-POL_0_DISCRETE__5':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4612244@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4612244@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C315 'CAPACITOR NON-POL_0_DISCRETE__4':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4634985@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4634985@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C316 'CAPACITOR NON-POL_0_DISCRETE_C0':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4153847@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4153847@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C317 'CAPACITOR NON-POL_0_DISCRETE_C0':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4624058@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4624058@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C318 'CAPACITOR POL_0_DISCRETE_C7343_':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4641969@V2P_QDR.CAPACITOR POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4641969@v2p_qdr.\capacitor pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C32 'CAPACITOR NON-POL_0_DISCRETE__3':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4547667@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4547667@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C320 'CAPACITOR NON-POL_0_DISCRETE__4':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4634889@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4634889@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C321 'CAPACITOR NON-POL_0_DISCRETE_C0':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4153751@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4153751@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C322 'CAPACITOR NON-POL_0_DISCRETE__3':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4545349@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4545349@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C324 'CAPACITOR NON-POL_0_DISCRETE__3':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEMATIC1(SCH_1):POWER_IF@SPARTAN3_DDR1.POWER_IF(SCH_1):I4547427@V2P_QDR.CAPACITOR NON-POL_0.NORMAL(CHIPS)':
 C_PATH='@spartan3_ddr1.schematic1(sch_1):power_if@spartan3_ddr1.power_if(sch_1):i4547427@v2p_qdr.\capacitor non-pol_0.normal\(chips)',
 PRIM_FILE='.\pstchip.dat',
 SECTION='';

PART_NAME
 C326 'CAPACITOR NON-POL_0_DISCRETE_C0':;

SECTION_NUMBER 1
 '@SPARTAN3_DDR1.SCHEM