maxim248.mdf

protel元件库

LISA MODEL DESCRIPTION FORMAT 6.0
=================================
Design:   C:\Program Files\Labcenter Electronics\VSM.LIBS\VSM.LIBS SAMPLES\MICROCONTROLLERS\MAXIM\MAX248.DSN
Doc. no.: <NONE>
Revision: <NONE>
Author:   <NONE>
Created:  15/08/04
Modified: 15/08/04

*PROPERTIES,2    
TDRX=500n
TDTX=1u

*MODELDEFS,0    

*PARTLIST,35   
BAT1,BATTERY,10V,PRIMITIVE=ANALOGUE,RINT=10
BAT2,BATTERY,10V,PRIMITIVE=ANALOGUE,RINT=10
R1,RES,5k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R2,RES,400k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R3,RES,400k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R4,RES,400k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R5,RES,400k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R6,RES,400k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R7,RES,400k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R8,RES,5k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R9,RES,5k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R10,RES,5k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R11,RES,5k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R12,RES,5k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R13,RES,5k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R14,RES,5k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R15,RES,1M,PRIMITIVE=ANALOG,PRIMTYPE=RESISTOR
R16,RES,400k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
R17,RES,400k,PRIMITIVE=DIGITAL,PRIMTYPE=RESISTOR
U1,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDTX>,TDLHDQ=<TDTX>
U2,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDTX>,TDLHDQ=<TDTX>
U3,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDTX>,TDLHDQ=<TDTX>
U4,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDRX>,TDLHDQ=<TDRX>
U5,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDRX>,TDLHDQ=<TDRX>
U6,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDRX>,TDLHDQ=<TDRX>
U7,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDRX>,TDLHDQ=<TDRX>
U8,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDRX>,TDLHDQ=<TDRX>
U9,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDRX>,TDLHDQ=<TDRX>
U10,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDRX>,TDLHDQ=<TDRX>
U11,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDRX>,TDLHDQ=<TDRX>
U12,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDTX>,TDLHDQ=<TDTX>
U13,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDTX>,TDLHDQ=<TDTX>
U14,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDTX>,TDLHDQ=<TDTX>
U15,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDTX>,TDLHDQ=<TDTX>
U16,TRIBUFFER,TRIBUFFER,INVERT="Q,OE",PRIMITIVE=DIGITAL,TDHLDQ=<TDTX>,TDLHDQ=<TDTX>

*NETLIST,40   
TB1IN,3
TB1IN,IT
U1,IP,D
R3,PS,2

TB1OUT,2
TB1OUT,OT
U1,OP,Q

$ENTB$,5
$ENTB$,IT
U1,IP,OE
U2,IP,OE
U3,IP,OE
U15,IP,OE

TB2IN,3
TB2IN,IT
U2,IP,D
R5,PS,2

TB2OUT,2
TB2OUT,OT
U2,OP,Q

TB3IN,3
TB3IN,IT
U3,IP,D
R7,PS,2

TB3OUT,2
TB3OUT,OT
U3,OP,Q

RA1IN,3
RA1IN,IT
U4,IP,D
R1,PS,1

RA1OUT,2
RA1OUT,OT
U4,OP,Q

$ENRA$,5
$ENRA$,IT
U4,IP,OE
U5,IP,OE
U6,IP,OE
U7,IP,OE

RA2IN,3
RA2IN,IT
U5,IP,D
R9,PS,1

RA2OUT,2
RA2OUT,OT
U5,OP,Q

RA3IN,3
RA3IN,IT
U6,IP,D
R11,PS,1

RA3OUT,2
RA3OUT,OT
U6,OP,Q

RA4IN,3
RA4IN,IT
U7,IP,D
R13,PS,1

RA4OUT,2
RA4OUT,OT
U7,OP,Q

RB1IN,3
RB1IN,IT
U8,IP,D
R8,PS,2

RB1OUT,2
RB1OUT,OT
U8,OP,Q

$ENRB$,5
$ENRB$,IT
U8,IP,OE
U9,IP,OE
U10,IP,OE
U11,IP,OE

RB2IN,3
RB2IN,IT
U9,IP,D
R10,PS,2

RB2OUT,2
RB2OUT,OT
U9,OP,Q

RB3IN,3
RB3IN,IT
U10,IP,D
R12,PS,2

RB3OUT,2
RB3OUT,OT
U10,OP,Q

RB4IN,3
RB4IN,IT
U11,IP,D
R14,PS,2

RB4OUT,2
RB4OUT,OT
U11,OP,Q

TA1IN,3
TA1IN,IT
U12,IP,D
R2,PS,2

TA1OUT,2
TA1OUT,OT
U12,OP,Q

$ENTA$,5
$ENTA$,IT
U12,IP,OE
U13,IP,OE
U14,IP,OE
U16,IP,OE

TA2IN,3
TA2IN,IT
U13,IP,D
R4,PS,2

TA2OUT,2
TA2OUT,OT
U13,OP,Q

TA3IN,3
TA3IN,IT
U14,IP,D
R6,PS,2

TA3OUT,2
TA3OUT,OT
U14,OP,Q

C1-,4
C1-,GT
VP-,GT
C2-,GT
BAT2,PS,-

GND,12
GND,PR
BAT2,PS,+
BAT1,PS,-
R15,PS,1
R8,PS,1
R10,PS,1
R12,PS,1
R14,PS,1
R1,PS,2
R9,PS,2
R13,PS,2
R11,PS,2

C1+,4
C1+,GT
VP+,GT
C2+,GT
BAT1,PS,+

VCC,10
VCC,PR
R15,PS,2
R2,PS,1
R3,PS,1
R5,PS,1
R4,PS,1
R6,PS,1
R7,PS,1
R16,PS,1
R17,PS,1

TB4IN,3
TB4IN,IT
U15,IP,D
R17,PS,2

TB4OUT,2
TB4OUT,OT
U15,OP,Q

TA4IN,3
TA4IN,IT
U16,IP,D
R16,PS,2

TA4OUT,2
TA4OUT,OT
U16,OP,Q

*GATES,0