wdt_def.h

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/*-----------------------------------------------------------------------------
@@
@@ (Summary): Watchdog Timer (WDT) IP Level Definitions Header File
@@
@@ (Comment): Define Registers of WDT
@@
@@ (Author) : Tan Wee Kah
@@
@@ (RCS ID) :
@@
-----------------------------------------------------------------------------*/

#ifndef APD_WDT_DEF_H
#define APD_WDT_DEF_H

/* WDT Register Addresses */
#define APD_WDTCTLR     ((volatile APD_UCHAR  *)(APD_WDTBASE))          /* Watchdog Control Register */
#define APD_WDTCNTR     ((volatile APD_ULONG  *)(APD_WDTBASE + 0x04))   /* Watchdog Counter Register */

/* Enable Bit */
#define APD_WDT_EN          0x1     /* Watchdog Enable bit */

/* Timeout Response */
#define APD_WDT_RSP_FIQ     0x0     /* FIQ Timeout Response bits */
#define APD_WDT_RSP_SYSRST  0x6     /* System Reset Timeout Response bits */

/* Freeze Enable */
#define APD_WDT_FRZ_EN      0x8     /* Watchdog Freeze Enable bit */
#define APD_WDT_FRZ_DIS     ~0x8    /* Watchdog Freeze Disable bit */

/* Time Out Period */
#define APD_WDT_TOP_21      0x00    /* 2pow(21) Timeout Perioed bit */
#define APD_WDT_TOP_22      0x10    /* 2pow(22) Timeout Perioed bit */
#define APD_WDT_TOP_23      0x20    /* 2pow(23) Timeout Perioed bit */
#define APD_WDT_TOP_24      0x30    /* 2pow(24) Timeout Perioed bit */
#define APD_WDT_TOP_25      0x40    /* 2pow(25) Timeout Perioed bit */
#define APD_WDT_TOP_26      0x50    /* 2pow(26) Timeout Perioed bit */
#define APD_WDT_TOP_29      0x60    /* 2pow(29) Timeout Perioed bit */
#define APD_WDT_TOP_31      0x70    /* 2pow(31) Timeout Perioed bit */

/* RESET value */
#define APD_WDT_RESET       0xA5A5  /* Watchdog Counter Reset Value */

#endif