sl811hs_appnote.txt

CYPRESS SL811HS 应用笔记

            if (SL11Read(0xf) > (BYTE)pl)
               SL11Write(EP0Control,Cmd); // Enable ARM 
         else

               SL11Write(EP0Control,Cmd|0x20); 
 // Enable ARM 
 
         }
 
         else
 
            SL11Write(EP0Control,Cmd); 
             // Enable ARM 
 
#ifdef REV13
 
         if (dbug && pid==PID_IN) 
 // handle low speed via Hub
 
            SL11Write(EP1Control,1); 
 
#endif
 
      }
 
  retry++;
 

      bLen = ((int)(len - rLen) >= (int)payload) ? payload : (BYTE)(len - rLen);
      addr = (D0 & 1) ? data0 : data1; // next ping pong buffer

      // Write ahead for ping pong buffer
      if (pid == PID_OUT && retry <= 2 && bLen) 
         SL11BufWrite((short)(addr + cOFFSET), buf + rLen, bLen);

      if (Delayms(TIMEOUT, 1)) 

   {
      //printf("TIMEOUT: pid %x result %x\n", pid, SL11Read(EP0Status)); 
result = 4; // indicate it is time-out

      }
   else
   {

         result=SL11Read(EP0Status); 

#ifdef REV12
         if (pid==PID_IN && dbug && !(result&0x40)) // handle low speed via hub
         {

            SL11Write(IntStatus,0xff); 
            SL11Write(EP0Control,9);
            Delayms(1,1);

         } 

#endif
   }
      if (result & 1)
      {

          D0++; 
          retry = 0;
          Cmd ^= 0x40; // toggle DATA0/DATA1

         //Add for Shortpacket detection
    if (pid==PID_IN) 

              rem = (BYTE)SL11Read(EP0Counter);
          len -= rLen; // rLen = actual read/write
          if (bLen && len && rem==0) 
{ 

              SL11Write(EP0XferLen, (BYTE)(cOFFSET+bLen)); 
              SL11Write(EP0Address, addr); // data addr 
              SL11Write(IntStatus, 0xff); 

               if (full_speed)
               {
                  if (SL11Read(0xf) > (BYTE)pl)
                      SL11Write(EP0Control,Cmd); // Enable ARM 
         else 

Cypress Semiconductor Corporation 
SL811HS and SL811HST: Application Notes 
                      SL11Write(EP0Control,Cmd|0x20); // Enable ARM 
              }
              else

                  SL11Write(EP0Control,Cmd); // Enable ARM 
#ifdef VER13
              if (dbug && pid==PID_IN) // handle low speed via hub
                  SL11Write(EP1Control,1); 

#endif
          }
          if (pid==PID_IN) 
          {

             SL11BufRead((short)((D0&1)?data0+cOFFSET:data1+cOFFSET), buf, rLen);
             if (rem) // Short Packet detection
             {

                 //printf("Short packet detection %x\n", rem); 
break;
             }
          }

  if (len == 0) break;
        rLen = bLen;
          buf += rLen;

    }
       if (result & 0x04)
       {

           if (time_out > 100) 
           { 
               printf("WARNNING: time-out, pid=%x, status %x len %x\n", pid, 
                                   result, len);
               break; 
           }
          // should be 100 time retry on time_out, check the babble detection

           time_out++;
       }
       else

           time_out = 0;
       if (result & 0x80) // STALL
       { 

          printf("WARNNING: Stall is detected, status %x, len %x\n", result, len);

          break;
       }
       if (retry >= MAX_RETRY) break;

   }
   DToggle[ep] = Cmd & 0x40;
   if (result & 1) return len;
   printf("Exit: PID=%x Result = %x len=%d, retry %d\n",pid, result, len, retry); 
   return -1; 

} 

5.1.Control Transfer 
The Control pipe includes the Token (SETUP, IN, OUT), Data (DATA0/DATA1), and Handshake (ACK, NAK, STALL) phases. During the SETUP transaction, data is always sent to the USB peripheral with a specific request. Following the SETUP transaction, the SL811HS initiates one or more IN transactions, which prompts the target to return the requested data. SL811HS completes the Control Transfer by using OUT transactions to request verification that the device endpoint has successfully returned the contents of the descriptor. The Control Pipe is used for USB device enumeration. 
The USB defines the allowable maximum control data payload sizes for full-speed devices to be 8, 16, 32 or 64 bytes. However, low speed devices are limited to an 8-byte maximum data payload size. 
5.1.1 SETUP Transaction 
The SETUP transaction is a USB Host specific command that requests USB device information whenever a USB device is attached.  
USB Trace 6: SETUP Transaction 





Note: Data payload for SETUP Token is 8 bytes.Depending on the wLength of the transaction descriptor, the SETUP transaction is followed by either one or more IN transactions that the host requests from the device. See example below showing an instance of more than one IN transaction.
5.1.2 Control Read 
The SL811HS read IN Token from USB device, which is always started with DATA1 during the Data phase. SL811HS toggles to DATA0 then DATA1 and so on. 
USB Trace 7: IN Transaction from Device to Host 
To transfer 18-byte from device to host, it takes 3 IN transactions with 8-byte data payload. 



















SL811HS completes the Control Transfer by using OUT transaction with either handshaking or zero length data to request verification that the device endpoint has successfully returned the contents of the descriptor. 
USB Trace 8: OUT Transaction from Host to Device 






5.1.3 Control Write 
The SL811HS writes an OUT Token to the USB device, which always starts with DATA1 during the Data phase. SL811HS toggles to DATA0 then DATA1 and so on. 
USB Trace 9: OUT Transaction from Host to Device 
To transfer 18-bytes from the host to device by Control transfer, it takes 3 OUT transactions with 8-byte data payload. 


















The SL811HS send an IN Token during Control Write to initiate the Status Stage. The USB device responds either by a handshake or a zero length data to indicate its current status. 
5.2.Bulk Transfer 
The Bulk pipe includes the Token (IN, OUT), Data (DATA0/DATA1), and Handshake (ACK, NAK, STALL) phases. The USB defines the allowable maximum control data payload sizes for full-speed devices to be 8, 16, 32 or 64 bytes.  However, low speed devices are limited to an 8-byte maximum data payload size. 
5.2.1 BULK Write 
The BULK Write endpoint’s toggle sequence is initialized to DATA0/DATA1 and so on. 
USB Trace 10: Bulk Write 
To transfer 512-bytes from host to device by BULK transfer, it takes 8 OUT transactions with a 64-byte data payload. 












…







5.2.2 BULK Read 
The BULK Read endpoint’s toggle sequence is initialized to DATA0/DATA1 and so on. 
USB Trace 11: Bulk Read 
To transfer 512-bytes from device to host, it takes 8 IN transactions with a 64-byte data payload. 












…







6. ERROR RECOVERY MANAGEMENT 
Error recovery is the responsibility of the host controller. The SL811HS host controller provides error detection and status for USB transactions. Host software should be written to recover from reported error conditions. 
6.1.SL811HS Error Conditions 
Error conditions are reported in the Status register. An interrupt can be generated on an error condition by enabling the Interrupt bit in the Interrupt control register. Polling the USBStatus register can monitor the error conditions. 
USB Status: 
0x01 ACK 0x02 Device Error Bit 0x04 Device Time out 0x08 Toggle bit 0x10 SET_UP packet bit (Not used in SL11H) 0x20 Overflow bit 0x40 Device returned NAK to last transaction 0x80 Device returned STALL 
Table 7: Error Conditions 
Error Conditions  SL811HS  
Packet ID Check  .  
Bit Stuff Error  .  
Bus Time-out  .  
False EOP  .  
CRC Check  .  
Babble  .  
Loss of Activity  .  

6.2.Data Toggle Error 
Data transfers on the USB use Data0 and Data1 packets so that the receiver can remain synchronized with the transmitter. If synchronization is lost, a Data Toggle Error condition occurs. Data Toggle Error reporting is supported for Interrupt, Bulk, and Control transfers only. 
Software is required to recover from a Data Toggle Error whenever it occurs.  SL811HS provides bit-3 of USBStatus Register to report whenever a Data0 and Data1 mismatch occurs. 
6.3.Bus Timeout Error 
A corrupted Token, Data, or handshake results in a Bus Timeout error, which is reported in the status register. This can result in a retry of the same Data toggle setting. 
6.4.Babble and Loss of Activity (LOA) 
On USB Bus, the Babble condition is reported in the Status register.  When bit 2 is set in the interrupt enable register, the babble condition causes an interrupt. This interrupt only occurs during the period between the EOF2 and the next SOF token generation. See chapter 5 in USB Specification v1.1 for more details.  
The SL811HS is able to detect a babble condition on bit-2 of the Interrupt Status (IntStatus =0x0d). When the babble condition is detected, SL811HS will be prevented from sending any packets during EOF2 time frame. SL811HS must discontinue the transactions prior to the end of packet to ensure that no bus activity occurs at the end of frame. 
Loss of Activity (LOA) is similar to Babble. A device starting a packet transfer followed by a constant J or K state on the bus and no E