sl811hs_appnote.txt

CYPRESS SL811HS 应用笔记

CPU_GPIO VCC 

1. 
CPU_GPIO detects that a cable is for “Slave”. 

2. 
Never supply USB Bus power. 


(Example.2) Using two connectors on host side.See “SL811HS and SL811HST: Application Notes page.8” for the layout.
Supplier must explain to the customer, “ Host and Slave must not be used at the same time” 
because it will break the system.

Cypress Semiconductor Corporation 
SL811HS and SL811HST: Application Notes 


3. PROGRAMMING INFORMAT ION 
3.1.Host and Device Programming 
The SL811HS supports auto increment mode for Read/Write Cycles in the A0 mode. In A0 mode, the Micro Controller sets up the address only once. On any subsequent DATA Read/Write access, the internal address pointer will advance to the next DATA location. 
In A0 mode (shown in the diagram above), the internal register address is input to the device in a normal I/O or memory mapped I/O write operation with the A0 address select input driven low ('0'). This operation results in the address being latched internally so that the subsequent Read or Write operation with A0 driven high ('1') will result in a data transfer. 

2. 

D7 
 D6 
 D5 
 D4 
 D3 D2 
 D1 
 D0 
 A0 
 
       REG/MEMORY DATA 
 '1'  

READ/WRITE 

REGISTER 

OR 

MEMORY 

SL811H Register/Memory I/O Operations
. 
1. Write Address to I/O location with A0 = '0'. 


2. Read/Write data from/to location. A0 = '1'. 



3.2.SL811HS USB Control Registers 
The SL811HS can communicate to any USB Device with any type of configuration or function including any specific endpoints via the USB control registers. The SL811HS can address up to 127 devices and 16 endpoints. 
Each endpoint has an associated set of registers (this is further described in the SL811HS specification). Each must be programmed in order to initiate or respond to transactions on the USB. The host initiates USB Control Register’s transactions during setup and configuration. Typically, the host will request information from the device during setup to determine the device's characteristics, and assign a USB ID to the device. The complete definition of control messages and transactions are defined in Chapter 9 of the USB Specification 1.1. 
.2001 Cypress Semiconductor Corporation. All rights reserved. The information  Date: 07/26/01  
and specifications contained in this document are subject to change without  Revision: 1.21  
notice.  Page:15  

Cypress Semiconductor Corporation 
SL811HS and SL811HST: Application Notes 
3.3.SL811HS MEMORY MAP 
The SL811HS contains 256 bytes of internal memory buffer. The first 16 bytes of memory represent control and status registers for programmed I/O operations. The remaining memory locations are used for data buffering (max 240 Bytes). 
The SL811HS can be mapped into the users processor I/O or memory space. In the following example, which is used in the SL811HS DVK, The SL811HS is mapped at an ISA bus I/O location. 
Table 1: SL811HS and PC address 
Register Name  Address  Register Function  
Host Mode  
SL11_ADDR  0x290  SL811HS I/O Address  

Figure 3: SL811HS Internal Memory Map 

Control Registers (0x00-0x0F) 
.2001 Cypress Semiconductor Corporation.  All rights reserved. The information  Date: 07/26/01  
and specifications contained in this document are subject to change without  Revision: 1.21  
notice.  Page:16  

3.3.1 Control Registers 
In Host mode, SL811HS has two sets of USB Endpoint Control Registers, which allow for overlapped operation. The registers allow new transactions to be set up while a current transaction is underway.  The following Tables show various Register addresses and values used in the DVK software routines 
Table 2: USB Control Register Memory 
USBControl0 Description 
EP0Control  0x00  Control Register0  
EP0Address  0x01  Address Register0  
EP0XferLen  0x02  Transfer length Register0  
EP0Status  0x03  Status Register0  
EP0Counter  0x04  Counter Register0  

USBControl1 Description 
EP0Control  0x08  Control Register1  
EP0Address  0x09  Address Register1  
EP0XferLen  0x0a  Transfer length Register1  
EP0Status  0x0b  Status Register1  

EP0Counter 0x0c Counter Register1 
Table 3: SL811HS Control Register Memory Map 
Register Name  Address  Register Function  
CtrlReg  0x05  Control Register  
IntEna  0x06  Interrupt Enable  
IntStatus  0x0d  Interrupt Status  
DATASet  0x0e  DATA Set  
CSOFcnt  0x0f  SOF Counter High and Control Register  

3.3.2 Memory Buffer 
The SL81HS Memory buffer is located between address 0x10 and 0xFF inclusive, and is used for data buffering. The following Tables show Register labels and variables mapped to specific memory and register locations that are used in the example code. 
Table 4: DATA0/DATA1 Mapping 
Register Name  Address  Register Function  
cMemStart  0x10  Host Memory Start  
ubufA  0x80  Buffer A address for DATA0  
ubufB  0xc0  Buffer B address for DATA1  
uxferLen  0x40  Xfer Length  
sMemSize  0xc0  Total SL811HS memory size  

cMemEnd 256 Upper limit of memory 
Table 5: Buffers use for configuration and Vendor Specific command 
Register Name  Address/  Register Function  
Value  
EP0Buf  0x40  Endpoint 0 Buffer where SL811HS memory starts  
EP0Len  0x40  Length of config buffer EP0Buf  

Table 6: SL811HS Code Bit Definitions 
Name Value Description 
DATA0_WR 0x07 Arm+Enable+tranmist to Host+DATA0 
DATA1_WR 0x05 Arm+Enable+tranmist to Host on DATA1 
ZDATA0_WR 0x47 Arm+Transaction Ignored+tranmist to Host+DATA0 
ZDATA1_WR 0x45 Arm+Transaction Ignored+tranmist to Host+DATA1 
DATA0_RD 0x03 Arm+Enable+received from Host+DATA0 
DATA1_RD 0x43 Arm+Enable+received from Host+DATA1 
PID_SOF 0xa5 SOF Token 
PID_SETUP 0x2d SETUP Token 
PID_IN 0x69 IN Token 
PID_OUT 0xe1 OUT Token 
PID_PRE 0x3c PRE Token 
PID_NAK 0x5a NAK Token 
PID_STALL 0x1e STALL Token 
PID_DATA0 0xc3 DATA0 Token 
PID_DATA1 0X4b DATA1 Token 
MAX_RETRY 0xffff Number of Re-try 
TIMEOUT 6000L Time out 
Cypress Semiconductor Corporation 
SL811HS and SL811HST: Application Notes 
3.4.Interrupt Status Register 
The ISR is a Read/Write register providing interrupt status. Writing to this register can clear interrupts. To clear a specific interrupt, the register is written with corresponding bit set to “1”. 
Bit Position  Bit Name  Function  
0  USB-A  USB-A done Interrupt.  
1  USB-B  USB-B done Interrupt.  
2  Babble Detection  1=enable interrupt on babble detection  
3  Reserved  
4  SOF timer  1=enable interrupt on 1ms SOF timer  
5  Insert/Remove  Slave Insert/Remove detection (Note 2)  
6  USB Reset/Resume  Enable USB Reset/Resume Interrupt. (note 1)  
7  D+  Value of the Data+ pin  

NOTE1:
This bit is shared between USB_RESET and Resume interrupt detection.  When bit-6 of 
register 05H is set to one, this bit will be the Resume detection Interrupt bit. Otherwise, this 
bit is used to indicate detection of USB RESET. 

NOTE2:Bit-5 is provided to support USB cable Insertion/Removal detection for the SL811HS in Host Mode. This bit is set whenever a cable is inserted or removed from the USB port. It should be cleared after a removal or insertion is detected so that the next event can be detected. 
Bit 6 is updated whenever a USB reset is detected, or when in suspend state the detection 
of a ‘K’ or SE0 state 

.	
Bit 7 provides continuous USB Data+ line status. Bit 7 in conjunction with bit 6 and 5 can be used to detect if a Low or Full speed device is connected after USB reset is issued. The bit should be read immediately after a USB reset and before USB activity begins for a valid state. 

.	
On Power up, before generating a USB Reset, the state of the USB Reset bit will be = ‘1’ if no device is connected, i.e. a ‘SE0’ on the USB. If the bit is ‘0’ then it indicates a device is attached. If the D+ (bit 7) is a ‘1’ then the attached device is a Full Speed device, if D+ is a ‘0’ then it is a Low Speed Device. 

.	
After a USB Reset has been generated and the USB is idle, the same procedure can be used to determine if a device is attached.  The SL811HS is continually monitoring the USB and if a ‘SE0” state continuously exists on the USB the USB reset bit will be ‘1’ indicating no device attached. If ‘0’ then device attached and speed can be determined by viewing the state of bit 7. 


4. SL811HS HOST SOFTWARE 
These sample IO subroutines are based on the SL811HS DVK. The Address location is mapped for the ISA bus space. 
The User should redefine the SL11_ADDR variable to match user’s mapping. 
The next section shows how a Microcontroller can communicate with SL811HS. In successive sections, examples will be shown for two possible operations to be performed with the SL811HS: 
-Transmit Data 
-Receive Data 

4.1.SOFTWARE APPLICATION 
The SL811HS is intended for embedded systems. This document describes general interface routines that are required by the SL811HS host USB interface. For integration with a specific external Microcontroller, you will need to understand the following sections to know how to communicate with the SL811HS. The interface to the SL811HS is described using an ISA bus, but these functions can be translated for use with any external CPU or other type of interface bus. 
4.1.1 Single Write Operation 
Writing a byte to the SL811HS involves two write cycles. On the first write, the application must write a register address into the SL811HS's Address Pointer Register. On the second write, the actual data is written to the chip. 
In an I/O mapped application, the function to write a byte to an SL811HS register is shown below: 
Program Sample 1: Single Write Function 
void SL11Write(BYTE a, BYTE d) 

{ 

  outportb(SL11_ADDR,a);

  outportb(SL11_ADDR+1,d); 

} 

The function to write a block of data of a specific length into the SL811HS from the buffer, which is defined by the pointer “addr”. 
Cypress Semiconductor Corporation 
SL811HS and SL811HST: Application Notes 
Program Sample 2: Write Buffer Function 
void SL11BufWrite(short addr, BYTE *s, short c) 

{

   if(c<=0) return;

   outportb(SL11_ADDR,addr);

   while (c--) outportb(SL11_ADDR+1,*s++); 

} 

4.1.2 Single Read Operation 
Reading a byte from the SL811HS involves an address write cycle, followed by a read cycle. First, as in a data write, the application writes a register address into the SL811HS's Address Pointer Register. The data is then read from the chip in a read cycle. 
The function to read an SL811HS register is shown below: 
Program Sample 3: Single Read Function 
BYTE SL11Read(BYTE a) 

{ 

  outportb(SL11_ADDR,a);

  return (inportb(SL11_ADDR+1)); 

} 

The Read Buffer function reads a block of data of a specific length from the buffer, which is located by the pointer “addr.” 
Program Sample 4: Read Buffer Function 
void SL11BufRead(short addr, BYTE *s, short c) 

{

   if( c <= 0) return;

   outportb(SL11_ADDR, addr);

   while (c--) *s++ = (BYTE)inportb(SL11_ADDR+1); 

} 

4.1.3 Memory Test 
The Memory test verifies read/write operation of the SL811HS internal memory. 
Program Sample 5: Memory Test 
int SL11HMemTest() 

{ 

   int errors = 0, i;

   for (i = EP0Buf; i < cMemEnd; i++) // addr = data 

      SL11Write((BYTE)i, (BYTE)i); 

   for (i = EP0Buf; i < cMemEnd; i++) // verify data 
   {
      if ((BYTE)i != SL11Read((BYTE)i)) 

         errors++;
      SL11Write ((BYTE)i, (BYTE)~i);
      if ((BYTE)~i != SL11Read((BYTE)i))

         errors++;
   }

   // auto increment: addr = data 
   for (i = EP0Buf, outportb(SL11_ADDR,EP0Buf); i < cMemEnd; i++)
       outportb(SL11_ADDR+1, i);

   // auto: addr = data 
   for (i = EP0Buf, outportb(SL11_ADDR, EP0Buf); i < cMemEnd; i++)
   {

      if ((BYTE)i != (BYTE)inportb(SL11_ADDR + 1))

         errors++;
   }
   // clear all SL811H/SL11H Memory 
   for (i = EP0Buf, outportb(SL11_ADDR, EP0Buf); i<cMemEnd; i++)

       outportb(SL11_ADDR + 1, 0);
   printf("Memory test done %x\n",errors);
   return errors; // Return number of error 

} 

4.1.4 USB Reset 
Before accessing a USB device, the SL811HS must generate a USB_RESET, which forces the slave device to its default address of zero. The minimum time required to hold the USB bus in Reset is . 10 milliseconds. Every USB device after detecting Reset responds to USB address zero. After Reset, configuration software can read every device’s descriptor at the same default address, one device at a time. 
Program Sample 6: USB Reset Function 
//--------------------------------------------------------------------------
// UsbReset: 
//--------------------------------------------------------------------------
void USBReset()