appcfg.h

一个图形显示芯片s1d13505的应用程序

/******************************************************************************/
/*                                                                            */
/*  HAL_STRUCT Information generated by 13505CFG.EXE                          */
/*                                                                            */
/*  Copyright (c) 1998, 2001 Epson Research and Development, Inc.             */
/*  All rights reserved.                                                      */
/*                                                                            */
/*  Panel:   640x480 86Hz TFT Single 18-bit (PCLK=31.500 MHz)                 */
/*  CRT:     640x480 75Hz (PCLK=31.500 MHz)                                   */
/*  Memory:  DRAM (MCLK=31.500 MHz)                                           */
/*                                                                            */
/*  Include this file ONCE in your primary source file.                       */
/*  Set compiler options to pack the structure on a byte boundary.            */
/*                                                                            */
/******************************************************************************/

HAL_STRUCT HalInfo = 
    {
    "1355 HAL EXE",     /* ID string */
    0x1234,             /* Detect Endian */
    sizeof(HAL_STRUCT), /* Size */
       fDEFAULT_LCD
     | fVALID_LCD
     | fVALID_CRT
     | fVALID_LCDCRT
     | fFIXED_LCD_CLKI
     | fFIXED_CRT_CLKI,    /* Flags */
        {
        /* Registers */
          {              /* LCD */
            0x00,0x50,0x25,0x00,0x4F,0x03,0x00,0x80,
            0xDF,0x01,0x3E,0x00,0x00,0x15,0xFF,0x03,
            0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x02,
            0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
            0x00,0x00,0x58,0x1B,0x00,0x00,0x00,0x00,
            0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
            0x00,0x00
          },
          {              /* CRT */
            0x00,0x50,0x25,0x00,0x4F,0x18,0x01,0x07,
            0xDF,0x01,0x13,0x00,0x02,0x16,0xFF,0x03,
            0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x02,
            0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
            0x00,0x00,0x58,0x1B,0x00,0x00,0x00,0x00,
            0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
            0x00,0x00
          },
          {              /* SIMULTANEOUS */
            0x00,0x50,0x25,0x00,0x4F,0x18,0x01,0x07,
            0xDF,0x01,0x13,0x00,0x02,0x17,0xFF,0x03,
            0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x02,
            0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
            0x00,0x00,0x58,0x1B,0x00,0x00,0x00,0x00,
            0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
            0x00,0x00
          },
        },
        16,           /* Host CPU bus width in bits         */
     31500,         /* ClkI (kHz)                         */
      8000,         /* Bus Clock (kHz)                    */

#if defined(BCC68K)
    0x100000,       /* Physical Address of Registers      */
#elif defined(IDP68K)
    0xF80000,       /* Physical Address of Registers      */
#elif defined(LCEVBSH3)
    0x14000000,     /* Physical Address of Registers      */
#else
    0x00E00000,     /* Physical Address of Registers      */
#endif

#if defined(BCC68K)
    0x200000,       /* Physical Address of Display Memory */
#elif defined(IDP68K)
    0xF00000,       /* Physical Address of Display Memory */
#elif defined(LCEVBSH3)
    0x4000000,      /* Physical Address of Display Memory */
#else
    0x00C00000,     /* Physical Address of Display Memory */
#endif

      86,           /* Panel Frame Rate (Hz)              */
      75,           /* CRT Frame Rate (Hz)                */
      50,           /* Memory speed (ns)                  */
   32000,           /* Memory refresh time (us)           */
      84,           /* Trc: Ras to Cas Delay (ns)         */
      30,           /* Trp: Ras Precharge time (ns)       */
      50,           /* Tras: Ras Pulse Width time in ns   */
      50,           /* Trac: Ras Access Charge time (ns)  */
      
    };