📄 cs4360.c
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/***********************************************************************/
/* File: Cs4360.c */
/* Copyright (c) 2000 Corporation, All Rights Reserved */
/* THIS IS PROPRIETARY SOURCE CODE OF CORPORATION */
/* */
/* =========== */
/* Descripton: */
/* =========== */
/* */
/* Log: */
/* === */
/* $Name: $
/* $Header: c:/vp2k/Customer/device/cs4360/cs4360.c 2001/09/20 10:52:03 deheng zhou $
/* $Log: cs4360.c $
/* Revision 1.00 2001/09/20 10:52:30 deheng zhou $
/***********************************************************************/
#include "Config.h"
#ifdef DAC_CS4360
#include "customer\device\dac\cs4360\cs4360.h"
#include "Customer\Device\I2C\i2c.h"
#include "Playcore\Coremain\CoreGDef.h"
#include "Playcore\Timing\Timing.h"
BYTE MODE_CONTROL_REG1_SHDW,MODE_CONTROL_REG2_SHDW;
#define CS4360_Addr 0x20
void dac_init(void)
{
MODE_CONTROL_REG2_SHDW = 0x0B0;
i2c_write(CS4360_Addr,MODE_CONTROL_REG2,MODE_CONTROL_REG2_SHDW);
delay_us(100);
MODE_CONTROL_REG2_SHDW = 0x0A0;
// MODE_CONTROL_REG2_SHDW &= (~PDN_ENABLED);
//MODE_CONTROL_REG2_SHDW |= (SOFT_RAMP | POPG_ENABLED );
i2c_write(CS4360_Addr,MODE_CONTROL_REG2,MODE_CONTROL_REG2_SHDW);
delay_us(10000);
MODE_CONTROL_REG1_SHDW = DIF_RIGHT_20BIT | AUTO_MUTE; //DIF_I2S_UPTO24BIT | AUTO_MUTE;
i2c_write(CS4360_Addr,MODE_CONTROL_REG1,MODE_CONTROL_REG1_SHDW);
// single_volume_ctr();
// i2c_write(0x20,MIXING_CONTROL_REG1,DEFAULT_VALUE);
// i2c_write(0x20,MIXING_CONTROL_REG2,DEFAULT_VALUE);
// i2c_write(0x20,MIXING_CONTROL_REG3,DEFAULT_VALUE);
// i2c_write(0x20,VOLUME_CONTROL_REGB1,0);
// i2c_write(0x20,VOLUME_CONTROL_REGA1,0);
// i2c_write(0x20,VOLUME_CONTROL_REGB1,0);
// i2c_write(0x20,VOLUME_CONTROL_REGA2,0);
// i2c_write(0x20,VOLUME_CONTROL_REGB2,0);
// i2c_write(0x20,VOLUME_CONTROL_REGA3,0);
// i2c_write(0x20,VOLUME_CONTROL_REGB3,0);
}
#endif//DAC_CS4360
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