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📄 start.src

📁 uc/os在c167上的移植代码
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	; Memory Tri-state is extended by either 1 or 0 State Times. BUSCON2.5
		; 0 = Delay Time (Reset value)
				; 1 = No Delay Time

	; External bus configurations. BUSCON2[7..6]
		; 0 = 8-bit Demultiplexed Bus
				; 1 = 8-bit Multiplexed Bus
				; 2 = 16-bit Demultiplexed Bus
				; 3 = 16-bit Multiplexed Bus

	; External bus configurations. BUSCON2[7..6]
					; After reset determined by the state 
					; of the port pins P0L.7 and P0L.6.
					
	; ALE Signal is lengthened by either 1 or 0 State Times. BUSCON2.9

		; 0 = No Delay (Reset value if EA# pin is high
				; 1 = Delay (Reset value if EA# pin is high

	; Bus Active (BUSACT2) control bit. BUSCON2.10
				; 1 = Enable external bus
	
	; READY# Input Enable control bit. BUSCON2.12
		; 0 = Disabled (Reset value)
				; 1 = Enabled

	; Read Chip Select (CSREN2) enable bit. BUSCON2.14
		; 0 = Chip select independend of read command
				; 1 = Chip select for duration of read command

	; Write Chip Select (CSWEN2) enable bit. BUSCON2.15
		; 0 = Chip select independend of write command
				; 1 = Chip select for duration of write command

	; Process BUSCON2 low byte and high byte values
	BUSC2		EQU	((00h<<15) | (00h<<14) | (00h<<12) | (0<<10) | (00h<<9) | (01h<<6) | (00h<<5) | (01h<<4) | ((~01h)&000Fh))

	; Value definitions for System Configuration Register : BUSCON3

	; Memory Cycle Time is extended by a number of additional State Times.
	; in a range from 0 through 15. BUSCON3[3..0]
				; Reset value MCTC = 15 additional state times

		; 1 = Memory wait states is 1 (MCTC = 0EH).
				; 0 = Memory wait states is 0 (MCTC = 0FH).

	; The Read/Write Signal Delay is 0.5 or 0 State Times. BUSCON3.4
		; 1 = No Delay Time
				; 0 = Delay Time (Reset value)

	; Memory Tri-state is extended by either 1 or 0 State Times. BUSCON3.5
		; 0 = Delay Time (Reset value)
				; 1 = No Delay Time

	; External bus configurations. BUSCON3[7..6]
		; 0 = 8-bit Demultiplexed Bus
				; 1 = 8-bit Multiplexed Bus
				; 2 = 16-bit Demultiplexed Bus
				; 3 = 16-bit Multiplexed Bus

	; ALE Signal is lengthened by either 1 or 0 State Times. BUSCON3.9

		; 0 = No Delay (Reset value if EA# pin is high
				; 1 = Delay (Reset value if EA# pin is high

	; Bus Active (BUSACT3) control bit. BUSCON3.10
				; 1 = Enable external bus
	
	; READY# Input Enable control bit. BUSCON3.12
		; 0 = Disabled (Reset value)
				; 1 = Enabled

	; Read Chip Select (CSREN3) enable bit. BUSCON3.14
		; 0 = Chip select independend of read command
				; 1 = Chip select for duration of read command

	; Write Chip Select (CSWEN3) enable bit. BUSCON3.15
		; 0 = Chip select independend of write command
				; 1 = Chip select for duration of write command

	; Process BUSCON3 low byte and high byte values
	BUSC3		EQU	((00h<<15) | (00h<<14) | (00h<<12) | (0<<10) | (00h<<9) | (01h<<6) | (00h<<5) | (01h<<4) | ((~01h)&000Fh))

	; Value definitions for System Configuration Register : BUSCON4

	; Memory Cycle Time is extended by a number of additional State Times.
	; in a range from 0 through 15. BUSCON4[3..0]
				; Reset value MCTC = 15 additional state times

		; 1 = Memory wait states is 1 (MCTC = 0EH).
				; 0 = Memory wait states is 0 (MCTC = 0FH).

	; The Read/Write Signal Delay is 0.5 or 0 State Times. BUSCON4.4
		; 1 = No Delay Time
				; 0 = Delay Time (Reset value)

	; Memory Tri-state is extended by either 1 or 0 State Times. BUSCON4.5
		; 0 = Delay Time (Reset value)
				; 1 = No Delay Time

	; External bus configurations. BUSCON4[7..6]
		; 0 = 8-bit Demultiplexed Bus
				; 1 = 8-bit Multiplexed Bus
				; 2 = 16-bit Demultiplexed Bus
				; 3 = 16-bit Multiplexed Bus

	; ALE Signal is lengthened by either 1 or 0 State Times. BUSCON4.9
	; Do not disable the ALE lengthening option for a multiplexed bus
	; configuration. See problem 17 in errata sheet SAB-C167A-LM,ES-AC,1.1
	; on page 4/9.

		; 0 = No Delay (Reset value if EA# pin is high
				; 1 = Delay (Reset value if EA# pin is high

	; Bus Active (BUSACT4) control bit. BUSCON4.10
				; 1 = Enable external bus
	
	; READY# Input Enable control bit. BUSCON4.12
		; 0 = Disabled (Reset value)
				; 1 = Enabled

	; Read Chip Select (CSREN4) enable bit. BUSCON4.14
		; 0 = Chip select independend of read command
				; 1 = Chip select for duration of read command

	; Write Chip Select (CSWEN4) enable bit. BUSCON4.15
		; 0 = Chip select independend of write command
				; 1 = Chip select for duration of write command

	; Process BUSCON4 low byte and high byte values
	BUSC4		EQU	((00h<<15) | (00h<<14) | (00h<<12) | (0<<10) | (00h<<9) | (01h<<6) | (00h<<5) | (01h<<4) | ((~01h)&000Fh))

	; Value definitions for System Configuration Register : ADDRSEL1

	; Range Size Selection (RGSZ1) field. ADDRSEL1[0..3]
		; 0 = 4 KB Window
				; 1 = 8 KB Window
				; 2 = 16 KB Window
				; 3 = 32 KB Window
				; 4 = 64 KB Window
				; 5 = 128 KB Window
				; 6 = 256 KB Window
				; 7 = 512 KB Window
				; 8 = 1 MB Window
				; 9 = 2 MB Window
				; 10 = 4 MB Window
				; 11 = 8 MB Window

	; Range Start Address (RGSAD1) field. ADDRSEL1[4..15]
		; Defines upper bits of start address


	; Process ADDRSEL1
	ADRS1		EQU	(((0100000h&0FFFh)<<4) | 08h)

	; Value definitions for System Configuration Register : ADDRSEL2

	; Range Size Selection (RGSZ2) field. ADDRSEL2[0..3]
		; 0 = 4 KB Window
				; 1 = 8 KB Window
				; 2 = 16 KB Window
				; 3 = 32 KB Window
				; 4 = 64 KB Window
				; 5 = 128 KB Window
				; 6 = 256 KB Window
				; 7 = 512 KB Window
				; 8 = 1 MB Window
				; 9 = 2 MB Window
				; 10 = 4 MB Window
				; 11 = 8 MB Window

	; Range Start Address (RGSAD2) field. ADDRSEL2[4..15]
		; Defines upper bits of start address


	; Process ADDRSEL2
	ADRS2		EQU	(((0200000h&0FFFh)<<4) | 08h)

	; Value definitions for System Configuration Register : ADDRSEL3

	; Range Size Selection (RGSZ3) field. ADDRSEL3[0..3]
		; 0 = 4 KB Window
				; 1 = 8 KB Window
				; 2 = 16 KB Window
				; 3 = 32 KB Window
				; 4 = 64 KB Window
				; 5 = 128 KB Window
				; 6 = 256 KB Window
				; 7 = 512 KB Window
				; 8 = 1 MB Window
				; 9 = 2 MB Window
				; 10 = 4 MB Window
				; 11 = 8 MB Window

	; Range Start Address (RGSAD3) field. ADDRSEL3[4..15]
		; Defines upper bits of start address


	; Process ADDRSEL3
	ADRS3		EQU	(((0300000h&0FFFh)<<4) | 08h)

	; Value definitions for System Configuration Register : ADDRSEL4

	; Range Size Selection (RGSZ4) field. ADDRSEL4[0..3]
		; 0 = 4 KB Window
				; 1 = 8 KB Window
				; 2 = 16 KB Window
				; 3 = 32 KB Window
				; 4 = 64 KB Window
				; 5 = 128 KB Window
				; 6 = 256 KB Window
				; 7 = 512 KB Window
				; 8 = 1 MB Window
				; 9 = 2 MB Window
				; 10 = 4 MB Window
				; 11 = 8 MB Window

	; Range Start Address (RGSAD4) field. ADDRSEL4[4..15]
		; Defines upper bits of start address


	; Process ADDRSEL4
	ADRS4		EQU	(((0400000h&0FFFh)<<4) | 08h)

	; Symbols __EVA_SYSCON and __EVA_MEMSZ should be defined when the 
	; XVW166 debugger uses the EVA167 target board as its execution
	; environment.
	; They let the debugger configure the target environment correctly 
	; before the boot program downloads the monitor program MON167.
	; 
	__MEMSZ		LIT	'0'	; EVA167 Memory configuration
					; 0 =  1 MBit RAM (Reset value)
					; 1 =  2 MBit RAM
					; 2 =  4 MBit RAM

	__EVA_SYSCON	EQU	((SYSC_H << 8) | SYSC_L)
	__EVA_MEMSZ	EQU	__MEMSZ
	PUBLIC	__EVA_SYSCON,__EVA_MEMSZ


;*****************************************************************************
;* __CSTART
;*****************************************************************************
__CSTART_PR	SECTION CODE WORD PUBLIC 'CPROGRAM'
__CSTART 	PROC TASK __CSTART_TASK INTNO __CSTART_INUM = 00H

	


	
	DISWDT
	MOV ADDRSEL1,#0404h
	MOV BUSCON0,#04AFh
	MOV BUSCON1,#04AFh
			


	MOV	STKOV,	#?SYSSTACK_BOTTOM + 6*2	; Set stack underflow pointer.
	MOV	STKUN,	#?SYSSTACK_TOP		; Set stack overflow pointer.
	MOV	SP,	#?SYSSTACK_TOP		; Set stack pointer.

	MOV	CP, 	#RBANK		; Set context pointer.
	NOP			
	MOV	R0, #BOTTOM_BITRAM	; Set R0	



	EINIT				; End of initialization
	MOV     DP2,#0FFFFH
	MOV     P2,#01H
	

; start of init function
	mov	R1, #SOF RETURN_LBL_000
	mov	[-R0], R1
	mov	R1, #SEG RETURN_LBL_000
	mov	[-R0], R1
	jmps	SEG __C_INIT, SOF __C_INIT
RETURN_LBL_000:		
; end of init function
	
  	MOV     P2,#03H
	MOV	R0, #POF ?USRSTACK_TOP	; set user stack pointer
	BSET	R0.0EH			; User stack uses DPP1
	MOV     P2,#04H
  
	MOV     P2,#05H
          BSET    IEN                     ; allow monitor to break application
  
 
        MOV     R12, #0                 ; set argc to 0
        MOV     R13, #0                 ;
        MOV     R14, #0                 ; set argv[] to 0
	MOV     P2,#06H



	mov	R1, #SOF RETURN_LBL_001
	mov	[-R0], R1
	mov	R1, #SEG RETURN_LBL_001
	mov	[-R0], R1
	jmps	SEG _main, SOF _main
RETURN_LBL_001:
								
; The exit() function causes normal program termination to occur. First, all 
; functions registered by the atexit() function are called in the reverse 
; order. Next, all open streams with unwritten buffered data are flushed, all 
; open streams are closed and all files created by the tmpfile() function are 
; removed. The status value passed to exit is returned in R4.
__EXIT: LABEL FAR			; the exit() or abort() function jumps
					; to this entry.


__IDLE: IDLE				; Power down CPU until peripheral inter-
					; rupt or external interrupt occurs.
	JMPR	CC_UC, __IDLE		; set idle mode again.
	RETV				; Virtual return.
__CSTART	ENDP
__CSTART_PR	ENDS


C166_US	SECTION	DATA WORD GLBUSRSTACK 'CUSTACK'

  	DS	2+4		; Allocate a user stack of at least 2 bytes +
				; return label main (__MAIN_RET).
  

C166_US	ENDS

C166_DGROUP	DGROUP	__DUMMY
__DUMMY	SECTION DATA WORD PUBLIC 'CNEAR'
__DUMMY	ENDS


RBANK	REGDEF R0-R15			; Register usage
	SSKDEF	0; System stack size
	
	END


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