start.src

uc/os在c167上的移植代码

#line 1 "d:\c166\lib\src\start.asm"
; @(#)start.asm	1.2	98/04/15
;*****************************************************************************
;*
;* MODULE	: start.asm
;*
;* DESCRIPTION	: Generic C startup code for the entire C166 family
;*
;*	- Include cstartx.asm for CPU's based on 'extended architecture'
;*	  (e.g. C161x, C163, C164xx, C165, C167xx, ST10-262).
;*	  This is the default behavior.
;*	- Include cstart.asm for non-extended CPU's (e.g. SAB 80C166, GOLD).
;*	- Macros can be set on the command line of the macro pre-processor,
;*	  using the DEFINE() control. Syntax:  DEF( macro [, replacement] )
;*	  Example:			       
;*		m166 cstart.asm DEF(MODEL,LARGE) DEF(_CPU,161O) DEF(_EXT,1)
;*
;* NOTE		: When using EDE all the macros are automatically set by
;*		  the Project Options... dialog from the EDE menu.
;*
;* COPYRIGHTS	: 1997 TASKING, Inc.
;*
;*****************************************************************************

$CASE
$GENONLY
$DEBUG
$NOLOCALS





				; get the maximum performance.

				; 'abort()' is used.

				; used.

				; startup, set to 1 if "bit b = 1;" is used.

		; set to 1 for multiplexed bus.



;*****************************************************************************
;*
;* MODULE	: cstartx.asm
;*
;* DESCRIPTION	: C startup code for extended C166 architecture CPU's
;*		  (e.g. C161x, C163, C164xx, C165, C167xx, ST10-262).
;*
;*		- Processor initialization.
;*		- Initialization of static variables in internal or external
;*		  ram is done in '_c_init.asm'.
;*		- Call the user program: main().
;*		- On exit cpu is set in idle mode.
;*
;* COPYRIGHTS	: 1998 TASKING, Inc.
;*
;*****************************************************************************

$CHECKCPU16
$NOMOD166			; disable the internal set of SAB 80C166 SFRs
$STDNAMES(reg167.def)		; use extended set of SFR's (BUSCON0 etc.)

;***************************************************************************** 
;*
;* MODULE	: head.asm
;*
;* APPLICATION	: run time library C16x/ST10
;*
;* DESCRIPTION  : This header file is included in every runtime library module.
;*
;*  - Set default value of macros (when not defined on the command-line/EDE):
;*    _EXT, _USRSTACK, _SINGLE_FP, MODEL, FIX_BFWD, FIX_MULDIV
;*  - Check macro values and activate the corresponding assembler controls
;*  - Define the _CALL and _RET macros for the User Stack Model
;*
;*
;* COPYRIGHTS	: 1997 TASKING, Inc.
;*
;***************************************************************************** 










		; 1 for fixing the Byte forwarding problem


;
; Check macros and perform appropriate action
;

$EXTEND				; enable all architecture extensions








$MODEL(large)
$SEGMENTED



; When FIX_MULDIV is defined to "ILVL" the protection is not done by BCLR IEN
; but by BFLDH PSW, #0F0h, #0F0h.  Note that not all modules support this.
; Make sure that this macro is always defined by the following lines.
	



; The macro _BFWDNOP() expands to a NOP instruction when FIX_BFWD 
; is set to 1. This is used for a software bypass for the Erroneous Byte 
; Forwarding problem of older steps of the CPU. 




; Macro _CALL() creates the code for a direct/indirect function call
; Macro _RET() creates the code for function return.
; These macro's are added to support user stack function call and return.
; User stack code is generated if variable _USRSTACK is set, else a normal
; function call and return (CALL/RET) are generated.
; Rx is a temporary register. Most run-time routines use R2 for it.
; Register R2 is used in the return stub function and in the return macro for
; tiny and medium model, so operands may not be passed via register R2 ! R2 is
; free for use if _USRSTACK option is enabled in the C-compiler.






;*****************************************************************************
;*
;* MODULE	: _c_init.asm
;*
;* DESCRIPTION	: C copy table code for C16x/ST10 microcontroller.
;*
;*		- Initialization of static variables in internal or external
;*		  ram. C variables which have to be initialized are specified
;*		  in ROM section C166_INIT. C variables which must
;*		  be cleared are specified in ROM section C166_BSS.
;*		- Set user stack pointer.
;*
;* COPYRIGHTS	: 1997 TASKING, Inc.
;*
;*****************************************************************************

	ASSUME	DPP3:SYSTEM	; assume system data page pointer.

  	ASSUME	DPP2:?FPSTKUN
	ASSUME	DPP2:?FPSP
  



PUBLIC __C_INIT
						
	; Predefined functions for register R1, R2 and R3.
	POF_RAM		LIT	'R1'	; Page offset address ram data.
	SOF_RAM		LIT	'R1'	; Segment offset address ram data.
	SOF_RAM_H	LIT	'RH1'	; Segment address high byte.
	POF_ROM		LIT	'R2'	; Page offset address rom data.
	SOF_ROM		LIT	'R2'	; Segment offset address rom data.
	SOF_ROM_H	LIT	'RH2'	; Segment address high byte.
	BP_RAM		LIT	'R3'	; Bit position ram data

	EXTERN RBANK:REGBANK
;*****************************************************************************
;* __C_INIT
;*****************************************************************************
__C_INIT_PR	SECTION CODE PUBLIC 'C_INIT'

__C_INIT	PROC FAR
		
	BOTTOM_BITRAM	LIT  '0FD4CH'	; 0FD00H - 0FD4BH is monitor data area

					; Clear bit addressable memory
	MOV	R1, #0FDFEH		; R1 = top of bit addressable area
loop:	CMP	R1, #RBANK		; if( R1 in bit addressable area )
	JMP	CC_EQ, cbclr		; then continue next (bit) word clear.
	MOV	[R1], zeros		; clear
cbclr:	CMPD2	R1, # BOTTOM_BITRAM	; if( not bottom bit addressable area )
	JMP	CC_NE, loop		; then continue next (bit) word clear


; The following code is needed for initialization of static variables

					 ; C166_INIT
	MOV	R4,  #POF ?C166_INIT_HEAD ; move intra-page offset address rom
					 ; data section C166_INIT to R4
INIT_DPP0:				 ;
	MOV	DPP0,#PAG ?C166_INIT_HEAD ; load data page pointer register DPP0
					 ; with data page of rom data C166_INIT
	NOP				 ; delay for pipeline effect


		
INIT:					;
	MOV	R5, [R4+]		; INIT block header code -> R5
	CMP	R5, #01H		; check if header code 1 (bit)
	JMP	CC_EQ, INIT_01		;


	CMP	R5, #06H		; check if header code 6 (far)
	JMP	CC_EQ, INIT_06		;
	CMP	R5, #07H		; check if header code 7 (huge)
	JMP	CC_NE, INIT_END		; if(no header code) end initialization

INIT_07:				; initialize huge ram data. (data > 64K)
	MOV	SOF_RAM, [R4+]		; move intra-segment offset address ram
					; data block to SOF_RAM=R1
	MOV	R3, [R4+]		; move segment address ram data block 
					; to register R3
					; process data page number ram data
	MOV	RH3, SOF_RAM_H		; R3.15, R3.14: low bits of page number

	ROL	R3, #2			; shift R3.15, R3.14 to R3.1 and R3.0
	AND	R3, #03FFH		; mask page number
	MOV	DPP1, R3		; load data page pointer register DPP1
					; with data page of ram data block
	BFLDH	SOF_RAM, #0C0H, #040H	; DPP1:POF_RAM ->SOF_RAM=R1
					;
	MOV	SOF_ROM, [R4+]		; move intra-segment offset address rom
					; data block to SOF_ROM=R2
	MOV	R3, [R4+]		; move segment address rom data block
					; to R3
					; process data page number rom data
	MOV	RH3, SOF_ROM_H		; R3.15, R3.14=low bits of page number

	ROL	R3, #2			; shift R3.15, R3.14 to R3.1 and R3.0
	AND	R3, #03FFH		; mask page number
	MOV	DPP2, R3		; load data page pointer register DPP2
					; with data page of rom data block
	BFLDH	SOF_ROM, #0C0H, #080H	; DPP2:POF_ROM ->SOF_ROM=R2
					;
	MOV	R5, [R4+]		; number of bytes (R6:R5) to move from
	MOV	R6, [R4+]		; rom to ram. MSW=R6, LSW=R5 (long word)
					;
MB07_3:	CMPD1	R5, #0			; test if all bytes are moved and
	JMP	CC_NE, MB07_1 		; decrement number of bytes to move.
	CMPD1	R6, #0			;
  	JMP	CC_EQ, INIT		; if( block end ) next initialization
  
MB07_1:	MOVB	[SOF_RAM], [SOF_ROM]	; move byte from rom to ram
	CMPI1	SOF_RAM, #07FFFH	; test end of data page and inc SOF_RAM
	JMP	CC_NE, MB07_2		; if(no page end) cont init current page
	MOV	SOF_RAM, #04000H	; preset offset address ram data
	ADD	DPP1, #1		; next page of ram data; increment DPP1
MB07_2:	CMPI1	SOF_ROM, #0BFFFH	; test end of page and inc SOF_ROM
	JMP	CC_NE, MB07_3		; if(no page end) cont init current page
	MOV	SOF_ROM, #08000H	; preset offset address rom data
	ADD	DPP2, #1		; next page of rom data; increment DPP2
	JMP	CC_UC, MB07_3		; jump for next byte move
  

INIT_06:				; initialize far ram data. (CPU mode 
					; is segmented with DPP usage linear
					; or paged.)
	MOV	POF_RAM, [R4+]		; move intra-page offset address ram
					; data block to POF_RAM=R1
	BFLDH	SOF_RAM, #0C0H, #040H	; DPP1:POF_RAM ->SOF_RAM=R1
	MOV	DPP1, [R4]		; load data page pointer register DPP1
					; with data page of ram data block
	ADD	R4, #2			; inc offset address to ram data section
					; C166_INIT and also insure a delay for
					; pipeline effect.(DPP1 set)
					;
	MOV	POF_ROM, [R4+]		; move intra-page offset address rom
					; data block to POF_ROM=R2
	BFLDH	SOF_ROM, #0C0H, #080H	; DPP2:POF_ROM ->SOF_ROM=R2
	MOV	DPP2, [R4]		; load data page pointer register DPP2
					; with data page of rom data block
	ADD	R4, #2			; inc offset address to rom data section
					; C166_INIT and also insure a delay for
					; pipeline effect.(DPP2 set)
					;
	MOV	R5, [R4+]		; number of bytes to move from rom to
					; ram for specified data block.
					;
MB06_1:	CMPD1	R5, #0			; test on data block end
  	JMP	CC_EQ, INIT		; if( block end ) next initialization
	MOVB	[SOF_RAM], [SOF_ROM+]	; move byte from rom to ram, inc SOF_ROM
	ADD	SOF_RAM, #1		; inc SOF_RAM
	JMP	CC_UC, MB06_1		; jump for next byte move
  




; NO BIT INITIALIZATION
					;
INIT_01:
	ADD	R4,#0CH			; skip DBPTR, DPTR and DW
	JMP	CC_UC, INIT		; continue with next initialization

INIT_END:				;


					; C166_BSS
	MOV	R4, #POF ?C166_BSS_HEAD	; move intra-page offset address rom
					; data section C166_BSS to R4
BSS_DPP0:				;
	MOV	DPP0,#PAG ?C166_BSS_HEAD ; load data page pointer register DPP0
					; with data page of rom data C166_BSS
	NOP				; delay for pipeline effect


BSS:					;
	MOV	R5, [R4+]		; BSS block header code -> R5

	CMP	R5, #06H		; check if header code 6 (far)
	JMP	CC_EQ, BSS_06		;
	CMP	R5, #07H		; check if header code 7 (huge)
	JMP	CC_NE, BSS_END		; if(no header code) end initialization

BSS_07:					; clear huge ram data (data > 64 K)
	MOV	SOF_RAM, [R4+]		; move intra-segment offset address ram
					; data block to SOF_RAM=R1
	MOV	R3, [R4+]		; move segment address ram data block
					; to R3
					; process data page number ram data 
	MOV	RH3, SOF_RAM_H		; R3.15, R3.14=low bits of page number

	ROL	R3, #2			; shift R3.15, R3.14 to R3.1 and R3.0
	AND	R3, #03FFH		; mask page number
	MOV	DPP1, R3		; load data page pointer register DPP1
					; with data page of ram data block
	BFLDH	SOF_RAM, #0C0H, #040H	; DPP1:POF_RAM ->SOF_RAM=R1
					;
	MOV	R5, [R4+]		; number of bytes (R6:R5) to clear in