start.lst

uc/os在c167上的移植代码

                   716                   ; 0 = Chip select independend of write command
                   717                                   ; 1 = Chip select for duration of write command
                   718   
                   719           ; Process BUSCON2 low byte and high byte values
                   720           BUSC2           EQU     ((00h<<15) | (00h<<14) | (00h<<12) | (0<<10) | (00h<<9) | (01h<<6) | (00h<<
                         5) | (01h<<4) | ((~01h)&000Fh))
                   721   
                   722           ; Value definitions for System Configuration Register : BUSCON3
                   723   
                   724           ; Memory Cycle Time is extended by a number of additional State Times.
                   725           ; in a range from 0 through 15. BUSCON3[3..0]
                   726                                   ; Reset value MCTC = 15 additional state times
                   727   
                   728                   ; 1 = Memory wait states is 1 (MCTC = 0EH).
                   729                                   ; 0 = Memory wait states is 0 (MCTC = 0FH).
                   730   
                   731           ; The Read/Write Signal Delay is 0.5 or 0 State Times. BUSCON3.4
                   732                   ; 1 = No Delay Time
                   733                                   ; 0 = Delay Time (Reset value)
                   734   
                   735           ; Memory Tri-state is extended by either 1 or 0 State Times. BUSCON3.5
                   736                   ; 0 = Delay Time (Reset value)
                   737                                   ; 1 = No Delay Time
                   738   
                   739           ; External bus configurations. BUSCON3[7..6]
                   740                   ; 0 = 8-bit Demultiplexed Bus
                   741                                   ; 1 = 8-bit Multiplexed Bus
                   742                                   ; 2 = 16-bit Demultiplexed Bus
                   743                                   ; 3 = 16-bit Multiplexed Bus
                   744   
                   745           ; ALE Signal is lengthened by either 1 or 0 State Times. BUSCON3.9
                   746   
                   747                   ; 0 = No Delay (Reset value if EA# pin is high
                   748                                   ; 1 = Delay (Reset value if EA# pin is high
                   749   
                   750           ; Bus Active (BUSACT3) control bit. BUSCON3.10
                   751                                   ; 1 = Enable external bus
                   752           
                   753           ; READY# Input Enable control bit. BUSCON3.12
                   754                   ; 0 = Disabled (Reset value)
                   755                                   ; 1 = Enabled
                   756   
                   757           ; Read Chip Select (CSREN3) enable bit. BUSCON3.14
                   758                   ; 0 = Chip select independend of read command
                   759                                   ; 1 = Chip select for duration of read command
                   760   
                   761           ; Write Chip Select (CSWEN3) enable bit. BUSCON3.15
                   762                   ; 0 = Chip select independend of write command
                   763                                   ; 1 = Chip select for duration of write command
                   764   
                   765           ; Process BUSCON3 low byte and high byte values
                   766           BUSC3           EQU     ((00h<<15) | (00h<<14) | (00h<<12) | (0<<10) | (00h<<9) | (01h<<6) | (00h<<
C166/ST10 assembler v6.0 r2 SN00082920-083 (c) 1998 TASKING, Inc.                       Date: Dec  5 2000  Time: 10:02:43  Page:  15
start

 LOC CODE        LINE   SOURCELINE

                         5) | (01h<<4) | ((~01h)&000Fh))
                   767   
                   768           ; Value definitions for System Configuration Register : BUSCON4
                   769   
                   770           ; Memory Cycle Time is extended by a number of additional State Times.
                   771           ; in a range from 0 through 15. BUSCON4[3..0]
                   772                                   ; Reset value MCTC = 15 additional state times
                   773   
                   774                   ; 1 = Memory wait states is 1 (MCTC = 0EH).
                   775                                   ; 0 = Memory wait states is 0 (MCTC = 0FH).
                   776   
                   777           ; The Read/Write Signal Delay is 0.5 or 0 State Times. BUSCON4.4
                   778                   ; 1 = No Delay Time
                   779                                   ; 0 = Delay Time (Reset value)
                   780   
                   781           ; Memory Tri-state is extended by either 1 or 0 State Times. BUSCON4.5
                   782                   ; 0 = Delay Time (Reset value)
                   783                                   ; 1 = No Delay Time
                   784   
                   785           ; External bus configurations. BUSCON4[7..6]
                   786                   ; 0 = 8-bit Demultiplexed Bus
                   787                                   ; 1 = 8-bit Multiplexed Bus
                   788                                   ; 2 = 16-bit Demultiplexed Bus
                   789                                   ; 3 = 16-bit Multiplexed Bus
                   790   
                   791           ; ALE Signal is lengthened by either 1 or 0 State Times. BUSCON4.9
                   792           ; Do not disable the ALE lengthening option for a multiplexed bus
                   793           ; configuration. See problem 17 in errata sheet SAB-C167A-LM,ES-AC,1.1
                   794           ; on page 4/9.
                   795   
                   796                   ; 0 = No Delay (Reset value if EA# pin is high
                   797                                   ; 1 = Delay (Reset value if EA# pin is high
                   798   
                   799           ; Bus Active (BUSACT4) control bit. BUSCON4.10
                   800                                   ; 1 = Enable external bus
                   801           
                   802           ; READY# Input Enable control bit. BUSCON4.12
                   803                   ; 0 = Disabled (Reset value)
                   804                                   ; 1 = Enabled
                   805   
                   806           ; Read Chip Select (CSREN4) enable bit. BUSCON4.14
                   807                   ; 0 = Chip select independend of read command
                   808                                   ; 1 = Chip select for duration of read command
                   809   
                   810           ; Write Chip Select (CSWEN4) enable bit. BUSCON4.15
                   811                   ; 0 = Chip select independend of write command
                   812                                   ; 1 = Chip select for duration of write command
                   813   
                   814           ; Process BUSCON4 low byte and high byte values
                   815           BUSC4           EQU     ((00h<<15) | (00h<<14) | (00h<<12) | (0<<10) | (00h<<9) | (01h<<6) | (00h<<
                         5) | (01h<<4) | ((~01h)&000Fh))
                   816   
                   817           ; Value definitions for System Configuration Register : ADDRSEL1
                   818   
                   819           ; Range Size Selection (RGSZ1) field. ADDRSEL1[0..3]
C166/ST10 assembler v6.0 r2 SN00082920-083 (c) 1998 TASKING, Inc.                       Date: Dec  5 2000  Time: 10:02:43  Page:  16
start

 LOC CODE        LINE   SOURCELINE

                   820                   ; 0 = 4 KB Window
                   821                                   ; 1 = 8 KB Window
                   822                                   ; 2 = 16 KB Window
                   823                                   ; 3 = 32 KB Window
                   824                                   ; 4 = 64 KB Window
                   825                                   ; 5 = 128 KB Window
                   826                                   ; 6 = 256 KB Window
                   827                                   ; 7 = 512 KB Window
                   828                                   ; 8 = 1 MB Window
                   829                                   ; 9 = 2 MB Window
                   830                                   ; 10 = 4 MB Window
                   831                                   ; 11 = 8 MB Window
                   832   
                   833           ; Range Start Address (RGSAD1) field. ADDRSEL1[4..15]
                   834                   ; Defines upper bits of start address
                   835   
                   836   
                   837           ; Process ADDRSEL1
                   838           ADRS1           EQU     (((0100000h&0FFFh)<<4) | 08h)
                   839   
                   840           ; Value definitions for System Configuration Register : ADDRSEL2
                   841   
                   842           ; Range Size Selection (RGSZ2) field. ADDRSEL2[0..3]
                   843                   ; 0 = 4 KB Window
                   844                                   ; 1 = 8 KB Window
                   845                                   ; 2 = 16 KB Window
                   846                                   ; 3 = 32 KB Window
                   847                                   ; 4 = 64 KB Window
                   848                                   ; 5 = 128 KB Window
                   849                                   ; 6 = 256 KB Window
                   850                                   ; 7 = 512 KB Window
                   851                                   ; 8 = 1 MB Window
                   852                                   ; 9 = 2 MB Window
                   853                                   ; 10 = 4 MB Window
                   854                                   ; 11 = 8 MB Window
                   855   
                   856           ; Range Start Address (RGSAD2) field. ADDRSEL2[4..15]
                   857                   ; Defines upper bits of start address
                   858   
                   859   
                   860           ; Process ADDRSEL2
                   861           ADRS2           EQU     (((0200000h&0FFFh)<<4) | 08h)
                   862   
                   863           ; Value definitions for System Configuration Register : ADDRSEL3
                   864   
                   865           ; Range Size Selection (RGSZ3) field. ADDRSEL3[0..3]
                   866                   ; 0 = 4 KB Window
                   867                                   ; 1 = 8 KB Window
                   868                                   ; 2 = 16 KB Window
                   869                                   ; 3 = 32 KB Window
                   870                                   ; 4 = 64 KB Window
                   871                                   ; 5 = 128 KB Window
                   872                                   ; 6 = 256 KB Window
                   873                                   ; 7 = 512 KB Window
                   874                                   ; 8 = 1 MB Window
C166/ST10 assembler v6.0 r2 SN00082920-083 (c) 1998 TASKING, Inc.                       Date: Dec  5 2000  Time: 10:02:43  Page:  17
start

 LOC CODE        LINE   SOURCELINE

                   875                                   ; 9 = 2 MB Window
                   876                                   ; 10 = 4 MB Window
                   877                                   ; 11 = 8 MB Window
                   878   
                   879           ; Range Start Address (RGSAD3) field. ADDRSEL3[4..15]
                   880                   ; Defines upper bits of start address
                   881   
                   882   
                   883           ; Process ADDRSEL3
                   884           ADRS3           EQU     (((0300000h&0FFFh)<<4) | 08h)
                   885   
                   886           ; Value definitions for System Configuration Register : ADDRSEL4
                   887   
                   888           ; Range Size Selection (RGSZ4) field. ADDRSEL4[0..3]
                   889                   ; 0 = 4 KB Window
                   890                                   ; 1 = 8 KB Window
                   891                                   ; 2 = 16 KB Window
                   892                                   ; 3 = 32 KB Window
                   893