📄 start.lst
字号:
177
178 EXTERN RBANK:REGBANK
179 ;*****************************************************************************
180 ;* __C_INIT
181 ;*****************************************************************************
182 __C_INIT_PR SECTION CODE PUBLIC 'C_INIT'
183
184 __C_INIT PROC FAR
185
186 BOTTOM_BITRAM LIT '0FD4CH' ; 0FD00H - 0FD4BH is monitor data area
187
188 ; Clear bit addressable memory
0000 E6F1FEFD 189 MOV R1, #0FDFEH ; R1 = top of bit addressable area
0004 46F101C0 R 190 loop: CMP R1, #RBANK ; if( R1 in bit addressable area )
0008 2D02 191 JMP CC_EQ, cbclr ; then continue next (bit) word clear.
000A 84011CFF 192 MOV [R1], zeros ; clear
000E B6F14CFD 193 cbclr: CMPD2 R1, # BOTTOM_BITRAM ; if( not bottom bit addressable area )
0012 3DF8 194 JMP CC_NE, loop ; then continue next (bit) word clear
195
196
197 ; The following code is needed for initialization of static variables
198
199 ; C166_INIT
0014 E6F40000 R 200 MOV R4, #POF ?C166_INIT_HEAD ; move intra-page offset address rom
201 ; data section C166_INIT to R4
0018 202 INIT_DPP0: ;
0018 E6000000 R 203 MOV DPP0,#PAG ?C166_INIT_HEAD ; load data page pointer register DPP0
204 ; with data page of rom data C166_INIT
001C CC00 205 NOP ; delay for pipeline effect
206
207
208
001E 209 INIT: ;
001E 9854 210 MOV R5, [R4+] ; INIT block header code -> R5
0020 4851 211 CMP R5, #01H ; check if header code 1 (bit)
0022 2D40 212 JMP CC_EQ, INIT_01 ;
213
214
0024 4856 215 CMP R5, #06H ; check if header code 6 (far)
0026 2D2C 216 JMP CC_EQ, INIT_06 ;
0028 4857 217 CMP R5, #07H ; check if header code 7 (huge)
002A 3D3F 218 JMP CC_NE, INIT_END ; if(no header code) end initialization
219
C166/ST10 assembler v6.0 r2 SN00082920-083 (c) 1998 TASKING, Inc. Date: Dec 5 2000 Time: 10:02:43 Page: 5
start
LOC CODE LINE SOURCELINE
002C 220 INIT_07: ; initialize huge ram data. (data > 64K)
002C 9814 221 MOV SOF_RAM, [R4+] ; move intra-segment offset address ram
222 ; data block to SOF_RAM=R1
002E 9834 223 MOV R3, [R4+] ; move segment address ram data block
224 ; to register R3
225 ; process data page number ram data
0030 F173 226 MOV RH3, SOF_RAM_H ; R3.15, R3.14: low bits of page number
227
0032 1C23 228 ROL R3, #2 ; shift R3.15, R3.14 to R3.1 and R3.0
0034 66F3FF03 229 AND R3, #03FFH ; mask page number
0038 F6F302FE 230 MOV DPP1, R3 ; load data page pointer register DPP1
231 ; with data page of ram data block
003C 1AF140C0 232 BFLDH SOF_RAM, #0C0H, #040H ; DPP1:POF_RAM ->SOF_RAM=R1
233 ;
0040 9824 234 MOV SOF_ROM, [R4+] ; move intra-segment offset address rom
235 ; data block to SOF_ROM=R2
0042 9834 236 MOV R3, [R4+] ; move segment address rom data block
237 ; to R3
238 ; process data page number rom data
0044 F175 239 MOV RH3, SOF_ROM_H ; R3.15, R3.14=low bits of page number
240
0046 1C23 241 ROL R3, #2 ; shift R3.15, R3.14 to R3.1 and R3.0
0048 66F3FF03 242 AND R3, #03FFH ; mask page number
004C F6F304FE 243 MOV DPP2, R3 ; load data page pointer register DPP2
244 ; with data page of rom data block
0050 1AF280C0 245 BFLDH SOF_ROM, #0C0H, #080H ; DPP2:POF_ROM ->SOF_ROM=R2
246 ;
0054 9854 247 MOV R5, [R4+] ; number of bytes (R6:R5) to move from
0056 9864 248 MOV R6, [R4+] ; rom to ram. MSW=R6, LSW=R5 (long word)
249 ;
0058 A005 250 MB07_3: CMPD1 R5, #0 ; test if all bytes are moved and
005A 3D02 251 JMP CC_NE, MB07_1 ; decrement number of bytes to move.
005C A006 252 CMPD1 R6, #0 ;
005E 2DDF 253 JMP CC_EQ, INIT ; if( block end ) next initialization
254
0060 C912 255 MB07_1: MOVB [SOF_RAM], [SOF_ROM] ; move byte from rom to ram
0062 86F1FF7F 256 CMPI1 SOF_RAM, #07FFFH ; test end of data page and inc SOF_RAM
0066 3D04 257 JMP CC_NE, MB07_2 ; if(no page end) cont init current page
0068 E6F10040 258 MOV SOF_RAM, #04000H ; preset offset address ram data
006C 06010100 259 ADD DPP1, #1 ; next page of ram data; increment DPP1
0070 86F2FFBF 260 MB07_2: CMPI1 SOF_ROM, #0BFFFH ; test end of page and inc SOF_ROM
0074 3DF1 261 JMP CC_NE, MB07_3 ; if(no page end) cont init current page
0076 E6F20080 262 MOV SOF_ROM, #08000H ; preset offset address rom data
007A 06020100 263 ADD DPP2, #1 ; next page of rom data; increment DPP2
007E 0DEC 264 JMP CC_UC, MB07_3 ; jump for next byte move
265
266
0080 267 INIT_06: ; initialize far ram data. (CPU mode
268 ; is segmented with DPP usage linear
269 ; or paged.)
0080 9814 270 MOV POF_RAM, [R4+] ; move intra-page offset address ram
271 ; data block to POF_RAM=R1
0082 1AF140C0 272 BFLDH SOF_RAM, #0C0H, #040H ; DPP1:POF_RAM ->SOF_RAM=R1
0086 940402FE 273 MOV DPP1, [R4] ; load data page pointer register DPP1
274 ; with data page of ram data block
C166/ST10 assembler v6.0 r2 SN00082920-083 (c) 1998 TASKING, Inc. Date: Dec 5 2000 Time: 10:02:43 Page: 6
start
LOC CODE LINE SOURCELINE
008A 0842 275 ADD R4, #2 ; inc offset address to ram data section
276 ; C166_INIT and also insure a delay for
277 ; pipeline effect.(DPP1 set)
278 ;
008C 9824 279 MOV POF_ROM, [R4+] ; move intra-page offset address rom
280 ; data block to POF_ROM=R2
008E 1AF280C0 281 BFLDH SOF_ROM, #0C0H, #080H ; DPP2:POF_ROM ->SOF_ROM=R2
0092 940404FE 282 MOV DPP2, [R4] ; load data page pointer register DPP2
283 ; with data page of rom data block
0096 0842 284 ADD R4, #2 ; inc offset address to rom data section
285 ; C166_INIT and also insure a delay for
286 ; pipeline effect.(DPP2 set)
287 ;
0098 9854 288 MOV R5, [R4+] ; number of bytes to move from rom to
289 ; ram for specified data block.
290 ;
009A A005 291 MB06_1: CMPD1 R5, #0 ; test on data block end
009C 2DC0 292 JMP CC_EQ, INIT ; if( block end ) next initialization
009E E912 293 MOVB [SOF_RAM], [SOF_ROM+] ; move byte from rom to ram, inc SOF_ROM
00A0 0811 294 ADD SOF_RAM, #1 ; inc SOF_RAM
00A2 0DFB 295 JMP CC_UC, MB06_1 ; jump for next byte move
296
297
298
299
300
301 ; NO BIT INITIALIZATION
302 ;
00A4 303 INIT_01:
00A4 06F40C00 304 ADD R4,#0CH ; skip DBPTR, DPTR and DW
00A8 0DBA 305 JMP CC_UC, INIT ; continue with next initialization
306
00AA 307 INIT_END: ;
308
309
310 ; C166_BSS
00AA E6F40000 R 311 MOV R4, #POF ?C166_BSS_HEAD ; move intra-page offset address rom
312 ; data section C166_BSS to R4
00AE 313 BSS_DPP0: ;
00AE E6000000 R 314 MOV DPP0,#PAG ?C166_BSS_HEAD ; load data page pointer register DPP0
315 ; with data page of rom data C166_BSS
00B2 CC00 316 NOP ; delay for pipeline effect
317
318
00B4 319 BSS: ;
00B4 9854 320 MOV R5, [R4+] ; BSS block header code -> R5
321
00B6 4856 322 CMP R5, #06H ; check if header code 6 (far)
00B8 2D1C 323 JMP CC_EQ, BSS_06 ;
00BA 4857 324 CMP R5, #07H ; check if header code 7 (huge)
00BC 3D27 325 JMP CC_NE, BSS_END ; if(no header code) end initialization
326
00BE 327 BSS_07: ; clear huge ram data (data > 64 K)
00BE 9814 328 MOV SOF_RAM, [R4+] ; move intra-segment offset address ram
329 ; data block to SOF_RAM=R1
C166/ST10 assembler v6.0 r2 SN00082920-083 (c) 1998 TASKING, Inc. Date: Dec 5 2000 Time: 10:02:43 Page: 7
start
LOC CODE LINE SOURCELINE
00C0 9834 330 MOV R3, [R4+] ; move segment address ram data block
331 ; to R3
332 ; process data page number ram data
00C2 F173 333 MOV RH3, SOF_RAM_H ; R3.15, R3.14=low bits of page number
334
00C4 1C23 335 ROL R3, #2 ; shift R3.15, R3.14 to R3.1 and R3.0
00C6 66F3FF03 336 AND R3, #03FFH ; mask page number
00CA F6F302FE 337 MOV DPP1, R3 ; load data page pointer register DPP1
338 ; with data page of ram data block
00CE 1AF140C0 339 BFLDH SOF_RAM, #0C0H, #040H ; DPP1:POF_RAM ->SOF_RAM=R1
340 ;
00D2 9854 341 MOV R5, [R4+] ; number of bytes (R6:R5) to clear in
00D4 9864 342 MOV R6, [R4+] ; specified ram data block.
343 ; MSW=R6, LSW=R5 (long word)
344 ;
00D6 A005 345 CB07_2: CMPD1 R5, #0 ; test if all bytes are cleared and
00D8 3D02 346 JMP CC_NE, CB07_1 ; decrement number of bytes to clear.
00DA A006 347 CMPD1 R6, #0 ;
00DC 2DEB 348 JMP CC_EQ, BSS ; if( block end ) next initialization
349
00DE A4011CFF 350 CB07_1: MOVB [SOF_RAM], ZEROS ; clear byte
00E2 86F1FF7F 351 CMPI1 SOF_RAM, #07FFFH ; test end of data page and inc SOF_RAM
00E6 3DF7 352 JMP CC_NE, CB07_2 ; if(no page end) next byte clear
00E8 E6F10040 353 MOV SOF_RAM, #04000H ; preset offset address ram data
00EC 06010100 354 ADD DPP1, #1 ; next page ram data; increment DPP1
00F0 0DF2 355 JMP CC_UC, CB07_2 ; jump for next byte clear
356
357
00F2 358 BSS_06: ; clear far ram data. (CPU mode is
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -