fenetpq2.c

MPC8260的Fast Ethernet的例子。配置FCC为Fast Ethernet模式

         pattern = 0x01;

      BufferPool[FIRST_TX_BUF+4][index] = pattern;     
   }


   /*-----------------------------------------*/
   /* Buffer[5]: Load decreasing walking ones */
   /*-----------------------------------------*/
  
   
   for (index = 12,pattern = 0x80; index < (BUFFER_SIZE-4); index++,pattern>>=1)

   {
      if (pattern == 0x00)

         pattern = 0x80;

      BufferPool[FIRST_TX_BUF+5][index] = pattern;
   }

 
   /*--------------------------------------------*/
   /* Buffer[6]: Load "Increment from 0" pattern */
   /*--------------------------------------------*/


   for (index = 12; index < (BUFFER_SIZE-4); index++)

   {
      BufferPool[FIRST_TX_BUF+6][index] = index-2;
   }

   
   /*----------------------------------------------*/
   /* Buffer[7]: Load "Decrement from 255" pattern */
   /*----------------------------------------------*/

     
   for (index = 12; index < (BUFFER_SIZE-4); index++)

   {
      BufferPool[FIRST_TX_BUF+7][index] = (257-index);
   }


   /*-----------------------------------------------*/
   /* Load destination addresses, source addresses, */
   /* and type/length field into each Tx buffer     */
   /*-----------------------------------------------*/

   
        bufcount = 0;

        while (bufcount < 8)
        {
                BufferPool[FIRST_TX_BUF + bufcount][0]  = 0x00;
                BufferPool[FIRST_TX_BUF + bufcount][6]  = 0x00;
                BufferPool[FIRST_TX_BUF + bufcount][1]  = 0x19;
                BufferPool[FIRST_TX_BUF + bufcount][7]  = 0x19;
                BufferPool[FIRST_TX_BUF + bufcount][2]  = 0x22;
                BufferPool[FIRST_TX_BUF + bufcount][8]  = 0x22;
                BufferPool[FIRST_TX_BUF + bufcount][3]  = 0x33;
                BufferPool[FIRST_TX_BUF + bufcount][9]  = 0x33;
                BufferPool[FIRST_TX_BUF + bufcount][4]  = 0x48;
                BufferPool[FIRST_TX_BUF + bufcount][10] = 0x48; 
                BufferPool[FIRST_TX_BUF + bufcount][5]  = 0x55;
                BufferPool[FIRST_TX_BUF + bufcount][11] = 0x55;
                BufferPool[FIRST_TX_BUF + bufcount][12] = 0x00;
                BufferPool[FIRST_TX_BUF + bufcount][13] = 0xEE;
         
         bufcount++;
         
        }
                            
} /* end of LoadTxBuffers */


/*--------------------------------------------------------------------------
*
* FUNCTION NAME:  InitBDs
*
*
* DESCRIPTION:
*
*  Initializes BD rings to point RX BDs to first half of buffer pool and 
*  TX BDs to second half of buffer pool. This function also initializes the 
*  buffer descriptors control and data length fields. It also insures that 
*  transmit and recieve functions are disabled before buffer descriptors 
*  are initialized.
*
*   
* EXTERNAL EFFECTS: Disable Tx/Rx functions. Changes BDs in dual port ram.
*
* PARAMETERS: None
*
* RETURNS: None
*
*-------------------------------------------------------------------------*/

void InitBDs()

{
UHWORD index;

   /*-------------------------------------------*/
   /* Disable FCCx while we program the buffer  */
   /* descriptors and the parameter RAM.        */
   /* (Just good practice)                      */
   /*-------------------------------------------*/

   /*----------------------------------------------------------------*/
   /* Clear the ENT/ENR bits in the GFMR -- disable Transmit/Receive */
   /*----------------------------------------------------------------*/

    IMM->fcc_regs[FCCx].gfmr &= !(GFMR_ENT | GFMR_ENR);

   /*-------------------*/
   /* Initialize RxBDs. */
   /*-------------------*/

   for (index = 0; index < NUM_RXBDS; index++) 
    
   {
      /*--------------------------*/
      /* Allocate Receive Buffers */
      /*--------------------------*/

      RxTxBD->RxBD[index].bd_addr = (UBYTE *)&BufferPool[index];
      RxTxBD->RxBD[index].bd_length = 0;    /* reset */

      if( index != (NUM_RXBDS-1) )

      {
         RxTxBD->RxBD[index].bd_cstatus = 0x9000;    /* Empty */
      }

      else

      {
           /*-----------------------------------------------------*/
           /* Last RX BD. Set the Empty, Wrap, and Interrupt bits */
           /*-----------------------------------------------------*/

           RxTxBD->RxBD[index].bd_cstatus = 0xB000;  
      }
   }

   /*-------------------*/
   /* Initialize TxBDs. */
   /*-------------------*/

   for (index=0; index < NUM_TXBDS; index++) 
   
   {
      /*------------------------*/
      /* load the buffer length */
      /*------------------------*/

      RxTxBD->TxBD[index].bd_length = (BUFFER_SIZE-4); // 252 bytes 

      /*--------------------------------------------------------*/
      /* load the address of the data buffer in external memory */
      /*--------------------------------------------------------*/

      RxTxBD->TxBD[index].bd_addr = (UBYTE *)&BufferPool[FIRST_TX_BUF+index];


      if( index != (NUM_TXBDS-1) )

      {
         /*-------------------------------*/
         /* Set Ready, PAD, Last, TC bits */
         /*-------------------------------*/

         RxTxBD->TxBD[index].bd_cstatus = 0xCC00;     
      }

      else

      {
         /*-----------------------------------------*/
         /* Set Ready, PAD, Wrap, Last, and TC bits */
         /*-----------------------------------------*/

         RxTxBD->TxBD[index].bd_cstatus = 0xEC00;     
      }
   }


} /* end InitBDs */


/*--------------------------------------------------------------------------
*
* FUNCTION NAME:  InitParallelPorts
*
*
* DESCRIPTION:
*
*   Sets up the parallel I/O pins for proper operation of this mode.  Uses
*   settings generated by the PowerQUICC II PINMUX utility.  MII for 
*   external loopback uses PortC.
*
*   
* EXTERNAL EFFECTS: Initializes relevant PIO registers.
*
* PARAMETERS: None
*
* RETURNS: None
*
*-------------------------------------------------------------------------*/

void InitParallelPorts()

{

    /* Clear the Port Pin Assignment Registers */
    IMM->io_regs[PORTA].ppar = 0x00000000;
    IMM->io_regs[PORTB].ppar = 0x00000000;
    IMM->io_regs[PORTC].ppar = 0x00000000;
    IMM->io_regs[PORTD].ppar = 0x00000000;

    /* Clear the Port Data Direction Registers */
    IMM->io_regs[PORTA].pdir = 0x00000000;
    IMM->io_regs[PORTB].pdir = 0x00000000;
    IMM->io_regs[PORTC].pdir = 0x00000000;
    IMM->io_regs[PORTD].pdir = 0x00000000;

    /* Program the Port Special Options Registers */
    IMM->io_regs[PORTA].psor = 0x00000000;
	
	if (FCCx == FCC2)    
      IMM->io_regs[PORTB].psor = 0x00000004;
	else 	
      IMM->io_regs[PORTB].psor = 0x00000000;
	
    IMM->io_regs[PORTC].psor = 0x00000000;
    IMM->io_regs[PORTD].psor = 0x00000000;

    /* Program the Port Data Direction Registers */
	if (FCCx == FCC2)
	  if (Interface == RMII)  
        IMM->io_regs[PORTB].pdir = 0x00000304;
	  else
	  	IMM->io_regs[PORTB].pdir = 0x000003c5;

	if (FCCx == FCC3)
	  if (Interface == RMII)  
        IMM->io_regs[PORTB].pdir = 0x03020000;
	  else
	  	IMM->io_regs[PORTB].pdir = 0x0f030000;
	 
    IMM->io_regs[PORTC].pdir = MDC_PIN_MASK;

    /* Program the Port Open-Drain Registers */
    IMM->io_regs[PORTA].podr = 0x00000000;
    IMM->io_regs[PORTB].podr = 0x00000000;
    IMM->io_regs[PORTC].podr = 0x00000000;
    IMM->io_regs[PORTD].podr = 0x00000000;

    /* Program the Port Pin Assignment Registers */
	if (FCCx == FCC2)
	{
      IMM->io_regs[PORTC].ppar = 0x00003000;  
	  if (Interface == RMII) {
        IMM->io_regs[PORTB].ppar = 0x00000f0e;	  	
	  }
	  else {
	  	IMM->io_regs[PORTB].ppar = 0x00003fff;
	  }
	}
	
   	if (FCCx == FCC3)
   	{
      IMM->io_regs[PORTC].ppar = 0x0000c000;  
	  if (Interface == RMII) {
        IMM->io_regs[PORTB].ppar = 0x03c2c000;
	  }
	  else 
	  {
        IMM->io_regs[PORTB].ppar = 0x0fffc000;
	  }
   	}    

}  /* end InitParallelPorts() */


/*------------------------------------------------------------------------
*
* FUNCTION NAME:  InterruptControlInit 
*                  
*
* DESCRIPTION:
*
*  Initializes interrupt controller for enabling/masking interrupts
*                 
* EXTERNAL EFFECT:
*
*  Interrupts enabled for FCCx, Fast Ethernet
*
* PARAMETERS: None
*
* RETURNS: None 
*
*-----------------------------------------------------------------------*/

void InterruptControlInit()

{
   /*---------------------------------------------------------------------*/
   /* Note that we will be using the default priority config. in the IC   */
   /*---------------------------------------------------------------------*/

   /*-------------------------------------------*/
   /* Remove any previous interrupts pending    */
   /*-------------------------------------------*/
   
   IMM->ic_simr_l = ALL_ZEROS;

   /*-------------------------------------------------------*/
   /* Enable FCCx Interrupts to the Interrupt Controller    */      
   /*-------------------------------------------------------*/

   IMM->ic_simr_l = (SIMR_L_FCC1 >> (1*FCCx)); 
   
   /*------------------------------------------*/
   /* Set FCCM for interrupts on TXE, RXF, TXB */
   /*------------------------------------------*/

   IMM->fcc_regs[FCCx].fccm = 0x001A0000;


   /*-----------------------------------------*/
   /* Enable External Interrupts at CPU level */
   /*-----------------------------------------*/

   SetEEinMSR();    /* NOTE: this function uses Diab inline asm syntax */


} /* end InterruptControlInit */


/*------------------------------------------------------------------------
*
* FUNCTION NAME:  FCCxInit 
*                  
*
* DESCRIPTION:
*
*  FCCx Fast Ethernet Initialization Routine.
*                 
* EXTERNAL EFFECT:
*
*  Parameter RAM and various registers on the PQ2 including interrupt 
*  related registers and port registers. This function, when complete, 
*  will initiate or start the transfer of 8 Ethernet frames of data. For 
*  this simple example, each frame encompasses one BD of data.
*
* PARAMETERS: None
*
* RETURNS: None 
*
*-----------------------------------------------------------------------*/

void FCCxInit()
{
t_EnetFcc_Pram* FCCxEthernet;
     
	/*----------------------------------------------*/
	/* If in external loopback mode connect 	    */
    /* FCC2's Tx to CLK14 and Rx clocks to CLK13 or */
    /* FCC3's Tx to CLK16 and Rx clocks to CLK15    */
    /*----------------------------------------------*/
   	
   	if (loopback == EXTERNAL)
	{
 		IMM->cpm_mux_cmxuar = ALL_ZEROS;