📄 nkmips.h
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typedef struct _ENTRYHI { ULONG PID : 8; ULONG X1 : 5; ULONG VPN2 : 19;} ENTRYHI, *PENTRYHI;//// Define processor status register fields.//typedef struct _PSR { ULONG IE : 1; ULONG EXL : 1; ULONG ERL : 1; ULONG KSU : 2; ULONG UX : 1; ULONG SX : 1; ULONG KX : 1; ULONG INTMASK : 8; ULONG DE : 1; ULONG CE : 1; ULONG CH : 1; ULONG X1 : 1; ULONG SR : 1; ULONG TS : 1; ULONG BEV : 1; ULONG X2 : 2; ULONG RE : 1; ULONG FR : 1; ULONG RP : 1; ULONG CU0 : 1; ULONG CU1 : 1; ULONG CU2 : 1; ULONG CU3 : 1;} PSR, *PPSR;//// Define configuration register fields.//typedef struct _CONFIG { ULONG K0 : 3; ULONG CU : 1; ULONG DB : 1; ULONG IB : 1; ULONG DC : 3; ULONG IC : 3; ULONG X1 : 1; ULONG EB : 1; ULONG EM : 1; ULONG BE : 1; ULONG SM : 1; ULONG SC : 1; ULONG EW : 2; ULONG SW : 1; ULONG SS : 1; ULONG SB : 2; ULONG EP : 4; ULONG EC : 3; ULONG CM : 1;} CONFIG;//// Define ECC register fields.//typedef struct _ECC { ULONG ECC : 8; ULONG X1 : 24;} ECC;//// Define cache error register fields.//typedef struct _CACHEERR { ULONG PIDX : 3; ULONG SIDX : 19; ULONG X1 : 2; ULONG EI : 1; ULONG EB : 1; ULONG EE : 1; ULONG ES : 1; ULONG ET : 1; ULONG ED : 1; ULONG EC : 1; ULONG ER : 1;} CACHEERR;//// Define R4000 cause register fields.//typedef struct _CAUSE { ULONG X1 : 2; ULONG XCODE : 5; ULONG X2 : 1; ULONG INTPEND : 8; ULONG X3 : 12; ULONG CE : 2; ULONG X4 : 1; ULONG BD : 1;} CAUSE;//// Define R4000 processor id register fields.//typedef struct _PRID { ULONG REV : 8; ULONG IMPL : 8; ULONG X1 : 16;} PRID;// end_nthal// begin_nthal//// Define R4000 floating status register field definitions.//typedef struct _FSR { ULONG RM : 2; ULONG SI : 1; ULONG SU : 1; ULONG SO : 1; ULONG SZ : 1; ULONG SV : 1; ULONG EI : 1; ULONG EU : 1; ULONG EO : 1; ULONG EZ : 1; ULONG EV : 1; ULONG XI : 1; ULONG XU : 1; ULONG XO : 1; ULONG XZ : 1; ULONG XV : 1; ULONG XE : 1; ULONG X1 : 5; ULONG CC : 1; ULONG FS : 1; ULONG X2 : 7;} FSR, *PFSR;// end_nthal// begin_nthal//// Define address space layout as defined by MIPS memory management.//#define KUSEG_BASE 0x0 // base of user segment#define KSEG0_BASE 0x80000000 // base of cached kernel physical#define KSEG1_BASE 0xa0000000 // base of uncached kernel physical#define KSEG2_BASE 0xc0000000 // base of cached kernel virtual// end_nthal//// Define MIPS exception handling structures and function prototypes.//// Function table entry structure definition.//typedef struct _RUNTIME_FUNCTION { ULONG BeginAddress; ULONG EndAddress; PEXCEPTION_ROUTINE ExceptionHandler; PVOID HandlerData; ULONG PrologEndAddress;} RUNTIME_FUNCTION, *PRUNTIME_FUNCTION;//// Scope table structure definition.//typedef struct _SCOPE_TABLE { ULONG Count; struct { ULONG BeginAddress; ULONG EndAddress; ULONG HandlerAddress; ULONG JumpTarget; } ScopeRecord[1];} SCOPE_TABLE, *PSCOPE_TABLE;//// Runtime Library function prototypes.//VOIDRtlCaptureContext ( OUT PCONTEXT ContextRecord );PRUNTIME_FUNCTIONRtlLookupFunctionEntry ( IN ULONG ControlPc );ULONGRtlVirtualUnwind ( IN ULONG ControlPc, IN PRUNTIME_FUNCTION FunctionEntry, IN OUT PCONTEXT ContextRecord, OUT PBOOLEAN InFunction, OUT PULONG EstablisherFrame );//// Define C structured exception handing function prototypes.//struct _EXCEPTION_POINTERS;typedefLONG(*EXCEPTION_FILTER) ( struct _EXCEPTION_POINTERS *ExceptionPointers );typedefVOID(*TERMINATION_HANDLER) ( BOOLEAN is_abnormal );// begin_winnt#if defined(_MIPS_)VOID__jump_unwind ( PVOID Fp, PVOID TargetPc );#endif // MIPS// end_winntstruct KDataStruct { LPDWORD lpvTls; /* 0x000 Current thread local storage pointer */ HANDLE ahSys[NUM_SYS_HANDLES]; /* 0x004 If this moves, change kapi.h */ char bResched; /* 0x084 reschedule flag */ char cNest; /* 0x085 kernel exception nesting */ char pad; /* 0x086 alignment padding */ char bPowerOff; /* 0x087 - power off flag */ ulong saveT0; /* 0x088 kernel temp saved T0 */ ulong saveK1; /* 0x08c kernel temp saved K1 */ ulong basePSR; /* 0x090 */ ulong cMsec; /* 0x094 # of milliseconds since boot */ ulong cDMsec; /* 0x098 # of mSec since last TimerCallBack */ ACCESSKEY akyCur; /* 0x09c current access key */ PFNKDBG pfnKDbg; /* 0x0a0 kernel debugger entry point */ DWORD isrFalse; /* 0x0a4 false interrupt service routine */ DWORD adwIsrTable[6]; /* 0x0a8 first level intr service routines */ PSECTION aSections[64]; /* 0x0c0 section table for virutal memory */ LPEVENT alpeIntrEvents[SYSINTR_MAX_DEVICES];/* 0x1c0 */ LPVOID alpvIntrData[SYSINTR_MAX_DEVICES]; /* 0x240 */ PTHREAD pCurThd; /* 0x2c0: ptr to current THREAD struct */ PPROCESS pCurPrc; /* 0x2c4 ptr to current PROCESS struct */ ulong handleBase; /* 0x2c8: handle table base address */ ulong pAPIReturn; /* 0x2cc direct API return address for kernel mode */ DWORD dwKCRes; /* 0x2d0 */ DWORD dwInDebugger; /* 0x2d4 !0 if in debugger */ BYTE bPadding[32]; /* 0x2d8 */ PTHREAD g_CurFPUOwner; /* 0x2f8 Current FPU owner thread */ long aPad; /* 0x2fc - padding */ long aInfo[32]; /* 0x300 - misc. kernel info */ /* 0x380 - end */}; /* KData */#define KData (*(struct KDataStruct *)(KPAGE_BASE+0x800))#define VKData (*(volatile struct KDataStruct *)(KPAGE_BASE+0x800))#define hCurThread ((HANDLE)KData.ahSys[SH_CURTHREAD])#define hCurProc ((HANDLE)KData.ahSys[SH_CURPROC])#define pCurThread (KData.pCurThd)#define pCurProc (KData.pCurPrc)#define ReschedFlag (KData.bResched)#define PowerOffFlag (KData.bPowerOff)#define CurAKey (KData.akyCur)#define DbgEntry (KData.pfnKDbg)#define SectionTable (KData.aSections)#define InSysCall() (KData.cNest != 1)#define ISRTable (KData.adwIsrTable)#define IntrEvents (KData.alpeIntrEvents)#define IntrData (KData.alpvIntrData)#define KPlpvTls (KData.lpvTls)#define KInfoTable (KData.aInfo)#define bIntrIndexLow (KData.bIntrIndexLow)#define bIntrIndexHigh (KData.bIntrIndexHigh)#define bIntrNumber (KData.bIntrNumber)#define DIRECT_RETURN (KData.pAPIReturn)#define g_CurFPUOwner (KData.g_CurFPUOwner)#define KCResched (KData.dwKCRes)#define InDebugger (KData.dwInDebugger)ERRFALSE(AddrCurMSec == offsetof(struct KDataStruct, cMsec)+KPAGE_BASE+0x800);ERRFALSE(AddrDiffMSec == offsetof(struct KDataStruct, cDMsec)+KPAGE_BASE+0x800);#undef DiffMSec#define DiffMSec (KData.cDMsec)#undef CurMSec#define CurMSec (KData.cMsec)#if R3000extern void INTERRUPTS_ON(void);extern void INTERRUPTS_OFF(void);#else#define INTERRUPTS_ON() _enable()#define INTERRUPTS_OFF() _disable()#endifextern void *InterlockedPopList(void *pHead);extern void *InterlockedPushList(void *pHead, void *pItem);// Defines for CPU specific IDs.#define THISCPUID IMAGE_FILE_MACHINE_R4000#define PROCESSOR_ARCHITECTURE PROCESSOR_ARCHITECTURE_MIPS#if defined(R3000)#define CEProcessorType PROCESSOR_MIPS_R4000#define ProcessorLevel 3#elif defined(R4000)#define CEProcessorType PROCESSOR_MIPS_R4000#define ProcessorLevel 4#endifextern WORD ProcessorRevision;void FlushDCache(void); // purge dirty datavoid FlushICache(void); // clear out instruction cache#endif // defined(_MIPS_)// end_ntddk end_nthal#endif // _NTMIPS_
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