project.sum

采用ST的UPSD33XX系列单片机的双串口

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                         PSDsoft Express Version 8.30
                         Summary of Design Assistant
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PROJECT    : project                       DATE : 09/06/2005
DEVICE     : uPSD3354DV                    TIME : 10:22:29
MCU/DSP    : uPSD33XX    
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Initial setting for Program and Data Space:
===========================================

  Main PSD flash memory will reside in this space at power-up:      Program Space Only
  Secondary PSD flash memory will reside in this space at power-up: Data Space Only

Pin Definitions:
================

Pin          Signal                    Pin
Name         Name                      Type
------------ ------------------------- ------------
pa7          pa7                       GP I/O mode 
pa6          pa6                       GP I/O mode 
pa5          pa5                       GP I/O mode 
pa4          pa4                       GP I/O mode 
pa3          pa3                       GP I/O mode 
pa2          pa2                       GP I/O mode 
pa1          pa1                       GP I/O mode 
pa0          pa0                       GP I/O mode 
tdo          tdo                       Dedicated JTAG - TDO
tdi          tdi                       Dedicated JTAG - TDI
tck          tck                       Dedicated JTAG - TCK
tms          tms                       Dedicated JTAG - TMS
pd2          pd2                       GP I/O mode 
pd1          pd1                       GP I/O mode 
ale          ale                       ALE output  
_psen        _psen                     Bus control output
_rd          _rd                       Bus control output
_wr          _wr                       Bus control output
p3.1         UART0_TxD                 UART0 TxD   
p3.0         UART0_RxD                 UART0 RxD   
p1.3         UART1_TxD                 UART1 TxD   
p1.2         UART1_RxD                 UART1 RxD   
a11          a11                       Address line
a10          a10                       Address line
a9           a9                        Address line
a8           a8                        Address line
ad7          a7                        Data/Address line
ad6          a6                        Data/Address line
ad5          a5                        Data/Address line
ad4          a4                        Data/Address line
ad3          a3                        Data/Address line
ad2          a2                        Data/Address line
ad1          a1                        Data/Address line
ad0          a0                        Data/Address line
debug        JTAG_debug_pin            JTAG debug pin
Xtal1        Xtal1                     Xtal1       
Xtal2        Xtal2                     Xtal2       
_Reset_In    _Reset_In                 Reset In    
Vref         VREF                      VREF input  

User defined nodes:
===================

None defined

Page Register settings:
=======================

pgr0 is used for paging
pgr1 is used for paging
pgr2 is used for paging
pgr3 is not used
pgr4 is not used
pgr5 is not used
pgr6 is not used
pgr7 is not used

Equations:
==========

rs0 = ((address >= ^h0000) & (address <= ^h7FFF));
csiop = ((address >= ^h8000) & (address <= ^h80FF));
fs0 = ((page == 0) & (address >= ^h0000) & (address <= ^h7FFF));
fs1 = ((page == 0) & (address >= ^h8000) & (address <= ^hFFFF));
fs2 = ((page == 1) & (address >= ^h0000) & (address <= ^h7FFF));
fs3 = ((page == 1) & (address >= ^h8000) & (address <= ^hFFFF));
fs4 = ((page == 2) & (address >= ^h0000) & (address <= ^h7FFF));
fs5 = ((page == 2) & (address >= ^h8000) & (address <= ^hFFFF));
fs6 = ((page == 3) & (address >= ^h0000) & (address <= ^h7FFF));
fs7 = ((page == 3) & (address >= ^h8000) & (address <= ^hFFFF));
csboot0 = ((page == 1) & (address >= ^h8000) & (address <= ^h9FFF));
csboot1 = ((page == 1) & (address >= ^hA000) & (address <= ^hBFFF));
csboot2 = ((page == 1) & (address >= ^hC000) & (address <= ^hDFFF));
csboot3 = ((page == 1) & (address >= ^hE000) & (address <= ^hFFFF));