sa1100.bsd

里面有通过JTAG口对FLASH的烧写代码

-------------------------------------------------------------------------------
-- SA-1100.bsdl
-- The BSDL Description for SA-1100 IEEE 1149.1 Circuits
-------------------------------------------------------------------------------
-- Revision History
-- Rev who Date Description
-- 00 YunChii 04-AUG-1997 Taken the bsdl code from DC1035
-- StrongARM SA-110
-- 01 J. Belkin Cleaned up file.
-- 02 Richard Reis Added 3 missing scan cells between
-- cells 11 & 12.
-- 03 J. Belkin 18-AUG-1997 Corrected for inverted control cells,
-- transposed UCDP/UCPN pinning,
-- changed PWREN BSR bit to "internal"
-- 04 Validated by Corelis [phone], 08-APR-1999, BC7 cell type replaced.
-------------------------------------------------------------------------------
entity SA1100 is -- (ref B.8)
generic (PHYSICAL_PIN_MAP: string:= "TQFP_208"); -- (ref B.8.2)
port( -- (ref B.8.3)
RXDC :inout bit;
TXDC :inout bit;
D :inout bit_vector (31 downto 0);
GP :inout bit_vector (27 downto 0);
LBIAS :inout bit;
LPCLK :inout bit;
LDD :inout bit_vector (7 downto 0);
LLCLK :inout bit;
LFCLK :inout bit;
POE :buffer bit;
PWE :buffer bit;
PIOR :buffer bit;
PIOW :buffer bit;
PSKTSEL :buffer bit;
IOIS16 :in bit;
PWAIT :in bit;
PREG :buffer bit;
PCE2 :buffer bit;
PCE1 :buffer bit;
WE :out bit;
OE :out bit;
RAS :out bit_vector (3 downto 0);
CAS :out bit_vector (3 downto 0);
CS :out bit_vector (3 downto 0);
A :out bit_vector (25 downto 0);
UDCP :inout bit;
UDCN :inout bit;
RXD1 :inout bit;
TXD1 :inout bit;
RXD2 :inout bit;
TXD2 :inout bit;
RXD3 :inout bit;
TXD3 :inout bit;
TXTAL :linkage bit;
TEXTAL :linkage bit;
PEXTAL :linkage bit;
PXTAL :linkage bit;
RESET :in bit;
RESETO :buffer bit;
ROMSEL :in bit;
TCKBYP :linkage bit;
TESTCLK :linkage bit;
TMS :in bit;
TCK :in bit;
TDI :in bit;
TDO :out bit;
TRST :in bit;
BATTF :in bit;
VDDFA :in bit;
PWREN :linkage bit;
SFRMC :inout bit;
SCLKC :inout bit;
VDDR :linkage bit;
VDDX :linkage bit_vector (18 downto 0);
VSSX :linkage bit_vector (18 downto 0);
VDD :linkage bit_vector (8 downto 0);
VSS :linkage bit_vector (8 downto 0)
) ;
use STD_1149_1_1994.all ; -- (ref B.8.4)
-- changed to 1990 for Teradyne Victory compiler -- "COMPILERSENSITIVE"
-- use STD_1149_1_1990.all ; -- "COMPILERSENSITIVE"
attribute COMPONENT_CONFORMANCE of SA1100: entity is "STD_1149_1_1993"; -- (ref B.8.6)
attribute PIN_MAP of SA1100 : entity is PHYSICAL_PIN_MAP ; -- (ref B.8.7)
constant TQFP_208 : PIN_MAP_STRING :=
"BATTF: 202, " &
"PWREN: 206, " &
"SCLKC: 208, " &
"D: ( 46, 42, 36, 32, 24, 20, 14, 10, 45, 41, " &
" 35, 31, 23, 19, 13, 9, 44, 40, 34, 30, " &
" 22, 18, 12, 8, 43, 39, 33, 29, 21, 17, " &
" 11, 7), " &
"GP: ( 51, 52, 53, 54, 55, 56, 59, 60, 61, 62, " &
" 63, 64, 65, 66, 69, 70, 71, 72, 73, 74, " &
" 75, 76, 81, 82, 83, 84, 85, 86), " &
"LBIAS: 87, " &
"LPCLK: 88, " &
"LDD: ( 98, 97, 96, 95, 94, 93, 92, 91), " &
"LLCLK: 101, " &
"LFCLK: 102, " &
"POE: 103, " &
"PWE: 104, " &
"PIOR: 105, " &
"PIOW: 106, " &
"PSKTSEL: 111, " &
"IOIS16: 112, " &
"PWAIT: 113, " &
"PREG: 114, " &
"PCE2: 115, " &
"PCE1: 116, " &
"WE: 117, " &
"OE: 118, " &
"RAS: ( 121, 122, 123, 124), " &
"CAS: ( 125, 126, 127, 128), " &
"CS: ( 133, 134, 135, 136), " &
"A: ( 137, 138, 139, 140, 143, 144, 145, 146, 147, 148, " &
" 149, 150, 155, 156, 157, 158, 159, 160, 163, 164, " &
" 165, 166, 167, 168, 169, 170), " &
"UDCN: 173, " &
"UDCP: 174, " &
"RXD1: 175, " &
"TXD1: 176, " &
"RXD2: 177, " &
"TXD2: 178, " &
"RXD3: 179, " &
"TXD3: 180, " &
"RESET: 191, " &
"RESETO: 192, " &
"ROMSEL: 194, " &
"TXTAL: 184, " &
"RXDC: 1, " &
"TXDC: 2, " &
"TEXTAL: 185, " &
"PEXTAL: 186, " &
"PXTAL: 187, " &
"TCKBYP: 195, " &
"TESTCLK: 196, " &
"TMS: 197, " &
"TCK: 198, " &
"TDI: 199, " &
"TDO: 200, " &
"TRST: 201, " &
"VDDFA: 205, " &
"SFRMC: 207, " &
"VDDR: 193, " &
"VDDX: ( 3, 15, 27, 37, 49, 57, 67, 77, 89, 99, " &
" 108, 120, 130, 142, 154, 162, 172, 182, 204), " &
"VSSX: ( 4, 16, 28, 38, 50, 58, 68, 78, 90, 100, " &
" 107, 119, 129, 141, 153, 161, 171, 181, 203), " &
"VDD: ( 5, 25, 47, 79, 110, 132, 152, 188, 190), " &
"VSS: ( 6, 26, 48, 80, 109, 131, 151, 183, 189) ";
attribute TAP_SCAN_CLOCK of TCK : signal is (16.60e6, LOW); -- (Ref B.8.9)
attribute TAP_SCAN_IN of TDI : signal is TRUE;
attribute TAP_SCAN_OUT of TDO : signal is TRUE;
attribute TAP_SCAN_MODE of TMS : signal is TRUE;
attribute TAP_SCAN_RESET of TRST : signal is TRUE;
attribute INSTRUCTION_LENGTH of SA1100 : entity is 5 ; -- (Ref B.8.11)
attribute INSTRUCTION_OPCODE of SA1100 : entity is
"EXTEST (00000)," &
"SAMPLE (00001)," &
"CLAMP (00100)," &
"HIGHZ (00101)," &
"IDCODE (00110)," &
"BYPASS (11111)" ;
attribute INSTRUCTION_CAPTURE of SA1100 : entity is "00001" ;
-- attribute INSTRUCTION_PRIVATE of SA1100 : entity is "Private"; -- "COMPILERSENSITIVE" Comment out
-- if unsupported by the compile
-- ID Register Description
attribute IDCODE_REGISTER of SA1100: entity is
"X001" & -- Version
"0001000010000100" & -- Part Number
"00000110101" & -- Manufacturer
"1"; -- Mandatory LSB
attribute REGISTER_ACCESS of SA1100 : entity is -- (ref B.8.13)
"BOUNDARY (EXTEST, SAMPLE)," & -- Redundant. Added for completeness
"BYPASS (BYPASS, HIGHZ, CLAMP)"; -- ditto
-- "DIE_ID[32] (DIE_ID)";
attribute BOUNDARY_LENGTH of SA1100 : entity is 279 ; -- (ref B.8.14)
attribute BOUNDARY_REGISTER of SA1100 : entity is
------------------------------------------------------------------------------
-- scan cell cntr disable disable
-- cell type port function safe cell value state
------------------------------------------------------------------------------
"278 (BC_4, BATTF, INPUT, x), " &
"277 (BC_4, VDDFA, INPUT, x), " &
"276 (BC_4, *, internal,x), " &
"275 (BC_2, *, control, 0), " &
"274 (BC_1, SFRMC, OUTPUT3, x, 275, 0, Z ), " &
"273 (BC_4, SFRMC, INPUT, x), " &
"272 (BC_2, *, control, 0), " &
"271 (BC_1, SCLKC, OUTPUT3, x, 272, 0, Z ), " &
"270 (BC_4, SCLKC, INPUT, x), " &
"269 (BC_2, *, control, 0), " &
"268 (BC_1, RXDC, OUTPUT3, x, 269, 0, Z ), " &
"267 (BC_4, RXDC, INPUT, x), " &
"266 (BC_2, *, control, 0), " &
"265 (BC_1, TXDC, OUTPUT3, x, 266, 0, Z ), " &
"264 (BC_4, TXDC, INPUT, x), " &
"263 (BC_1, D(0), OUTPUT3, x, 199, 1, Z ), " &
"262 (BC_4, D(0), INPUT, x), " &
"261 (BC_1, D(8), OUTPUT3, x, 199, 1, Z ), " &
"260 (BC_4, D(8), INPUT, x), " &
"259 (BC_1, D(16), OUTPUT3, x, 199, 1, Z ), " &
"258 (BC_4, D(16), INPUT, x), " &
"257 (BC_1, D(24), OUTPUT3, x, 199, 1, Z ), " &
"256 (BC_4, D(24), INPUT, x), " &
"255 (BC_1, D(1), OUTPUT3, x, 199, 1, Z ), " &
"254 (BC_4, D(1), INPUT, x), " &
"253 (BC_1, D(9), OUTPUT3, x, 199, 1, Z ), " &
"252 (BC_4, D(9), INPUT, x), " &
"251 (BC_1, D(17), OUTPUT3, x, 199, 1, Z ), " &
"250 (BC_4, D(17), INPUT, x), " &
"249 (BC_1, D(25), OUTPUT3, x, 199, 1, Z ), " &
"248 (BC_4, D(25), INPUT, x), " &
"247 (BC_1, D(2), OUTPUT3, x, 199, 1, Z ), " &
"246 (BC_4, D(2), INPUT, x), " &
"245 (BC_1, D(10), OUTPUT3, x, 199, 1, Z ), " &
"244 (BC_4, D(10), INPUT, x), " &
"243 (BC_1, D(18), OUTPUT3, x, 199, 1, Z ), " &
"242 (BC_4, D(18), INPUT, x), " &
"241 (BC_1, D(26), OUTPUT3, x, 199, 1, Z ), " &
"240 (BC_4, D(26), INPUT, x), " &
"239 (BC_1, D(3), OUTPUT3, x, 199, 1, Z ), " &
"238 (BC_4, D(3), INPUT, x), " &
"237 (BC_1, D(11), OUTPUT3, x, 199, 1, Z ), " &
"236 (BC_4, D(11), INPUT, x), " &
"235 (BC_1, D(19), OUTPUT3, x, 199, 1, Z ), " &
"234 (BC_4, D(19), INPUT, x), " &
"233 (BC_1, D(27), OUTPUT3, x, 199, 1, Z ), " &
"232 (BC_4, D(27), INPUT, x), " &
"231 (BC_1, D(4), OUTPUT3, x, 199, 1, Z ), " &
"230 (BC_4, D(4), INPUT, x), " &
"229 (BC_1, D(12), OUTPUT3, x, 199, 1, Z ), " &
"228 (BC_4, D(12), INPUT, x), " &
"227 (BC_1, D(20), OUTPUT3, x, 199, 1, Z ), " &
"226 (BC_4, D(20), INPUT, x), " &
"225 (BC_1, D(28), OUTPUT3, x, 199, 1, Z ), " &
"224 (BC_4, D(28), INPUT, x), " &
"223 (BC_1, D(5), OUTPUT3, x, 199, 1, Z ), " &
"222 (BC_4, D(5), INPUT, x), " &