w977fdc.asl

AWARD BIOS源代码,支持的CHIPSET请看文件,有同型号的板子烧上去就可以跑

Device(FDC0)	{ 			// Floppy Disk controller
        Name(_HID, EISAID("PNP0700")) 	// PnP Device ID
        Method(_STA,0)	{ 		//Status of the Floppy disk controller
                ENFG()			// Enter Config Mode
                Store(Zero,LDN_)
                If(ACTR) {
                        EXFG()
                        Return(0x0F)
                        }
                Else	{
                        If (LOr(IOAH,IOAL)) {
                                EXFG()
                                Return(0x05)
                                }	// If device address is non zero
                        Else	{
                                EXFG()
                                Return(0x00)
                                }
                        } 		// If device address is 0
                } 			//end _STA method

        Method(_DIS,0)	{ 			//Disable
                ENFG()
                Store(0x00, LDN_)	//set logical device number for Floppy
                Store(Zero, ACTR)	//Set Activate Register to zero
                EXFG()
                } 				//end _DIS method

        Method(_CRS,0)	{ 			//Current Resource
                Name(BUF0,Buffer()
                        {
                        0x47, 			//IO Port Descriptor
                        0x01, 			//16 bit decode
                        0xF2, 			//IO Port Range Minimum Base Low
                        0x03, 			//IO Port Range Minimum Base High
                        0xF2, 			//IO Port Range Maximum Base LOW
                        0x03, 			//IO Port Range Maximum Base High
                        0x01, 			//Base Alignment
                        0x04, 			//Length of contiguous IO Ports
                        0x47, 			//IO Port Descriptor
                        0x01, 			//16 bit decode
                        0xF7, 			//IO Port Range Minimum Base Low
                        0x03, 			//IO Port Range Minimum Base High
                        0xF7, 			//IO Port Range Maximum Base LOW
                        0x03, 			//IO Port Range Maximum Base High
                        0x01, 			//Base Alignment
                        0x01, 			//Length of contiguous IO Ports

                        0x22, 			//IRQ Descriptor
                        0x40, 			//IRQ Mask Lo=bit 6
                        0x00, 			//IRQ Mask High

                        0x2A, 			//DMA Descriptor
                        0x04, 			//DMA Mask CH2
                        0x00, 			//DMA Channel Speed Support

                        0x79, 			//end tag
                        0x00, 			
                        }
                )

                CreateByteField (BUF0, 0x02, IOLO)
                CreateByteField (BUF0, 0x03, IOHI)
                CreateByteField (BUF0, 0x04, IORL)
                CreateByteField (BUF0, 0x05, IORH)
                ENFG()
                EXFG()
                Return(BUF0) 			// Return Buf0
                } 				// end _CRS method

        Name(_PRS,Buffer() 		//24*8
                {
                0x30,

                0x47, 			//IO Port Descriptor
                0x01, 			//16 bit decode
                0xF2, 			//IO Port Range Minimum Base Low
                0x03, 			//IO Port Range Minimum Base High
                0xF2, 			//IO Port Range Maximum Base LOW
                0x03, 			//IO Port Range Maximum Base High
                0x01, 			//Base Alignment
                0x04, 			//Length of contiguous IO Ports
                0x47, 			//IO Port Descriptor
                0x01, 			//16 bit decode
                0xF7, 			//IO Port Range Minimum Base Low
                0x03, 			//IO Port Range Minimum Base High
                0xF7, 			//IO Port Range Maximum Base LOW
                0x03, 			//IO Port Range Maximum Base High
                0x01, 			//Base Alignment
                0x01, 			//Length of contiguous IO Ports

                0x22, 			//IRQ Descriptor
                0x40, 			//IRQ Mask Lo=bit 6
                0x00, 			//IRQ Mask High

                0x2A, 			//DMA Descriptor
                0x04, 			//DMA Mask CH2
                0x00, 			//DMA Channel Speed Support

                0x38,

                0x79, 			//end tag
                0x00,
                } 			// end Buffer
        ) 				// end _PRS method

        Method(_SRS,1)	{			//Set Resource
                CreateByteField (Arg0, 0x02, IOLO) 	//IO Port Low
                CreateByteField (Arg0, 0x03, IOHI) 	//IO Port High
                CreateWordField (Arg0, 0x19, IRQL) 	//IRQ low
                CreateByteField (Arg0, 0x1C, DMAV) 	//DMA
                ENFG()
                Store(Zero, LDN_)
                Store(One, ACTR) 	//Set activate configuration register
                EXFG()
                } 			// end of _SRS method
        } 				// end of FDC0 device