e0post.asm

AWARD BIOS源代码,支持的CHIPSET请看文件,有同型号的板子烧上去就可以跑

;R73	09/26/96 RCH	Added quick memory testing for P6 BIOS
;R72	09/25/96 RCH	Rewrite some routine to get more space
;R71	09/25/96 RCH	Skip some unused codes for P6 BIOS to get more space
;R70A	09/25/96 LAW	Change PHILIPS_LOGO color
;R70	09/24/96 LAW	Added "PHILIPS_LOGO" support
;R69	09/23/96 DNL	Added codes for Notebook Power Management
;R68	09/23/96 AVN	Added 2M BIOS Support INTEL 28F002BXT EEPROM.
;R67	09/21/96 RCH	Speed up memory testing for warm boot and 0V resuming
;R65A	09/17/96 RCH	Fixed system hang if no VGA card installed
;R52E	09/17/96 LAW	Fixed Adaptec Use chr(10) & chr(11) So define "Super
;			Korea_Logo" don't show it's two char.
;R66	09/11/96 RCH	Should set mask bit of A35-A32 for P6 MTRRs
;R52D	09/09/96 LAW	show Super_KOREA_logo 136 * 126
;R65	09/07/96 RCH	Procedure REPORT_ERR_WSPKR is only used by POST, so
;			put it in E-segment.
;R64	09/03/96 RCH	Get boot sequence from BIOS data area instead of
;			reading CMOS value
;R63	09/03/96 KEN	Update USB structure to support USB device hot-plug.
;R56A	08/30/96 RCH	This routine will be skipped if PS2_SELECTABLE defined
;			and user choic "disable" for this item
;R62	08/30/96 DNL	Fixed bug of keyboard have no function if PHOENIX KBC
;			used
;R59B	08/30/96 AVN	Fixed if PnP Use DALLAS NVM and Complier Fail, So
;			Added 'FLASH_SUPPORT' Define For 2M Falsh Support.
;R52C	08/28/96 LAW    Chang AWARD LOGO to ascii 1bh - 1fh
;R61	08/21/96 RCH	Only keep one mirco-code in BIOS to pass INTEL's tests
;R60	08/21/96 LAW	Add background color for mycomp ZET_EPA_LOGO
;R52B	08/21/96 LAW	show 3 color & 128 * 112 big EPA_LOGO
;R59A	08/21/96 AVN	Fix Include Mistake.
;R59	08/20/96 AVN	Detect EEPROM Type at post 6, to support 2M EEPROM
;			for save more code in F segment.
;R58	08/17/96 RCH	POST code becomes abnormal if USB_SUPPORT is used.
;R57	08/16/96 KVN	Fixed 2M bios with FULL_SCREEN_LOGO hang at 0c3h bug
;R56	08/16/96 RCH	BIOS should enable Tri-state of IRQ 12 if no PS2
;			mouse plugged for super I/O with built-in KBC,
;			in order to release IRQ 12 for ISA or PCI
;R55	08/15/96 JSN	Add Not_Init_Cyrix define for ALi M6117
;R52A	08/14/96 KVN	Add bottom color 2 row support
;R30B	08/12/96 DNL	Some chipset (Intel Mobil Triton) need to disable I/O
;			decode rigister to disable COM & LPT port really
;R54	08/09/96 RAY	Add auto COM & LPT support
;R53	08/09/96 TNY	Add "Special_Patch_For_Abit_P6" for 2a69ha19.cfg
;			Because their M/B hang at C1h when 16M unbalance
;			DRAM plugeed.
;R52	08/08/96 KVN	Added customer EPA LOGO support
;R17D	08/07/96 RCH	Fixed error coding of R17C , this cause 6x86 hang up
;			while L2 cache is turned on.
;R17C	08/05/96 KGN	Bypass 0.5M cacheable for shall memory
;R51	08/05/96 RCH	Some customers won't display real clock for 6x86 CPU
;R50	07/26/96 RCH	Some customers want to support 6x86 CPU with 50x1,60x1
;			and 66x1
;R49	07/24/96 RCH	Let routine "F000_Set_Cyrix" be public
;R44C	07/23/96 KEN	Modified for initializing USB keyboard earlier.
;R48	07/22/96 RCH	Display ODP & MMX for P6 CPUs
;R47	06/18/96 RCH	Skip memory clearing to enter setup as soon as
;			possible for large memory installed
;R46	06/18/96 RCH	Modify memory high limit to support DRAM up to 512Mb
;R44B	06/14/96 TNY	Fix coding error, otherwise KBD_STATUS error is always
;			not present when no PS2 mouse support.
;R45	06/10/96 KGN	Add defin Beep_Before_Boot for USI
;R44A	06/07/96 KEN	Remove codes of calling Usb_Kbd to E8POST.ASM that it
;			should be done after SMI_Handler being setup.
;R42A	06/03/96 RCH	Reduce clock checking value for 200Mhz to prevent
;			200Mhz detected as 180Mhz
;R44	05/28/96 KEN	Add USB_SUPPORT
;R43	05/21/96 RCH	Added PENTIUM 225Mhz(75x3) support
;R42	05/21/96 TNY	Add NEW_P6_200_TBL definition for QDI.
;R39A	05/11/96 RCH	Clear shutdown byte CMOS for PCI reset as soon as
;			possible.
;R41	05/11/96 RCH	Take all codes of R37 off due to resource assign
;			conflict. Old code was saved as E0POST.511
;R40	05/10/96 KVN	Display exact HDD fail drive
;R39	05/09/96 RCH	Restore warm flag from CMOS if PCI reset fucntion is
;			supported
;R34A	05/08/96 RCH	Also open 210,233 & 240Mhz for PENTIUM CPUs(CPU name
;			is Tillamook of INTEL)
;R37C	05/07/96 RCH	R37 cause all non-PnP BIOS can not program super I/O
;			correctly.
;R37B	05/06/96 RCH	Fixed WIN/95 can not find COM & LPT ports due to later
;			super I/O initialization
;R30A	05/06/96 RAY	Fix bug: Under some conditions, the BIOS will show
;			         "Conflict I/O: 000"
;R38	05/06/96 RAY	Bug: - Setup set to "Halt on : All but Keyboard"
;			     - Keyboard is lock
;			     ====> no error message but still wait for "F1"
;
;			Reason:	this is due to Keylock error is recorded
;				in FIXED_ERROR[BP], the old code checked
;				for FIXED_ERROR[BP], FLOPPY_ERROR[BP]
;				whether to stop for F1 if it is not set to
;				"Halt on : No errors",  "Halt on : All but
;				diskette" or "Halt on : All but disk/key"
;
;R37A	05/06/96 RAY	Fix R37 coding mistake
;R37	05/03/96 RAY	1. Initialize PnP device which request for COM/LPT
;			   addr before we init the onboard devices, i.e. card
;			   devices has higher priority that the onboard
;			   devices !
;
;			2. Also, the BIOS will report conflict.
;
;			Reason : Most PnP FAX/MODEM card request for COM addr
;
;R36	05/02/96 DNL	Added codes for Notebook Power Management
;R35	05/02/96 KVN	Fixed musted to clear [CDROM_Exist_Flag] value before
;			Auto_IDE_Detect function otherwise HDD will detect none
;R34	05/01/96 RCH	Added 210,233 & 240Mhz support for P6(Klamath) CPU
;R33A	04/30/96 RCH	Fixed error coding of R33 , this cause all ISA/VGA
;			cards hang at POST 0DH
;R33	04/30/96 RAY	Enable C000 shadow R/W before initializing VGA BIOS.
;			This is stated in PCI specification & is strongly
;			request by PCI SIG.
;R32	04/27/96 RAY	Check Update-In-Process bit when writing to RTC
;			This will prevent system from accidentally set the
;			system time to default year: 1996
;R31	04/23/96 DNL	Modify code to save space
;R30	04/19/96 RCH	Added routine to display conflict I/O for COM & LPT
;			ports and halt system for user to change CMOS setup
;			for super I/O. Note: it need a routine named
;			"Disable_SuperIO_ComLptPort" in .SIO file
;R29	04/17/96 RCH	Added a hook to do special program before VGA ROM
;			initial.
;R28	04/12/96 TNY	Add Higher_120MHz_Tbl definition.
;R26B	04/11/96 RCH	MP initial should be programmed earlier due to system
;			hang of reading Time Stamp Counter for PENTIUM multi-
;			processors support
;R26A	04/11/96 RCH	Fixed Some TRITON M/Bs detect 90Mhz as 83Mhz
;R27	04/09/96 KVN	Added P6 BIOS update feature
;R26	04/05/96 RCH	Change CPU clock detection alorigthm to get more
;			accurate CPU clock. Note: this new algorithm only
;			available for INTEL PENTIUM & P6 CPUs
;R25	04/05/96 RCH	Added a switch to skip 110Mhz clock support
;R24	04/02/96 DNL	Added C&T,Cirrus LCD controller support
;R23	04/02/96 RCH	Hide some standard items for special customer (ECS)
;			"floppy seek","boot up speed" & "typematic rate"
;R22	03/27/96 KVN	Fixed bug for execute awdflash.exe hang if support one
;			full 640X464 logo
;R21	03/27/96 RCH	The MP table should be modified to report PCI level
;			trigger IRQs to OS for new INTEL I/O APIC, otherwise
;			MP OS can not boot on PCI card.
;R17B	03/25/96 KGN	Reset Cyrix 6x86 Cacheable Address setting
;R20	03/25/96 RAY	Force display type to mono when no display card is plugged
;R15A	03/25/96 RAY	Save codes for R15
;R19	03/22/96 DNL	Added table for P54CT-125
;R18	03/21/96 DNL	Added Pentiem-100 CPU for 50MHzx2 mode
;R17A	03/20/96 JSN	Use old Cyrix 6x86 Cacheable function for ALI M152x,
;			some chipsets(support share) will hang when M1 pluged.
;R17	03/19/96 KGN	Change Cyrix 6x86 Cacheable Address setting
;R16	03/14/96 HTR	Special_Cyrix_Tbl_For_VSI59X
;R15	03/14/96 RCH	Some chipsets will wrap around memory address if
;			access address beyond chipset top address. so add
;			checking to avoid error memory sizing.
;R14	03/06/96 RCH	Support P6 BIOS update code with multiple stepping
;R13	03/04/96 AVN	Fixed Triton II Somtime CPU 180MHz Show 200MHz,
;			Add "Higher_200MHz_Tbl" define in bios.cfg
;R12	02/28/96 RAY	Add BIOS.CFG switch: No_Report_Cmos_Error
;R11	02/16/96 KVN	Fixed AWARD logo display wrong
;R05B	02/16/96 KVN	The ATi-MACH64 VGA card have updated ROM
;R04A	02/16/96 RCH	There two combinations for 150Mhz of 6x86, BIOS have
;			to check the clock mode and set right host clock
;			50Mhz for 3x mode and 66Mhz for 2x (75x2) mode,
;			because chipset only support up to 66Mhz, no 75Mhz
;R08A	02/15/96 TNY	Add RePrepare_LMEM_RESOURCE hook.
;R09A	02/15/96 KVN	Fixed bug for execute awdflash.exe hang
;R10	02/14/96 TNY	Public CompressVga_Seg for PCIPOST to used.
;R09	02/14/96 KVN	Added 640x480 logo display
;R05A	02/14/96 KVN	Fixed some SCSI card display string error
;R08	02/13/96 TNY	Support new VGA BIOS which's size is tenderable.
;R07	02/09/96 RAY	Support new VGA BIOS which's size is larger than 32k.
;R06	02/08/96 KVN	Initial POST_temp_byte value
;R05	02/07/96 KVN	Fixed ATi-MACH64 VGA card show POST screen error after
;			screen change scanline
;R04	02/07/96 RIC	Add Cyrix 6x86-P200+ (speed=75*2=150) CPU type.
;R03    02/06/96 RIC    Fix Lucky-Start CPU Speed 166 sometimes show 180.
;			Add "LUCKY_START_166_CPU_DETECT" define in bios.cfg
;R02	02/03/96 RIC	Modify P24C-83 CPU Speed Detect Value 80 to 81,
;			Because Pentiem-75 CPU Speed Show '83' in VLSI Lynx.
;R01	02/02/96 DRS	Add hook Weitek_Share_Vga_GCLK for special WEITEK onboard VGA
;R00	01/26/96 RCH	Clean all revisions and start from R00 , old file
;			is saved as e0post.125

.386P
;[]-----------------------------------[]
;
;   Award Software 386/486 BIOS
;	  Power-On Self-Test located in E0000-E7FFF area
;
;	Copyright (C) 1996
;	Award Software, Inc.
;	All Rights Reserved
;[]-----------------------------------[]

.XLIST

		INCLUDE BIOS.CFG

ifndef	No_Support_4_IDE		;support 4 HDDs as default
Support_4_IDE		EQU	1
endif	;No_Support_4_IDE
		INCLUDE BTROMSEG.EQU			;R59A
		INCLUDE COMMON.EQU
		INCLUDE POST.EQU
		INCLUDE ATORGS.EQU
		INCLUDE PORT61.EQU
		INCLUDE 8042.EQU
		INCLUDE 8259.EQU

		INCLUDE COMMON.MAC
		INCLUDE POST.MAC
		INCLUDE USERINT.MAC
;R59A		INCLUDE	PNP.EQU				;R59
ifdef RPB_ENABLED					;R143
		INCLUDE rpb.cfg         ;M01
		INCLUDE rpb_err.equ			;R143
endif ;RPB_ENABLED					;R143

ifdef	Ct_Special_Do_InPost_60				;R264
	     	extrn	Ct_Special_Do_InPOST60:near	;R264
endif	;Ct_Special_Do_InPost_60			;R264
ifdef	Elan400				;R250
		extrn	Elan_CPU:Near	;R250
endif	;Elan400			;R250

;M01 - starts
ifdef	RPB_ENABLED
ifdef	RPB_BOOT_FAIL_TRIGGER
	extrn	rpbf_preboot_agent_trigger:near
endif	;RPB_BOOT_FAIL_TRIGGER
endif	;RPB_ENABLED
;M01 - ends

;R249	- Starts
ifdef	Three_FullLogo_CMOS
		extrn	ShowLOGO_selectable_Item:near
endif	;Three_FullLogo_CMOS
;R249	- End

 ;R243A - start
 ifdef	MSG_CMOS
		extrn	PostMsgSelectItem:near
 endif;	MSG_CMOS
 ;R243A - end

ifdef	Always_QUICKPOST				;R237
Show_Total_After_Memory_Test	equ	1		;R237
endif	;Always_QUICKPOST				;R237

ifdef	CUSTOM_LCD_OUTPUT				;R241
                extrn   Lcd_Init:far                    ;R241
                extrn   Lcd_Display_Msg:far             ;R241
endif;	CUSTOM_LCD_OUTPUT

ifdef   Show_PS2_UnConnect_Message		;R219
		EXTRN	MOUSE_ERR_STR:NEAR	;R219
endif	;Show_PS2_UnConnect_Message  		;R219

ifdef	New_Swap_Fdd_Method 			;R217
		extrn	Fdd_Item:near		;R217
endif	;New_Swap_Fdd_Method			;R217

;R188 -start
ifdef	Bootblock_16K_Support
ifdef	Automatic_Load_Awdflash
ifNdef	No_Automatic_Load_Awdflash_InPOST		;R225
		extrn	POST_Awdflash_Check:near
		extrn	TO_ENTER_Awdflash:near
ifdef	Graphics_Post
		extrn	TO_ENTER_Awdflash1:near
endif	;Graphics_Post
endif	;No_Automatic_Load_Awdflash_InPOST		;R225
endif	;Automatic_Load_Awdflash
endif	;Bootblock_16K_Support
;R188 -end
;R216 -start
;R216cifndef Flash_16K_8K_8K_Unit	  ;R216b
ifdef  CMOS_Default_in_Flash
	       	extrn	XCALL_PROC:near
	       	EXTRN	Search_CMOS_label:near
		EXTRN	Check_Flash_CMOS:near
		extrn	DRAM2FLASH:near		;;;05/05
		extrn	CMOS_DRAM_CHECKSUM:near	;;;05/05
endif  ;CMOS_Default_in_Flash
;R216cendif  ;Flash_16K_8K_8K_Unit	  ;R216b
;R216 -end

ifdef	PCI_BUS						;R240
		extrn	Patch_LanBoot:near		;R240
endif;	PCI_BUS						;R240

		extrn	POST_decompress:near		;R152D
ifdef	HPM_Support					;R176
		extrn	Init_HPM:Near			;R176
		extrn	Post_init_hpm:Near		;R176
		extrn	Check_HPM_Resume:Near		;R176A
endif	;HPM_Support					;R176
;R218 start
ifdef	VSA_VGA
 ifdef	DSTN_9210_Support                              	;R233
		extrn	New_DSTN_Panel:far		;R233
 endif	;DSTN_9210_Support                              ;R233

ifdef	S2D_SUPPORT
 		extrn	Check_VSA_resume:near
endif	;S2D_SUPPORT
endif	;VSA_VGA
;R218 end

ifdef	JUMPER_CMOS_CLEAR_SUPPORT	       		;R149
		extrn	Ct_Cmos_Jumper_Chk:near		;R149
endif;	JUMPER_CMOS_CLEAR_SUPPORT			;R149

;R168 - start
ifdef	LAN_BOOT_SUPPORT
		extrn	LanBoot_Item:near
endif;	LAN_BOOT_SUPPORT
;R168 - end