📄 chippost.asm
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jz short Dont_Report_ ;R15 Don't report
ENDIF;CAS_Latency_Auto ;R15
xor di,di ;R07A
xor bh,bh
mov bl, 0a0h
Test_SPD_Loop_:
shr bh,2
mov al, 18
call X_I2C_Byte_Read
jnc short Support_SPD_
or bh,80h ;No Support SPD
Support_SPD_:
test al,02h
jnz short Support_2T_
or bh,80h ;No Support 2T
Support_2T_:
add bl,2
cmp bl,0a6h
jbe short Test_SPD_Loop_
ifdef Debug_SPD_Warning
mov al,bh
out 9eh,al
endif; Debug_SPD_Warning
mov cx, VT692+60h
call X_Get_Ct
and al,bh
jz short All_SDRAM_Support_2T_
mov si,offset SDRAM_CL_Item
call X_GetItem_Value
or al,al
jz short Dont_Report_ ; Don't report
;R07A or byte ptr OEM_Error_CMOS2[bp], OEM_Error_CMOS_Bits2
or di,01h ;R07A
jmp short No_SDRAM_Pluged_
All_SDRAM_Support_2T_:
;R07A - starts
mov si,offset SDRAM_CL_Item
call X_GetItem_Value
or al,al
jnz short No_SDRAM_Pluged_ ; Don't report
call X_Check_SDRAM
jnz short No_SDRAM_Pluged_
or di,02h
No_SDRAM_Pluged_:
;---------------;
; Report ;
;---------------;
or di,di
jz short Dont_Report_
call Far Ptr E000_Show_CAS_Latency_Error_String
Dont_Report_:
;R07A - ends
popad
ret
X_CAS_Latency_Error_String endp
;R46A ;Function : Read a I2C byte value
;R46A ;Input : BL - I2C ID address,AL - byte index
;R46A ;Output : AL - value return if carry cleared
;R46A ; Fail - if carr set
;R46A
;R46A Public X_I2C_Byte_Read
;R46A X_I2C_Byte_Read proc near
;R46A
;R46A ;set index byte to read
;R46A mov dx,SMBus_Port +03h
;R46A out dx,al ;Index
;R46A NEWIODELAY
;R46A
;R46A ;set I2C ID No.
;R46A mov dl,04h
;R46A mov al,bl ;E2PROM read cmd
;R46A or al,01H ;bit 0=1 for I2C read
;R46A out dx,al
;R46A NEWIODELAY
;R46A
;R46A ;wait SMbus ready
;R46A CALL X_Chk_SMBus_READY
;R46A
;R46A ;start I2C read operation
;R46A mov dl,02h
;R46A mov al,48h
;R46A out dx,al ;read data
;R46A NEWIODELAY
;R46A
;R46A ;wait for a while
;R46A mov cx,100h
;R46A @@:
;R46A newiodelay
;R46A loop short @B
;R46A
;R46A ;check status OK ?
;R46A CALL X_Chk_SMBus_READY
;R46A jc short X_I2CFaile ;SMBus Fail
;R46A
;R46A ;read data
;R46A mov dl,05 ;data port
;R46A in al,dx ;Data0
;R46A NEWIODELAY
;R46A ;value return in AL
;R46A
;R46A X_I2CFaile:
;R46A ret
;R46A X_I2C_Byte_Read endp
;R46A
;R46A Public X_Chk_SMBus_READY
;R46A X_Chk_SMBus_READY Proc near
;R46A
;R46A mov dx,SMBus_Port + 0
;R46A clc
;R46A mov cx,0100h
;R46A X_Chk_I2c_OK:
;R46A in al,dx ;get status
;R46A NEWIODELAY
;R46A or al,al
;R46A jz short X_Clear_final
;R46A
;R46A test al,04h
;R46A jnz short X_SMBus_Err
;R46A
;R46A test al,01h ;busy ?
;R46A jz short X_Not_Smbusy
;R46A ror ecx,16
;R46A mov cx,1000h
;R46A @@:
;R46A loop short @B
;R46A ror ecx,16
;R46A X_Not_Smbusy:
;R46A out dx,al
;R46A loop short X_Chk_I2c_OK
;R46A X_SMBus_Err:
;R46A out dx,al ;clear status
;R46A NEWIODELAY
;R46A in al,dx
;R46A test al,04H ;device error ?
;R46A jnz short X_SMBus_Err
;R46A
;R46A stc
;R46A X_Clear_final:
;R46A
;R46A ret
;R46A X_Chk_SMBus_READY Endp
;R07A endif; CAS_Latency_Error_String
ENDIF; No_Suggested_SDRAM_CL ;R07A
;R46 - starts
IFNDEF No_Suggested_DRAM_Clock
X_DRAM_Clock_Error_String Proc Far
pushad
;R50 mov cx,VT692 + 08h
;R50 call X_Get_Ct
;R50 cmp al, 40h
call X_If_693A ;R50
jb Dont_Report_1 ; Not 133Mhz Support !
call X_Check_SDRAM
jnz Dont_Report_1 ; No SDRAM Pluged !
xor bh,bh
mov bl, 0a0h
Test_SPD_Loop_1:
shr bh,2
mov al, 9 ; Read Byte 9 :
call X_I2C_Byte_Read
or al,al
jz Support_66MHz_DRAM ; 00h => Support 66MHz
cmp al,75h
jbe Support_133MHz_DRAM ; 01h - 75h => Support 133MHz
cmp al,0A0h
jbe Support_100MHz_DRAM ; 75h - A0h => Support 100MHz
Support_66MHz_DRAM:
or bh,0C0h ;Support 66MHz
Support_100MHz_DRAM:
or bh, 80h ;Support 100MHz
Support_133MHz_DRAM: ;Support 133MHz
add bl,2
cmp bl,0a6h
jbe short Test_SPD_Loop_1
ifdef Debug_DRAM_CLK_Warning
mov al,bh
out 9eh,al
endif; Debug_DRAM_CLK_Warning
mov cx, VT692+60h
call X_Get_Ct
and al,bh
jz short All_SDRAM_Support_133MHz
and al,55h
jz short SDRAM_Support_100MHz
;-----------------------;
; Support 66MHz ;
;-----------------------;
call X_Measure_SDRAM_Speed
cmp al,66
jz short Dont_Report_1 ; Don't report
mov bl,01h
jmp short Report_Warning
SDRAM_Support_100MHz:
;-----------------------;
; Support 100MHz ;
;-----------------------;
call X_Measure_SDRAM_Speed
cmp al,100
jz short Dont_Report_1 ; Don't report
mov bl,02h
jmp short Report_Warning
All_SDRAM_Support_133MHz:
;R07A - starts
;-----------------------;
; Support 133MHz ;
;-----------------------;
call X_Measure_SDRAM_Speed
cmp al,133
jz short Dont_Report_1 ; Don't report
mov bl,04h
Report_Warning:
;---------------;
; Report ;
;---------------;
call Far Ptr E000_Show_DRAM_Clock_Error_String
Dont_Report_1:
;R07A - ends
popad
ret
X_DRAM_Clock_Error_String Endp
ENDIF; No_Suggested_DRAM_Clock
;R46 - ends
endif; SMBus_Port
;R07 - ends
;R46 - starts
;R50 ifndef No_Suggested_DRAM_Clock
Public X_Measure_SDRAM_Speed ;R50
X_Measure_SDRAM_Speed Proc Near
mov cx, VT692 + 68h
call X_Get_Ct
and al,03h
mov bl,al
mov cx, VT692 + 69h
call X_Get_Ct
and al,0C0h
shr al,4
or bl,al
mov al,66
mov si,offset SDRAM_Speed_TBL
Search_Loop:
cmp byte ptr cs:[si],bl
jz short Have_Searched
cmp byte ptr cs:[si],0FFh
jz short Search_Over
add si,2
jmp short Search_Loop
Have_Searched:
mov al,byte ptr cs:[si+1] ; Get speed from table.
Search_Over:
ifdef Debug_Measure_SDRAM_Speed
out 9eh,al
endif; Debug_Measure_SDRAM_Speed
ret
X_Measure_SDRAM_Speed Endp
SDRAM_Speed_TBL:
db 00000b, 66
db 01001b, 66
db 00100b, 100
db 00001b, 100
db 01010b, 100
db 01011b, 100
db 00101b, 133
db 00010b, 133
db 00011b, 133
db 0FFh ; End of Table !
;R50 endif; No_Suggested_DRAM_Clock
;R46 - ends
ifdef PNP_BIOS
X_Ct_Pci_Escd Proc Far
push cx
push si
push di
push ds
mov si, cs
mov ds, si
cmp ch, 38h
jne short Ct_Pci_Escd_Fail
xor si, si
mov cx,VT586_IDE + 40H
F000_call Get_Ct
test al,02h ;if IDE Primary Enable ?
jz short @f ;No, skip
or si, 1 ;Yes, Table_Index + 1
@@:
mov cx,VT586_IDE + 40H
F000_call Get_Ct
test al,01h ;if IDE Secondary Enable ?
jz short @f ;No, skip
or si, 2 ;Yes, Table_Index + 2
@@:
add si, si ;word
add si, offset ESCD_PCIB2_TBL
mov si, cs:[si]
mov cx, cs:[si]
rep movsb
clc
jmp short Ct_Pci_Escd_Exit
Ct_Pci_Escd_Fail:
stc
Ct_Pci_Escd_Exit:
pop ds
pop di
pop si
pop cx
ret
X_Ct_Pci_Escd endp
;---------------;
; IDE Disable ;
;---------------;
BRDDEF 0, 0, 4040h, ESCD_PCIB2_1
FUNCDEF FUNC_DISABLE
FUNCDEF FUNC_DISABLE
FUNCDEF ECD_FF
ECDHEAD PCI_BRD
ECDPCI 0, ((VT586)SHR(8)), 0586h, 1106h
ECDPCI 0, ((VT586_IDE)SHR(8)), 0571h, 1106h
ECDEND
BRDEND
;---------------;
; Primary IDE ;
;---------------;
BRDDEF 0, 0, 4040h, ESCD_PCIB2_2
FUNCDEF FUNC_DISABLE
FUNCDEF IRQ_ENTRY+IO_ENTRY
IRQESCD 00000000b, 14 ;IRQ14
IOESCD 10000000b, 1F0h, 10h ;1F0-1FF
IOESCD 00000000b, 3F6h, 1 ;3F6
FUNCDEF ECD_FF
ECDHEAD PCI_BRD
ECDPCI 0, ((VT586)SHR(8)), 0586h, 1106h
ECDPCI 0, ((VT586_IDE)SHR(8)), 0571h, 1106h
ECDEND
BRDEND
;---------------;
; Secondary IDE ;
;---------------;
BRDDEF 0, 0, 4040h, ESCD_PCIB2_3
FUNCDEF FUNC_DISABLE
FUNCDEF IRQ_ENTRY+IO_ENTRY
IRQESCD 00000000b, 15 ;IRQ15
IOESCD 10000000b, 170h, 10h ;170-17F
IOESCD 00000000b, 376h, 1 ;376
FUNCDEF ECD_FF
ECDHEAD PCI_BRD
ECDPCI 0, ((VT586)SHR(8)), 0586h, 1106h
ECDPCI 0, ((VT586_IDE)SHR(8)), 0571h, 1106h
ECDEND
BRDEND
;---------------;
; Both Channel ;
;---------------;
BRDDEF 0, 0, 4040h, ESCD_PCIB2_4
FUNCDEF FUNC_DISABLE
FUNCDEF IRQ_ENTRY+IO_ENTRY
IRQESCD 10000000b, 14 ;IRQ14
IRQESCD 00000000b, 15 ;IRQ15
IOESCD 10000000b, 1F0h, 10h ;1F0-1FF
IOESCD 10000000b, 3F6h, 1 ;3F6
IOESCD 10000000b, 170h, 10h ;170-17F
IOESCD 00000000b, 376h, 1 ;376
FUNCDEF ECD_FF
ECDHEAD PCI_BRD
ECDPCI 0, ((VT586)SHR(8)), 0586h, 1106h
ECDPCI 0, ((VT586_IDE)SHR(8)), 0571h, 1106h
ECDEND
BRDEND
ESCD_PCIB2_TBL label word
dw offset ESCD_PCIB2_1
dw offset ESCD_PCIB2_2
dw offset ESCD_PCIB2_3
dw offset ESCD_PCIB2_4
endif ;PNP_BIOS
;[]==============================================================[]
; _get_ct(Get_PCI):
; Reads a value directly from the chipset register.
;
; Input : CX = Index register to read
; Output : AL = Value read
; Destory: EAX, DX
;[]==============================================================[]
Public X_get_ct
X_get_ct proc near
F000_call Get_Ct
ret
X_get_ct endp
;[]==============================================================[]
; X_set_ct(Set_PCI):
; Changes a value in the chipset register.
; Input : CX = Index register to change
; AL = Value to change
; Output : None
; Destory: EAX, ECX, DX
;
;[]==============================================================[]
Public X_set_ct
X_set_ct proc near
push cx ;R29
F000_call Set_Ct
pop cx ;R29
ret
X_set_ct endp
;[]==============================================================[]
; X_get_set_ct(Get_Set_PCI):
; Changes a value in the chipset register.
; Input : CX = Index register to change
; bx = Value to change
; Output : None
; Destory: EAX, ECX, DX
;
;[]==============================================================[]
Public X_Get_Set_Ct
X_Get_set_ct proc near
;R29 F000_call Get_Set_Ct
call X_Get_Ct ;R29
and al, bl ;R29 AND data
or al, bh ;R29 OR data
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